WO2007054031A1 - A method and apparatus for implementing xdsl hybrid access - Google Patents

A method and apparatus for implementing xdsl hybrid access Download PDF

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Publication number
WO2007054031A1
WO2007054031A1 PCT/CN2006/003023 CN2006003023W WO2007054031A1 WO 2007054031 A1 WO2007054031 A1 WO 2007054031A1 CN 2006003023 W CN2006003023 W CN 2006003023W WO 2007054031 A1 WO2007054031 A1 WO 2007054031A1
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Prior art keywords
cell
frame
data frame
vdsl
pseudo
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PCT/CN2006/003023
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English (en)
French (fr)
Inventor
Weiping Xie
Qiupeng Zhao
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Priority to EP06805217A priority Critical patent/EP1890459A4/en
Priority to CN2006800119090A priority patent/CN101156418B/zh
Publication of WO2007054031A1 publication Critical patent/WO2007054031A1/zh
Priority to US11/945,806 priority patent/US7756161B2/en
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M11/00—Telephonic communication systems specially adapted for combination with other electrical systems
    • H04M11/06—Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors
    • H04M11/062—Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors using different frequency bands for speech and other data

Definitions

  • the present invention relates to the field of communications technologies, and in particular, to a method and apparatus for implementing hybrid access of an X Digital Subscribe Line (XDSL).
  • XDSL X Digital Subscribe Line
  • VDSL2 Very High Speed Digital Subscriber Line 2
  • ITU-T International Telecommunication Union-Telecommunication Sector
  • DMT Discrete Multiple Tone Line Coding
  • CPE Customer Premises Equipment
  • the DSL physical layer chip on the user board of the existing Digital Subscriber Line Access Multiplexer has considered such a compatible design, and can simultaneously support ADSL2+ and VDSL2 access, but To be true To achieve compatibility between ADSL2+ and VDSL2, a compatible design must be implemented in the protocol processing part of the DSLAM.
  • the existing DSLAM device user board includes a DSL physical layer chip, a protocol processing chip, and an uplink interface chip.
  • the DSL physical layer chip is an interface with a network transmission device, that is, a twisted pair
  • the uplink interface chip is an interface with a user terminal device.
  • the service in the twisted pair is transmitted in the format of the data frame, and the user terminal device processes the service in the cell format. Therefore, the role of the protocol processing chip is to convert the data frame format and the cell format. Protocol processing generally uses the following technical solutions:
  • the first solution is to use the Asynchronous Transfer Mode (ATM) mode.
  • ATM Asynchronous Transfer Mode
  • the interface between the protocol processing chip and the DSL physical layer chip adopts the universal test and operation physical layer interface (Universal Test&Operations PHY Interface for Asynchronous Transfer).
  • UTOPIA Universal Test&Operations PHY Interface for Asynchronous Transfer).
  • the ATM cell carries the Asynchronous Transfer Mode Adaptation Layer 5 (AAL5) frame.
  • AAL5 Asynchronous Transfer Mode Adaptation Layer 5
  • ADSL Asynchronous Transfer Mode Adaptation Layer 5
  • ADSL2 ADSL2+
  • the ATM method can only be used to carry standard ATM cells, and is not suitable for VDSL technology.
  • the second solution is to use the Packet Transfer Mode (PTM) mode.
  • the interface between the protocol processing chip and the DSL physical layer chip generally adopts a Serial Media Independent Interface (SMII) and a media independent interface ( Medium Independent Interface (MIL) or Packet over SONET (POS) interface on the synchronous optical network, carrying High Level Data Link Control (HDLC) frames or first mile Ethernet (Ethernet in the first)
  • HDLC High Level Data Link Control
  • Ethernet first mile Ethernet
  • the mile, EFM frame, or the DSL physical layer chip strips the Layer 2 or Layer 3 packets after HDLC or EFM encapsulation.
  • the PTM mode can only process HDLC or EFM frames, and is not compatible with the UTOPIA interface. Therefore, the PTM mode is only suitable for VDSL, VDSL2 and VDSL2+ and other VDSL family DSL technologies are not suitable for ADSL family DSL technology.
  • the object of the present invention is to provide a method for implementing xDSL hybrid access, which can implement an DSL technology for an access device supporting both ADSL and VDSL families.
  • the method uses an asynchronous transfer mode ATM to transmit an ATM standard cell for carrying ADSL service and a pseudo cell for carrying a VDSL service; when reassembling a cell, distinguishing a cell type, and an ATM standard letter
  • the unit is reorganized into an ADSL data frame, and the pseudo cells are reorganized into VDSL data frames.
  • the object of the present invention is also to provide a DSLAM that implements xDSL hybrid access, which can simultaneously support ADSL and VDSL DSL technologies.
  • the DSLAM includes a network side transceiver module, a user side transceiver module, a reassembly module, and a segmentation module.
  • the reassembly module is configured to distinguish the type of the cell from the user side transceiver module, recombine the ATM standard cell into an ADSL data frame, reassemble the pseudo cell into a VDSL data frame, and send the reassembled data frame to the Network side transceiver module;
  • the segmentation module is configured to distinguish a data frame type from a network side transceiver module, segment the ADSL data frame into an ATM standard cell, segment the VDSL data frame into a pseudo cell, and segment the obtained message.
  • the element is sent to the user side transceiver module.
  • the present invention has the following advantages:
  • the present invention implements both ATM mode and PTM mode in a device through a UTOPIA interface or a POS interface, and supports standard ATM cells carrying AAL5 frames and pseudo cells carrying HDLC/EFM frames. Segmentation and reorganization can enable devices to support access to DSL technologies of ADSL and VDSL families simultaneously, protecting users. The original investment. BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a schematic diagram showing the internal structure of a user board of an existing DSLAM device
  • FIG. 2 is a schematic diagram of a standard ATM cell format
  • FIG. 3 is a schematic diagram of a pseudo cell format of the present invention.
  • FIG. 4 is a schematic structural diagram of a pseudo cell CIB domain according to the present invention.
  • FIG. 5 is a schematic structural diagram of a pseudo cell Control Byte field according to the present invention.
  • Figure 6 is a schematic diagram of a standard AAL5 frame format
  • Figure 7 is a schematic diagram of a standard HDLC frame format
  • FIG. 8 is a schematic diagram showing the internal structure of a DSLAM device according to the present invention.
  • FIG. 9 is a schematic diagram of a reorganization process of the present invention.
  • FIG. 10 is a schematic diagram of a segmentation process of the present invention.
  • the core content of the present invention is:
  • the standard ATM cell and the ATM pseudo-cell defined in the VDSL2 standard are simultaneously supported by the UTOPIA interface, and the HDLC or EFM frame is carried in the pseudo cell, and the ADSL family DSL technology access is also
  • the AAL5 frame is carried in the ATM standard cell, so that it can be compatible with the ADSL family DSL technology access when accessing the VDSL family DSL technology.
  • the UTOPIA interface can also be replaced with other standard interfaces such as POS interfaces.
  • the following is an example of an access scheme that supports both ADSL and VDSL in a DSLAM.
  • the solution can simultaneously support the PTM and ATM transmission modes used in the current VDSL chipset, and solve the defect that the current DSLAM device can only support the ATM or PTM transmission mode, so that the operator can also use the new access technology when using the new access technology.
  • Previously invested CPE equipment can be used.
  • the cell header field includes H1 ⁇ H5, which is 5 bytes in total.
  • the meanings from high to low are Generic Flow Control (GFC). Bit), Virtual Path Identifier (VPI)
  • VCI Virtual Channel Identifier
  • PTI Packet Type Identifier
  • CLP Cell Loss Priority
  • HEC Header Error Control
  • FIG. 3 is a schematic diagram of an ATM pseudo-cell format for carrying a PTM in VDSL2.
  • a pseudo cell In the cell header portion of the ATM pseudo cell (hereinafter referred to as a pseudo cell) for carrying the VDLS2 frame, only the D6 bit and the HI byte in H2 are used, and the other cell header fields (H3 ⁇ H6) are not available.
  • Used. 4 is a schematic structural diagram of a Cell Information Byte (CIB) in a pseudo cell according to the present invention. The CIB field is located in the HI byte of the pseudo cell shown in FIG.
  • CIB Cell Information Byte
  • SAF Start of Frame Flag
  • EAF End of Frame Flag
  • D6 payload data length
  • D5 payload data length
  • 5 is a schematic structural diagram of a control Byte of a pseudo cell, which is located in the H2 byte of the pseudo cell shown in FIG. 3, where the D6 bit is defined as an Er bit, and is used to identify whether the HDLC frame or the EFM frame is used. A decoding error has occurred and the other bits are currently undefined.
  • the UTOPIA interface restricts the use of the cell format, for ASDL services (including ASDL2 and ASDL2+), the standard ATM cell format is used, which is naturally guaranteed to be compatible; for VDSL services, its service must be encapsulated.
  • cell format It can be docked and compatible with ATM.
  • This cell format is not a standard ATM cell, but a format similar to ATM cells, so it is called a pseudo cell.
  • the purpose of defining the pseudo-cell is to carry the HDLC/EFM frame, or to remove the Media Access Control (MAC) frame formed by the Layer 2 or Layer 3 packet of the HDLC/EFM frame encapsulation by the DSL physical layer chip. For transmission via the UTOPIA interface.
  • MAC Media Access Control
  • the format of the above pseudo cell is only a specific example, and can be defined by different manufacturers.
  • the SOF can be in the D7 bit of the HI, or the D7 bit in the H3, or some other in the pseudo cell header.
  • the control domain, the present invention does not limit the specific definition of the pseudo cell.
  • the user side receiving module 610 is configured to receive a standard ATM cell or a PTM-bearing pseudo cell from the user terminal through the UTOPIA interface; It includes a user-side VDSL interface 611 and a user-side ADSL interface 612, both of which are UTOPIA interfaces.
  • the reassembly module 620 reorganizes the cells received by the user side receiving module.
  • a pseudo cell recombining unit 621 and a standard cell recombining unit 622 are included, wherein the pseudo cell recombining unit 621 is configured to receive pseudo cells from the user side VDSL interface 611, and reassemble the received pseudo cells into HDLC frames/EFMs. Frame or MAC frame;
  • the standard cell reassembly unit 622 is configured to receive ATM standard cells from the user side ADSL interface 612 and reassemble the received ATM standard cells into AAL5 frames.
  • the network side sending module 630 is configured to send the data frame from the reassembly module 620 to the network side device.
  • the network side VDSL interface 631 and the network side ADSL interface 632 are configured to receive and transmit the HDLC frame/EFM frame or the MAC frame obtained by the pseudo cell reassembly to the network device; the network side ADSL interface 632 is used for The AAL5 frame reassembled by the ATM standard cell is received and transmitted to the network device.
  • the network side receiving module 640 is configured to receive a data frame on the network side, and send the received data frame to the segmentation module 650.
  • the network side VDSL interface 641 and the network side ADSL interface 642 are included.
  • the network side VDSL interface 641 is configured to receive an HDLC frame/EFM frame or a MAC frame from a network device
  • the ADSL interface 642 is configured to receive an AAL frame from the network device.
  • the segmentation module 650 is configured to perform segmentation processing on the data frame received by the network side receiving module 640.
  • a pseudo cell segmentation unit 651 and a standard cell segmentation unit 652 are included, wherein the pseudo cell segmentation unit 651 is configured to segment the HDLC frame/EFM frame or the MAC frame from the network side VDSL interface 641 to generate a pseudo cell.
  • the standard cell segmentation unit 642 is configured to segment the AAL5 frame from the network side ADSL interface 642 to generate an ATM standard cell.
  • User side sending module 660 for transmitting standard ATM cells or pseudo cells from the segmentation module 650 to the user terminal device.
  • the user-side VDSL interface 611 and the user-side VDSL interface 661 may correspond to the same port, and the user-side ADSL interface 612 and the user-side ADSL interface 662 and the network side.
  • the VDSL interface 631 and the network side VDSL interface 641 and the network side ADSL interface 632 and the network side ADSL interface 642 respectively correspond to the same port.
  • the network side sending module 630 and the network side receiving module 640 can be collectively referred to as a network side transceiver module
  • the user side receiving module 610 and the user side sending module 660 can be collectively referred to as a user side transceiver module.
  • the processing of other modules is the same as the original processing in the ADSL2+ technology.
  • the present invention mainly improves the reassembly module and the segmentation module, and the original ATM
  • the standard only defines the reassembly and segmentation processing of standard ATM cells.
  • the present invention allows it to handle both standard ATM cells and pseudo cells.
  • There may be other functional modules in the actual DSLAM which are not shown in Figure 6 because they are not relevant to the present invention.
  • Figure 7 shows the standard AAL5 frame format, including the common part convergence sublayer (CPCS) Protocol Data Unit (PDU), padding field (PAD), CPCS user-to-user ID.
  • CPCS common part convergence sublayer
  • PDU Protocol Data Unit
  • PAD padding field
  • FIG. 8 shows a schematic diagram of a standard HDLC frame/EFM frame format, including start flag, address data, control data, information data, CRC field, and end flag.
  • FIG. 9 is a schematic diagram of a reorganization process of the present invention, including the following steps:
  • Step 901 Read the received cell; if the cell is from the VDSL interface, go to step 902; if the cell is from the ADSL interface, go to step 904.
  • the cell is a standard ATM cell or a pseudo cell is to see from which port the cell is received. If a pseudo cell is received from the VDSL interface, the standard cell is received from the ADSL interface, and the attribute of the port is The VDSL interface or the ADSL interface is pre-configured.
  • Step 902 Extract the payload data carried in the pseudo cell, and perform CRC check on the pseudo cell. If the check is incorrect, the pseudo cell is discarded. If the check is correct, the packet is forwarded to the subsequent module.
  • Step 903 Determine whether the pseudo cell is the last cell in the dummy data frame. If yes, extract the length of the message from the H2 of the pseudo cell, and go to step 901; otherwise, go directly to step 901.
  • Step 904 The payload data carried in the ATM standard cell is extracted, and the packet is CRC-checked. If the packet is incorrect, the packet is discarded. If the packet is correct, the packet is forwarded to the subsequent module.
  • Step 905 Determine whether the cell is the last cell of an AAL frame, and if yes, extract the length of the message from the AAL5 frame, and go to step 901; otherwise, go directly to step 901.
  • the interface of the DSLAM to the aggregation network is an Ethernet interface, it is necessary to reorganize the cells. Framing.
  • the AAL5 frame is encapsulated in the ATM standard cell, and the HDLC frame is encapsulated in the pseudo cell.
  • the two cell formats are different, so the reassembly will be different.
  • the reassembly of the EFM frame is the same as the reorganization of the HDLC frame.
  • the reassembly of the AAL5 frame is based on the logical port number +VPI+VCI corresponding to the UTOPIA interface, and the internal connection number is obtained.
  • the AAL5 frame carried in the cell is extracted according to the internal connection number for further processing.
  • the UTOPIA interface is a multi-PHY mode
  • the port number is the PHY ID
  • the mapping of the VPI/VCI or port number to the internal connection number is also configured by the user in advance. Because the number of logical port number + VPI + VCI is up to 29, if it is too much internal processing, it is not easy to handle. In fact, the number of connections that a reassembly module needs to process is not many (generally 512), and the internal connection number can be simplified. deal with.
  • the reorganization of the HDLC frame is based on the logical port number corresponding to the UTOPIA interface, and the internal connection number is obtained.
  • the mapping of the port number to the internal connection number is also configured by the user in advance, and the internal connection number can be used for the processing, according to the internal connection number.
  • the HDLC/EFM frame in the pseudo cell is extracted for further processing, where the HDLC frame may be the content from the address data to the CRC described in FIG. 8, or may be the content from the information data to the CRC.
  • the reorganization of the HDLC frame is the same as that of the AAL5 frame, and the differences are as follows:
  • mapping of the internal connection number during reassembly, the reorganization of the AAL5 frame is searched by the logical port number corresponding to the UTOPIA interface + VPI + VCI, and the reorganization of the HDLC/EFM frame can be mapped by the logical port number corresponding to the UTOPIA interface; Said to configure an internal connection number for the UTOPIA PHY port (that is, the logical port).
  • the length of the frame is extracted.
  • the length of the AAL5 frame is extracted from the length field of the AAL5 frame.
  • the HDLC/EFM frame is extracted from the cell header of the last cell of the data frame. If EOF is found to be 1, it is the last letter. Yuan, extract the value of size from the HI of the cell.
  • the frame check part the check is that the reassembly module performs CRC calculation on the received data. There is also a CRC check field (32bit) in the received frame. If the two are the same, the check is considered to pass, otherwise the check fails.
  • the purpose of the check is to verify the correctness of the message and provide incorrect positioning. If there are a large number of CRC errors, there is a problem with the link.
  • Existing ATM solutions are based on the CPCS CC check, and the VDSL2 standard does not specify which checksum to use.
  • the AAL5 frame is verified by the CRC field of the AAL5 frame and the CRC field obtained by recalculating the recombination module. If the frame error is not the same, the HDLC/EFM frame is extracted by the reassembly module for the last four bytes of the information data (MAC frame CRC) is compared with the calculated CRC result for frame check. The check for the AAL5 frame is verified by the CPCS CRC, and the check of the HDLC/EFM frame is verified by the CRC of the Ethernet frame.
  • the segmentation process is the inverse process of the reassembly process. According to whether the data frame is from the ADSL interface or the VDSL interface, it is known whether the frame is an AAL5 frame or an HDLC frame/EFM frame, and then the frame is segmented into an ATM standard cell or a pseudo-letter. yuan. As shown in Figure 10, the flowchart of the segmentation process includes the following steps:
  • Step 1001 Find the UTOPIA port number to be sent by using the internal connection number of the frame. If the port number corresponds to the VDSL interface, go to step 1002. If the port number corresponds to the ADSL interface, go to step 1003.
  • Step 1002 Perform segmentation processing on the frame data according to the pseudo cell format, and transmit the pseudo cells obtained after the segmentation to the user side sending module for processing;
  • Step 1003 Perform segmentation processing on the frame data according to the ATM standard cell format, and transmit the ATM standard cell obtained by the segmentation to the user side sending module for processing.
  • the essence of recombination is to extract the frame data carried in the cell to form a frame and send it to the network side. Both need to know the frame start flag, the end of frame flag, the length of the frame, whether the frame is wrong, only the pseudo cell and the ATM standard letter. The meta format is different, which means that the way to extract the above information is different.
  • Extraction of the frame start flag The ATM cell has no start flag, and the first cell received is considered to be the first cell of the frame, and the subsequent judgment is that the cell after the last cell of the frame is the first cell;
  • the pseudo cell can extract the SOF directly from the cell header;
  • ATM cell frame end flag is the last 1 bit of PTI; pseudo cell can extract EOF directly from the cell header;
  • Length of the frame The frame length of the ATM cell is extracted from the reciprocal 5 ⁇ 6 bytes of the last cell of the frame, that is, the reciprocal of the AAL5 frame is 5 ⁇ 6 bytes; the frame length of the pseudo cell is directly from the last frame of the frame. Extracting the Length field from the cell header of the cell;
  • the ATM cell does not have an independent error identifier. It depends on the check to determine whether it is wrong.
  • the ATM cell check verifies that the cell is incorrect through the HEC field.
  • the frame error is verified by the CPCS CRC field.
  • the pseudo cell does not currently have Define the verification standard, where the CRC field of the HDLC/EFM frame is used for verification.
  • SAR segmentation and reassembly
  • the ATM cell is a pseudo cell or a pseudo cell according to the logical port received by the cell;
  • the fields (SOF, EOF, Er, Length, frame data) are filled in different positions when segmented.
  • the invention realizes that the standard ATM cell carrying the AAL5 frame and the pseudo cell carrying the HDLC/EFM frame are simultaneously segmented and recombined in a device through the UTOPIA interface or the POS interface, and the CRC domain of the HDLC/EFM frame band is utilized. The verification of the received HDLC/EFM frame is implemented. Can enable the device to support both ADSL technology and VDSL technology The access to the technology protects the user's original investment.
  • the ADSL family of DSL technologies includes, but is not limited to, ADSL, ADSL2, and ADSL2+.
  • VDSL family DSL technologies include, but are not limited to, VDSL, VDSL2, and VDSL2+.

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Description

一种实现 xDSL混合接入的方法和装置 技术领域 ^
本发明涉及通信技术领域，尤其涉及一种实现数字用户线（ X Digital Subscribe Line, xDSL ) 混合接入的方法和装置。 发明背景
2005 年 6 月 国 际电信联盟 -电信标准部 （ International Telecommunication Union-Telecommunication Sector, ITU-T )批准的新传 输标准甚高速数字用户线 2 ( VDSL2 ) , 完全基于离散多音频调制 ( Discrete Multiple Tone Line Coding, DMT )技术， 它不仅具备不对称 数字用户线 2+ ( ADSL2+ )技术的长距离传输能力， 而且将 VDSL的数 据传输速率从 70M bps (下行） /30M bps (上行）提高到 100M bps (下 行） /100M bps (上行）。 VDSL2 将更高的接入速率、 更强的服务质量 ( Quality of Service, QoS )控制和类似 ADSL的长距离传输性能结合起 来， 很快成为新一代接入技术的热点。
运营商渴望应用新技术， 但是也不希望以前的投资还没有收回就又 到了设备更新的时候， 所以运营商希望在接入设备采用新的 VDSL2技 术时 , 在用户驻地设备 ( Customer Premises Equipment, CPE )方面能够 兼容原有设备， 如 ADSL2 +的调制解调器（modem )等， 这对接入设备 提出了更高的要求。
现有的数字用户线接入复用器 （Digital Subscriber Line Access Multiplexer, DSLAM ) 的用户板上的 DSL物理层芯片方面已经考虑了 这样的兼容设计， 可以同时支持 ADSL2 +和 VDSL2的接入， 但是要真 正实现 ADSL2+和 VDSL2的兼容， 必须在 DSLAM的协议处理部分也 要做相应的兼容设计。
如图 1所示，现有 DSLAM设备用户板中包括 DSL物理层芯片、协 议处理芯片和上行接口芯片。其中 DSL物理层芯片为与网络传输设备即 双绞线的接口， 上行接口芯片是与用户终端设备的接口。 双绞线中业务 以数据帧的格式传输， 而用户终端设备处理的是信元格式的业务， 因此 协议处理芯片的作用就是进行数据帧格式与信元格式的相互转换。 协议 处理一般采用如下几种技术方案：
第一种方案是采用异步传输模式 （Asynchronous Transfer Mode, ATM )方式， 协议处理芯片与 DSL物理层芯片之间的接口采用异步传 输模式的通用测试及操作物理层接口 （Universal Test&Operations PHY Interface for Asynchronous Transfer Mode , UTOPIA ) , 载的是 ATM标 准信元， ATM信元中承载的是 ATM适配层类型 5( Asynchronous Transfer Mode Adaptation Layer 5 , AAL5 )帧， 目前应用最广泛的 ADSL、 ADSL2、 ADSL2+等 ADSL族的 DSL技术中使用的都是这种方式。 但 ATM方式 只能用于承载标准的 ATM信元， 不适合 VDSL技术。
第二种方案是使用分组传送模式（Packet Transfer Mode, PTM ) 方 式，协议处理芯片与 DSL物理层芯片之间的接口一般采用串行媒体无关 接口 （Strand Medium Independent Interface , SMII )、 媒体无关接口 ( Medium Independent Interface , Mil ) 或者同步光纤网上的分組包 ( Packet over SONET, POS )接口，承载的高级数据链路控制（ High Level Data Link Control, HDLC ) 帧或者第一英里以太网 （ Ethernet in the first mile, EFM )帧， 也可以是 DSL物理层芯片剥离了 HDLC或者 EFM封 装后的二层或者三层报文。 PTM方式只能处理 HDLC或者 EFM帧， 不 能兼容 UTOPIA接口方式， 因此 PTM方式只适合 VDSL, VDSL2和 VDSL2 +等 VDSL族的 DSL技术， 不适合 ADSL族的 DSL技术。
如果要同时兼容 ADSL族和 VDSL族的接入， DSLAM用户板上的 协议处理芯片必须能够同时处理 ATM标准信元和 PTM方式的报文。但 是， 现有技术无法同时处理 ATM标准信元和 PTM方式的报文， 因此不 能同时支持 ADSL族和 VDSL族的 DSL技术接入。 发明内容 本发明的目的在于， 提出一种实现 xDSL混合接入的方法， 能够实 现接入设备同时支持 ADSL族和 VDSL族的 DSL技术。
该方法采用异步转输模式 ATM传输用于承载 ADSL业务的 ATM标 准信元以及用于承载 VDSL业务的伪信元； 在对信元进行重组时， 对信 元的类型进行区分， 将 ATM标准信元重组为 ADSL数据帧， 将伪信元 重組为 VDSL数据帧。
本发明的目的还在于， 提出一种实现 xDSL混合接入的 DSLAM, 能够同时支持 ADSL族和 VDSL族的 DSL技术。 所述 DSLAM包括网 络侧收发模块、 用户侧收发模块、 重组模块和分段模块，
所述重组模块用于区分来自用户侧收发模块的信元的类型， 将其中 的 ATM标准信元重组为 ADSL数据帧，将伪信元重组为 VDSL数据帧； 并将重组得到的数据帧发送到网络侧收发模块；
所述分段模块用于区分来自网络侧收发模块的数据帧类型， 将其中 的 ADSL数据帧分段为 ATM标准信元，将 VDSL数据帧分段为伪信元， 并将分段得到的信元发送到用户侧收发模块。
本发明的有益效果为： 本发明实现了在一个设备内通过 UTOPIA接 口或 POS接口同时支持 ATM方式和 PTM方式， 同时支持承载 AAL5 帧的标准 ATM信元和承载 HDLC/EFM帧的伪信元的分段和重组，可以 使设备同时支持 ADSL族和 VDSL族的 DSL技术的接入， 保护了用户 原来的投资。 附图简要说明
图 1为现有 DSLAM设备用户板内部结构示意图；
图 2为标准的 ATM信元格式示意图；
图 3为本发明伪信元格式示意图；
图 4为本发明伪信元 CIB域结构示意图；
图 5为本发明伪信元 Control Byte域结构示意图；
图 6为标准的 AAL5帧格式示意图；
图 7为标准的 HDLC帧格式示意图；
图 8为本发明 DSLAM设备内部结构示意图；
图 9为本发明重组处理流程示意图；
图 10为本发明分段处理流程示意图。
实施本发明的方式
本发明的核心内容为： 在 DSLAM中通过 UTOPIA接口同时支持标 准的 ATM信元和 VDSL2标准中定义的 ATM伪信元 ,将 HDLC或者 EFM 帧承载在伪信元中， ADSL族 DSL技术接入也是把 AAL5帧承载在 ATM 标准信元中， 这样可以在使用 VDSL族 DSL技术接入时可以同时兼容 ADSL族 DSL技术接入。 其中， UTOPIA接口也可替换为其他标准接口 如 POS接口。
为使本发明的目的、 技术方案和优点更加清楚， 下面结合附图对本 发明作进一步的详细阐述。
下面以在 DSLAM中同时支持 ADSL和 VDSL的接入方案为实施例 进行具体说明 ,该方案可以同时支持目前 VDSL套片使用的 PTM和 ATM 传送方式，解决目前 DSLAM设备中只能支持 ATM或者 PTM传送方式 的缺陷， 从而使运营商在使用新的接入技术时还可以使用以前投资的 CPE设备。
如图 2所示为标准的 ATM信元格式示意图， 信元头域包括 Hl ~ H5，共 5个字节，从高到低分别对应的含义为一般流量控制（ Generic Flow Control, GFC ) ( 4比特）、 虚通道识别符（ Virtual Path Identifier, VPI )
( 8比特）、 虛信道标识符（ Virtual Channel Identifier, VCI ) ( 16比特）、 净荷类型识别（Pdyload Type Identified, PTI ( 3比特）、 信元丢失优先级
( Cell Loss Priority, CLP ) ( 1 比特）、 信元头差错控制 （Header Error Control, HEC ) ( 8比特）。 PAD为填充位， DataO - Data47为信元承载 的净荷数据。
图 3为在 VDSL2中用于承载 PTM的 ATM伪信元格式示意图。 在 用于承载 VDLS2帧的 ATM伪信元（以下简称为伪信元）的信元头部分， 只用到了 H2中的 D6位和 HI字节， 其它信元头域（ H3 ~ H6 )都没有 用到。 图 4为本发明伪信元中的信元信息字段（ Cell Information Byte, CIB )结构示意图， 所述 CIB字段位于图 3所示伪信元的 HI字节， 从 高到低依次为: 帧起始标志（Start of Frame Flag, SOF ) ( D7位）、 帧结 束标志（ End of Frame Flag, EOF ) ( D6位）和净荷数据长度（ Size ) ( D5 ~ Dl位）。 图 5为本发明伪信元控制字段（ Control Byte )结构示意图， 该 字段位于图 3所示伪信元的 H2字节， 其中 D6位定义为 Er比特， 用于 标识 HDLC帧或 EFM帧中是否出现了解码错误，其他位目前均未定义。
因为 UTOPIA接口限制了必须使用信元格式， 对于 ASDL业务（包 括 ASDL2以及 ASDL2 + )来说， 本来就使用标准的 ATM信元格式， 自然保证了兼容； 对于 VDSL业务来说， 必须将其业务封装在信元格式 中才能与 ATM对接和兼容， 这种信元格式并不是标准的 ATM信元， 而 只是具有类似 ATM信元的格式而已， 故称为伪信元。 定义伪信元的目 的只是为了承载 HDLC/EFM 帧、 或由 DSL 物理层芯片剥离了 HDLC/EFM 帧封装的二层或三层报文形成的媒体接入控制 （Media Access Control, MAC ) 帧， 以便通过 UTOPIA接口传输。
上述伪信元的格式只是一个具体的例子， 可以由不同的厂家自行定 义， 比如 SOF可以在 HI的 D7位， 也可以在 H3的 D7位等， 或者在伪 信元头中还可能增加一些其它的控制域 , 本发明并未对伪信元的具体定 义作出限定。
如图 6所示，本发明的用户端 DSLAM内部各模块的功能说明如下： 用户侧接收模块 610: 用于通过 UTOPIA接口接收来自用户终端的 标准 ATM信元或承载 PTM的伪信元； 其中至少包括一个用户侧 VDSL 接口 611和一个用户侧 ADSL接口 612， 所述两个接口均为 UTOPIA接 口。
重组模块 620: 对用户侧接收模块接收的信元进行重组处理。 包括 伪信元重组单元 621和标准信元重组单元 622,其中伪信元重组单元 621 用于接收来自用户侧 VDSL接口 611的伪信元， 并将所接收的伪信元重 组为 HDLC帧 /EFM帧或者 MAC帧； 标准信元重组单元 622用于接收 来自用户侧 ADSL接口 612的 ATM标准信元，并将所接收的 ATM标准 信元重组为 AAL5帧。
网络侧发送模块 630: 用于将来自重组模块 620的数据帧发送到网 络侧设备。 包括网络侧 VDSL接口 631和网络侧 ADSL接口 632， 其中 网络侧 VDSL接口 631用于接收并向网络设备发送由伪信元重組得到的 HDLC帧 /EFM帧或者 MAC帧；网络侧 ADSL接口 632用于接收并向网 络设备发送由 ATM标准信元重组得到的 AAL5帧。 网络侧接收模块 640: 用于接收网络侧的数据帧， 并将所接收的数 据帧发送至分段模块 650。 包括网络侧 VDSL接口 641和网络侧 ADSL 接口 642。 其中网络侧 VDSL接口 641用于接收来自网络设备的 HDLC 帧 /EFM帧或者 MAC帧 , ADSL接口 642用于接收来自网络设备的 AAL 帧。
分段模块 650: 用于对网絡侧接收模块 640所接收的数据帧进行分 段处理。 包括伪信元分段单元 651和标准信元分段单元 652, 其中伪信 元分段单元 651用于将来自网络侧 VDSL接口 641的 HDLC帧/ EFM帧 或者 MAC帧进行分段生成伪信元， 标准信元分段单元 642用于将来自 网络侧 ADSL接口 642的 AAL5帧进行分段生成 ATM标准信元。
用户侧发送模块 660: 用于将来自分段模块 650的标准的 ATM信 元或伪信元发送到用户终端设备。
图 6 所示各个模块是从逻辑功能上进行划分， 实际其中的用户侧 VDSL接口 611和用户侧 VDSL接口 661可能对应同一个端口， 同样， 用户侧 ADSL接口 612和用户侧 ADSL接口 662、网络侧 VDSL接口 631 和网络侧 VDSL接口 641以及网络侧 ADSL接口 632和网络侧 ADSL接 口 642分别对应同一个端口。 这样， 网络侧发送模块 630和网络侧接收 模块 640可统称为网络侧收发模块， 用户侧接收模块 610和用户侧发送 模块 660可统称为用户侧收发模块。
在以上所述模块中， 除了重组模块和分段模块外， 其它模块的处理 都和原来的在 ADSL2+技术处理没有任何差别， 本发明主要是对重组模 块和分段模块进行改进处理，原来的 ATM标准只定义了标准的 ATM信 元的重组和分段处理， 本发明使其既可以处理标准的 ATM信元， 又可 以处理伪信元。 实际的 DSLAM中可能还有其他功能模块， 因为与本发 明内容无关， 所以并未在图 6中示出。 图 7 所示为标准的 AAL5 帧格式示意图， 包括共用部分汇聚子层 ( common part convergence sublayer, CPCS )的协议数据单元 ( Protocol Data Unit , PDU )、 填充字段 （PAD )、 CPCS 的用户到用户标识 ( User-to-User indication, UU )、公共 分^ 1旨示符 ( Common part indicator, CPI ),长度 ( Length )和循环冗余校验 ( Cyclic Redundancy Check, CRC ) 字段。 图 8所示为标准的 HDLC帧 /EFM帧格式示意图， 包括起始标志、 地址数据、 控制数据、 信息数据、 CRC字段和结束标志。
图 9所示为本发明重组处理流程示意图， 包括如下步骤：
步骤 901 : 读取接收到的信元； 若所述信元来自 VDSL接口， 则执 行步骤 902; 若所述信元来自 ADSL接口， 则执行步骤 904。
判断信元是标准的 ATM信元还是伪信元就是看信元是从哪种端口 接收的， 如果从 VDSL接口接收的就是伪信元， 从 ADSL接口接收的就 是标准信元， 端口的属性是 VDSL接口还是 ADSL接口是事先配置的。
步骤 902: 提取伪信元中承载的净荷数据， 并对伪信元进行 CRC校 验， 如果校验错误则丢弃该伪信元， 如果校验正确则把报文向后续模块 转发。
步骤 903: 判断该伪信元是否伪数据帧中的最后一个信元， 若是， 从所述伪信元的 H2 中提取报文的长度， 并转至步骤 901 , 否则直接转 至步骤 901。
步骤 904: 提取 ATM标准信元中承载的净荷数据， 并对报文进行 CRC校验， 如果报文错误则丟弃， 如果报文正确则把报文向后续模块转 发。
步驟 905: 判断该信元是否为一个 AAL帧的最后一个信元， 若是则 从 AAL5帧中提取报文的长度，并转至步骤 901 ,否则直接转至步骤 901。
因为 DSLAM到汇聚网络的接口是以太网接口， 所以要把信元重组 成帧。 AAL5帧封装在 ATM标准信元中， 而 HDLC帧封装在伪信元中， 这两种信元格式是不一样的， 所以重组会不一样， EFM 帧的重组和 HDLC帧的重组是一样的。
AAL5 帧的重組是基于 UTOPIA接口对应的逻辑端口号 +VPI+VCI 进行管理， 获取内部连接号， 按照该内部连接号把信元中承载的 AAL5 帧提取出来进一步处理。 UTOPIA接口是多 PHY模式，端口号就是 PHY ID, VPI/VCI或端口号到内部连接号的映射也是用户事先配置的。 因为 逻辑端口号 +VPI+VCI的比特数多达 29, 如果带到内部处理太多， 不容 易处理，事实上一个重组模块需要处理的连接数量不是很多（一般 512 )， 使用内部连接号可以简化处理。 AAL5帧重组时将 AAL5帧里承载的净 荷提取出来进行保存或处理， 最后转发到网络侧。
HDLC帧的重组 ,是基于 UTOPIA接口对应的逻辑端口号进行管理， 获取内部连接号， 端口号到内部连接号的映射也是用户事先配置的， 使 用内部连接号可以筒化处理， 按照该内部连接号把伪信元中的 HDLC/EFM帧提取出来进一步处理， 这里 HDLC帧可以是图 8中描述 的从地址数据到 CRC的内容， 也可以是从信息数据到 CRC的内容。
HDLC帧的重组与 AAL5帧重组方式相同， 不同之处如下：
1、重組时内部连接号的映射， AAL5帧的重组通过 UTOPIA接口对 应的逻辑端口号 + VPI + VCI来查找， HDLC/EFM帧的重组， 可以通过 UTOPIA接口对应的逻辑端口号来映射；也就是说为该 UTOPIA的 PHY 端口 （也就是逻辑端口）配置一个内部连接号。
2、 帧长度的提取， AAL5帧的长度从 AAL5帧的 length域提取； 而 HDLC/EFM帧从数据帧的最后一个信元的信元头中提取，如果发现 EOF 为 1则表示是最后一个信元，从该信元的 HI中提取 size的值就可以了。
3、 帧校验部分， 校验就是重组模块对接收的数据进行 CRC计算， 接收的帧里本来也有一个 CRC校验域（32bit ), 两者比较， 如果相同就 认为校验通过， 否则校验不通过， 校验的目的是检验报文的正确性和提 供错误定位手段， 如果出现大量的 CRC错误， 说明链路有问题。 现有 ATM方案都是基于 CPCS C C校验， 而 VDSL2标准中并没有规定使用 何种校验。
AAL5帧的校验用 AAL5帧的 CRC域和重组模块重新计算后得到的 CRC域比较， 如果不相同认为帧错误； HDLC/EFM帧由重組模块提取 信息数据的最后四个字节（MAC帧的 CRC )和计算得到的 CRC结果比 较来进行帧校验。 针对 AAL5帧的校验是利用 CPCS CRC进行校验， 针 对 HDLC/EFM帧的校验是利用以太网帧的 CRC进行校验。
分段处理是重组处理的逆过程，根据数据帧是来自 ADSL接口还是 VDSL接口， 得知该帧是 AAL5帧还是 HDLC帧/ EFM帧的处理， 进而 把帧分段为 ATM标准信元或者伪信元。如图 10所示为分段处理流程图， 包括如下步骤：
步骤 1001、通过帧的内部连接号查找要发送的 UTOPIA端口号，若 该端口号对应 VDSL接口， 则执行步骤 1002, 若该端口号对应 ADSL 接口则执行步骤 1003;
步骤 1002: 按照伪信元格式对帧数据进行分段处理， 并把分段后得 到的伪信元传送给用户侧发送模块处理；
步骤 1003: 按照 ATM标准信元格式对帧数据进行分段处理， 并把 分段后得到的 ATM标准信元传送给用户侧发送模块处理。
重组的本质都是把信元中承载的帧数据提取出来组成帧发送到网 络侧， 都需要知道帧起始标志、 帧结束标志、 帧的长度、 帧是否错误， 只是伪信元和 ATM标准信元格式不一样， 也就是说提取上述信息的方 式不一样。 帧起始标志的提取： ATM信元没有起始标志， 认为接收到的第一 个信元是帧的首信元， 后续的判断是帧的最后一个信元之后的信元是首 信元； 伪信元可以直接从信元头中提取 SOF;
帧结束标志的提取： . ATM信元帧结束标志在 PTI的最后 1比特； 伪信元可以直接从信元头中提取 EOF;
帧的长度： ATM信元的帧长度从帧的最后一个信元的倒数 5〜6字 节提取， 也就是 AAL5帧的倒数 5〜6字节； 伪信元的帧长度直接从帧的 最后一个信元的信元头中提取 Length域；
错误标识： ATM信元没有独立的错误标识， 依赖于校验判断是否 错误， ATM信元的校验通过 HEC 域校验信元是否错误， 帧错误通过 CPCS CRC 域校验； 伪信元目前没有定义校验标准， 这里采用 HDLC/EFM帧的 CRC域进行校验。
伪信元的分段和重组 ( Segmentation And Reassembly, 即 SAR )和 ATM标准信元的 SAR主要区别是：
1、 重组时根据信元接收的逻辑端口判断是 ATM信元还是伪信元；
2、 重组时各域（SOF、 EOF, Er、 Length, 帧数据）提取的位置不 一样；
3、 分段时根据内部连接号判断该帧要分段为 ATM信元还是伪信 元；
4、 分段时各域（SOF、 EOF, Er、 Length, 帧数据）填充的位置不 一样。
本发明实现了在一个设备内通过 UTOPIA接口或 POS接口同时支 持承载 AAL5帧的标准 ATM信元和承载 HDLC/EFM帧的伪信元的分 段和重组， 并利用 HDLC/EFM 帧带的 CRC 域实现了对接收的 HDLC/EFM帧进行校验。 可以使设备同时支持 ADSL技术和 VDSL技 术的接入， 保护了用户原来的投资。 所述 ADSL族 DSL技术包括但不 限于 ADSL、 ADSL2和 ADSL2 + , VDSL族 DSL技术包括但不限于 VDSL、 VDSL2以及 VDSL2 +。
本领域技术人员不脱离本发明的实质和精神， 可以有多种变形方案 实现本发明， 以上所述仅为本发明较佳可行的实施例而已， 并非因此局 限本发明的权利范围， 凡运用本发明说明书及附图内容所作的等效变 化， 均包含于本发明的权利范围之内。

Claims

权利要求书
1、 一种实现数字用户线 xDSL混合接入的方法， 其特征在于， 采用 异步转输模式 ATM传输用于承载 ADSL业务的 ATM标准信元以及用于 承载 VDSL业务的伪信元； 该方法还包括以下步骤：
在对信元进行重组时， 对信元的类型进行区分， 将 ATM标准信元 重组为 ADSL数据帧， 将伪信元重组为 VDSL数据帧。
2、 根据权利要求 1所述方法， 其特征在于： 所述 ADSL数据帧伪 异步转输模式适配层类型 5 AAL5帧； 所述 VDSL数据帧为高级数据链 路控制 HDLC帧或以太网最后一公里 EFM帧，或剥离了 HDLC帧或 EFM 帧封装的二层或三层报文形成的媒体接入控制 MAC帧。
3、根据权利要求 1所述的方法， 其特征在于， 所述将伪信元重组为 VDSL数据帧进一步包括： 提取伪信元最后四个字节和对伪信元计算得 到的循环冗余校验 CRC结果进行比较， 如果不相同， 则丢弃该伪信元； 如果相同， 则将所述伪信元向后续模块转发。
4、根据权利要求 1所述的方法， 其特征在于， 所述将伪信元重組为 VDSL数据帧进一步包括： 判断所述伪信元是否为 VDSL数据帧的最后 一个信元， 若是则从所述伪信元的信元头中提取帧长度。
5、根据权利要求 1至 4任一项所述的方法， 其特征在于， 所述对信 元的类型进行区分为： 根据接收信元的接口的类型确定信元的类型， 所 述信元的类型包括 ATM标准信元和伪信元；
并且该方法进一步包括： 在对数据帧进行分段时， 对数据帧的类型 进行区分， 将 ADSL数据帧分段为 ATM标准信元， 将 VDSL数据帧分 段为伪信元。
6、 根据权利要求 5 所述的的方法， 其特征在于： 所述将信元分为 ATM标准信元和伪信元后进一步包括：基于接口对应的逻辑端口号与虚 拟路径标识符 VPI、 虛拟信道标识符 VCI映射内部连接号， 根据该内部 连接号提取 ATM标准信元中所承载的 AAL5帧； 基于接口对应的逻辑 端口号映射内部连接号， 根据该内部连接号提取伪信元中所承载的 HLDC帧、 EFM帧或 MAC帧。
7、根据权利要求 5所述的方法， 其特征在于， 所述在对数据帧进行 分段时， 对数据帧的类型进行区分为： 根据数据帧的内部连接号查找对 应的逻辑端口号， 将所述数据帧作为与所述£辑端口号对应的端口所对 应的数据帧类型。
8、 一种实现 xDSL混合接入的数字用户线接入复用器 DSLAM, 包 括网络侧收发模块、 用户侧收发模块、 重组模块和分段模块， 其特征在 于，
所述重组模块用于区分来自用户侧收发模块的信元的类型 , 将其中 的 ATM标准信元重组为 ADSL数据帧，将伪信元重组为 VDSL数据帧； 并将重組得到的数据帧发送到网络侧收发模块；
所述分段模块用于区分来自网络侧收发模块的数据帧类型， 将其中 的 ADSL数据帧分段为 ATM标准信元，将 VDSL数据帧分段为伪信元， 并将分段得到的信元发送到用户侧收发模块。
9、 根据权利要求 8所述的 DSLAM, 其特征在于， 所述用户侧收发 模块包括用户侧 VDSL接口和用户侧 ADSL接口， 网络侧收发模块包括 网絡侧 VDSL接口和网络侧 ADSL接口；
所述重组模块包括：
伪信元重组单元， 用于接收来自用户侧 VDSL接口的伪信元， 将所 接收的伪信元重组为 VDSL数据帧并将所述 VDSL数据帧发送至网络侧 VDSL接口； 标准信元重组单元，用于接收来自用户侧 ADSL接口的 ATM标准信 元， 将所接收的 ATM标准信元重組为 ADSL数据帧并将所述 ADSL数 据帧发送至网络侧 ADSL接口；
所述分段模块包括：
伪信元分段单元，用于接收来自网络侧 VDSL接口的 VDSL数据帧， 将所接收的 VDSL数据帧分段为伪信元， 并将所述伪信元发送至用户侧 VDSL接口；
标准信元分段单元， 用于接收来自网络侧 ADSL接口的 ADSL数据 帧，将所接收的 ADSL数据帧分段为 ATM标准信元， 并将所述 ATM标 准信元发送至用户侧 ADSL接口。
10、根据权利要求 9所述的 DSLAM,其特征在于，所述网络侧 VDSL 接口、 网络侧 ADSL接口、用户侧 VDSL接口和用户侧 ADSL接口为异 步传输模式的通用测试及操作物理层接口 UTOPIA或同步光纤网上的分 组包 POS接口。
11、 根据权利要求 8、 9或 10所述的 DSLAM, 其特征在于， 所述 ADSL数据帧为 AAL5帧， 所述 VDSL数据帧为 HLDC帧、 EFM帧或 MAC帧。
PCT/CN2006/003023 2005-11-10 2006-11-10 A method and apparatus for implementing xdsl hybrid access Ceased WO2007054031A1 (en)

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