WO2009069628A1 - データ処理装置、データ処理方法、及びプログラム - Google Patents

データ処理装置、データ処理方法、及びプログラム Download PDF

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Publication number
WO2009069628A1
WO2009069628A1 PCT/JP2008/071399 JP2008071399W WO2009069628A1 WO 2009069628 A1 WO2009069628 A1 WO 2009069628A1 JP 2008071399 W JP2008071399 W JP 2008071399W WO 2009069628 A1 WO2009069628 A1 WO 2009069628A1
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WIPO (PCT)
Prior art keywords
data processing
code
program
processing device
ldpc
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Ceased
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PCT/JP2008/071399
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English (en)
French (fr)
Inventor
Takashi Yokokawa
Makiko Yamamoto
Satoshi Okada
Lui Sakai
Ryoji Ikegaya
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Sony Corp
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Sony Corp
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Priority to EP20080854818 priority Critical patent/EP2214320A4/en
Priority to CN200880124093.1A priority patent/CN101911506B/zh
Priority to US12/743,487 priority patent/US8489955B2/en
Publication of WO2009069628A1 publication Critical patent/WO2009069628A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
    • H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
    • H03M13/1185—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure wherein the parity-check matrix comprises a part with a double-diagonal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
    • H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
    • H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
    • H03M13/271—Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6522—Intended application, e.g. transmission or communication standard
    • H03M13/6552—DVB-T2
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6522—Intended application, e.g. transmission or communication standard
    • H03M13/6555—DVB-C2
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Multimedia (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

本発明は、LDPC符号の符号ビットのエラーに対する耐性を向上させることができるデータ処理装置、データ処理方法、及びプログラムに関する。 LDPC(Low Density Parity Check)符号の2ビット以上の符号ビットが１個のシンボルとされ、214個や216個の信号点にマッピングされる場合において、カラムツイストインターリーバ２４は、検査行列の任意の１行にある1に対応する複数の符号ビットが、１個のシンボルに含まれないように、LDPC符号の符号ビットを並び替える並び替え処理として、メモリのカラム方向に、符号ビットが書き込まれるときの書き始めの位置を、メモリのカラムごとに変更するカラムツイストインターリーブを行う。本発明は、例えば、LDPC符号を送信する送信装置に適用できる。
PCT/JP2008/071399 2007-11-26 2008-11-26 データ処理装置、データ処理方法、及びプログラム Ceased WO2009069628A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP20080854818 EP2214320A4 (en) 2007-11-26 2008-11-26 DATA PROCESSING DEVICE, DATA PROCESSING PROCESS AND PROGRAM
CN200880124093.1A CN101911506B (zh) 2007-11-26 2008-11-26 数据处理设备、数据处理方法和程序
US12/743,487 US8489955B2 (en) 2007-11-26 2008-11-26 Data processing apparatus, data processing method and program

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP2007-304690 2007-11-26
JP2007304690 2007-11-26
JP2008070467 2008-03-18
JP2008-070467 2008-03-18
JP2008259466 2008-10-06
JP2008-259466 2008-10-06

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WO2009069628A1 true WO2009069628A1 (ja) 2009-06-04

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US (1) US8489955B2 (ja)
EP (5) EP2940875A1 (ja)
CN (1) CN101911506B (ja)
TW (1) TWI410055B (ja)
WO (1) WO2009069628A1 (ja)

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WO2011105290A1 (ja) * 2010-02-26 2011-09-01 ソニー株式会社 データ処理装置、及びデータ処理方法、並びに、受信システム
WO2011105289A1 (ja) * 2010-02-26 2011-09-01 ソニー株式会社 データ処理装置、及びデータ処理方法
WO2011105288A1 (ja) * 2010-02-26 2011-09-01 ソニー株式会社 データ処理装置、及びデータ処理方法
WO2011105287A1 (ja) * 2010-02-26 2011-09-01 ソニー株式会社 データ処理装置、及びデータ処理方法
WO2011158749A1 (ja) * 2010-06-17 2011-12-22 ソニー株式会社 データ処理装置、及びデータ処理方法
WO2012002238A1 (ja) * 2010-06-30 2012-01-05 ソニー株式会社 データ処理装置、及びデータ処理方法
WO2012002237A1 (ja) * 2010-06-30 2012-01-05 ソニー株式会社 データ処理装置、及びデータ処理方法
WO2012029614A1 (ja) * 2010-09-03 2012-03-08 ソニー株式会社 データ処理装置、及びデータ処理方法
WO2012036077A1 (ja) * 2010-09-16 2012-03-22 ソニー株式会社 データ処理装置、及びデータ処理方法
WO2012050020A1 (ja) * 2010-10-14 2012-04-19 ソニー株式会社 データ処理装置、及びデータ処理方法
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WO2014123016A1 (ja) * 2013-02-08 2014-08-14 ソニー株式会社 データ処理装置、及びデータ処理方法
WO2014123017A1 (ja) * 2013-02-08 2014-08-14 ソニー株式会社 データ処理装置、及びデータ処理方法
WO2014123014A1 (ja) * 2013-02-08 2014-08-14 ソニー株式会社 データ処理装置、及びデータ処理方法
WO2014123018A1 (ja) * 2013-02-08 2014-08-14 ソニー株式会社 データ処理装置、及びデータ処理方法
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EP2214320A1 (en) 2010-08-04
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EP2214320A4 (en) 2015-03-18
US20100281329A1 (en) 2010-11-04
EP2966782A1 (en) 2016-01-13
TWI410055B (zh) 2013-09-21
TW200943736A (en) 2009-10-16
EP2961073A1 (en) 2015-12-30
EP2940875A1 (en) 2015-11-04
CN101911506A (zh) 2010-12-08
EP2958239A1 (en) 2015-12-23

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