WO2011121561A1 - Matériau thermoélectrique de puits quantique à super-réseau multicouche et module - Google Patents
Matériau thermoélectrique de puits quantique à super-réseau multicouche et module Download PDFInfo
- Publication number
- WO2011121561A1 WO2011121561A1 PCT/IB2011/051375 IB2011051375W WO2011121561A1 WO 2011121561 A1 WO2011121561 A1 WO 2011121561A1 IB 2011051375 W IB2011051375 W IB 2011051375W WO 2011121561 A1 WO2011121561 A1 WO 2011121561A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- thermoelectric
- legs
- layers
- layer
- alternating layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/81—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation
- H10D62/815—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW]
- H10D62/8161—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW] potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices
- H10D62/8162—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW] potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices having quantum effects only in the vertical direction, i.e. layered structures having quantum effects solely resulting from vertical potential variation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N10/00—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
- H10N10/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N10/00—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
- H10N10/80—Constructional details
- H10N10/85—Thermoelectric active materials
- H10N10/857—Thermoelectric active materials comprising compositions changing continuously or discontinuously inside the material
Definitions
- the alternating layers are electrically conducting layers and insulating (barrier) layers.
- the surface structure of the substrates needs not be crystalline. Preferably, it has a crystallographic match to the layers deposited onto the substrate. This crystallographic match leads to a good adhesion of the layers deposited on the substrate.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
La présente invention concerne un matériau thermoélectrique de puits quantique à super-réseau multicouche qui comprend au moins 10 couches alternées et dont l'épaisseur de chaque couche est inférieure à 50 nm, les couches alternées étant des couches électriquement conductrices et barrières, la structure de couche ne présentant aucune inter-diffusion discernable qui entraîne une désintégration ou une dissolution des limites de couche lors du traitement thermique à une température située dans la plage allant de 50 à 150 °C pendant une période d'au moins 100 heures, et la concentration en matériaux de dopage dans les couches conductrices va de 1018 à 1023 cm-3, et dans les couches barrières, va de 1013 à 1018 cm-3.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP10158928.1 | 2010-04-01 | ||
| EP10158928 | 2010-04-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2011121561A1 true WO2011121561A1 (fr) | 2011-10-06 |
Family
ID=44711411
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/IB2011/051375 Ceased WO2011121561A1 (fr) | 2010-04-01 | 2011-03-31 | Matériau thermoélectrique de puits quantique à super-réseau multicouche et module |
Country Status (1)
| Country | Link |
|---|---|
| WO (1) | WO2011121561A1 (fr) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6384312B1 (en) * | 2000-12-07 | 2002-05-07 | International Business Machines Corporation | Thermoelectric coolers with enhanced structured interfaces |
| US6627809B1 (en) * | 1999-11-10 | 2003-09-30 | Massachusetts Institute Of Technology | Superlattice structures having selected carrier pockets and related methods |
| US20050028857A1 (en) * | 2001-12-12 | 2005-02-10 | Saeid Ghamaty | Thermoelectric module with Si/SiC and B4C/B9C super-lattice legs |
| US20060144052A1 (en) * | 2005-01-06 | 2006-07-06 | Caterpillar Inc | Thermoelectric heat exchange element |
| US20070095379A1 (en) * | 2005-10-31 | 2007-05-03 | Taher Mahmoud A | Thermoelectric generator |
-
2011
- 2011-03-31 WO PCT/IB2011/051375 patent/WO2011121561A1/fr not_active Ceased
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6627809B1 (en) * | 1999-11-10 | 2003-09-30 | Massachusetts Institute Of Technology | Superlattice structures having selected carrier pockets and related methods |
| US6384312B1 (en) * | 2000-12-07 | 2002-05-07 | International Business Machines Corporation | Thermoelectric coolers with enhanced structured interfaces |
| US20050028857A1 (en) * | 2001-12-12 | 2005-02-10 | Saeid Ghamaty | Thermoelectric module with Si/SiC and B4C/B9C super-lattice legs |
| US20060144052A1 (en) * | 2005-01-06 | 2006-07-06 | Caterpillar Inc | Thermoelectric heat exchange element |
| US20070095379A1 (en) * | 2005-10-31 | 2007-05-03 | Taher Mahmoud A | Thermoelectric generator |
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