WO2012102785A3 - Memory cell with multiple sense mechanisms - Google Patents

Memory cell with multiple sense mechanisms Download PDF

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Publication number
WO2012102785A3
WO2012102785A3 PCT/US2011/063416 US2011063416W WO2012102785A3 WO 2012102785 A3 WO2012102785 A3 WO 2012102785A3 US 2011063416 W US2011063416 W US 2011063416W WO 2012102785 A3 WO2012102785 A3 WO 2012102785A3
Authority
WO
WIPO (PCT)
Prior art keywords
sense circuitry
memory device
circuitry
sense
specific
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2011/063416
Other languages
French (fr)
Other versions
WO2012102785A2 (en
Inventor
Yoshihito Koya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rambus Inc
Original Assignee
Rambus Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rambus Inc filed Critical Rambus Inc
Publication of WO2012102785A2 publication Critical patent/WO2012102785A2/en
Publication of WO2012102785A3 publication Critical patent/WO2012102785A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5678—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using amorphous/crystalline phase transition storage elements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5685—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using storage elements comprising metal oxide memory material, e.g. perovskites
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/005—Electric analogue stores, e.g. for storing instantaneous values with non-volatile charge storage, e.g. on floating gate or MNOS
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/065—Differential amplifiers of latching type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/067—Single-ended amplifiers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/08—Control thereof
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/06—Sense amplifier related aspects
    • G11C2207/063—Current sense amplifiers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/564—Miscellaneous aspects
    • G11C2211/5641—Multilevel memory having cells with different number of storage levels

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Read Only Memory (AREA)

Abstract

This disclosure provides sense amplifier technology for a memory device that uses multiple sense methods. In one implementation, a memory device is configured with both digital sense circuitry and analog sense circuitry, which can be alternatively or simultaneously used. In another implementation, use of the specific sense circuitry is dependent upon a mode or command. In another embodiment, the specific sense circuitry utilizes is responsive to predetermined tasks. In one contemplated application, a multilevel nonvolatile memory device (e.g., a flash memory device) uses (a) digital sense circuitry during program-verify operations, where it is desired to minimize power and maximize bitline impact and where latency is already to a certain extent fixed by programming operation and (b) analog sense circuitry in responding to read commands, to provide relatively high performance (at the expense of greater power consumption). Different sets of circuits can be used or circuitry can be shared and/or configured for multisense operation, depending on the specific design.
PCT/US2011/063416 2011-01-27 2011-12-06 Memory cell with multiple sense mechanisms Ceased WO2012102785A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201161436756P 2011-01-27 2011-01-27
US61/436,756 2011-01-27

Publications (2)

Publication Number Publication Date
WO2012102785A2 WO2012102785A2 (en) 2012-08-02
WO2012102785A3 true WO2012102785A3 (en) 2012-10-04

Family

ID=46581328

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2011/063416 Ceased WO2012102785A2 (en) 2011-01-27 2011-12-06 Memory cell with multiple sense mechanisms

Country Status (1)

Country Link
WO (1) WO2012102785A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3044460B1 (en) 2015-12-01 2018-03-30 Stmicroelectronics (Rousset) Sas PLAYBACK AMPLIFIER FOR MEMORY, ESPECIALLY EEPROM MEMORY
US11099781B2 (en) 2018-07-19 2021-08-24 Silicon Motion, Inc. Flash memory controller, flash memory module and associated electronic device
US11081168B2 (en) * 2019-05-23 2021-08-03 Hefei Reliance Memory Limited Mixed digital-analog memory devices and circuits for secure storage and computing
US11043277B1 (en) * 2020-05-07 2021-06-22 Micron Technology, Inc. Two multi-level memory cells sensed to determine multiple data values
CN115240732A (en) * 2022-07-29 2022-10-25 华中科技大学 A 1S1C memory data reading method and system

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6044004A (en) * 1998-12-22 2000-03-28 Stmicroelectronics, Inc. Memory integrated circuit for storing digital and analog data and method
US6714449B2 (en) * 2000-09-27 2004-03-30 Sandisk Corporation Sense amplifier suitable for analogue voltage levels
US20060083097A1 (en) * 2004-10-20 2006-04-20 Massimiliano Frulio Method and system for providing sensing circuitry in a multi-bank memory device
KR20090027458A (en) * 2007-09-12 2009-03-17 삼성전자주식회사 Semiconductor devices

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6044004A (en) * 1998-12-22 2000-03-28 Stmicroelectronics, Inc. Memory integrated circuit for storing digital and analog data and method
US6714449B2 (en) * 2000-09-27 2004-03-30 Sandisk Corporation Sense amplifier suitable for analogue voltage levels
US20060083097A1 (en) * 2004-10-20 2006-04-20 Massimiliano Frulio Method and system for providing sensing circuitry in a multi-bank memory device
KR20090027458A (en) * 2007-09-12 2009-03-17 삼성전자주식회사 Semiconductor devices

Also Published As

Publication number Publication date
WO2012102785A2 (en) 2012-08-02

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