WO2012177101A3 - 듀티 사이클 보정장치 - Google Patents

듀티 사이클 보정장치 Download PDF

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Publication number
WO2012177101A3
WO2012177101A3 PCT/KR2012/004999 KR2012004999W WO2012177101A3 WO 2012177101 A3 WO2012177101 A3 WO 2012177101A3 KR 2012004999 W KR2012004999 W KR 2012004999W WO 2012177101 A3 WO2012177101 A3 WO 2012177101A3
Authority
WO
WIPO (PCT)
Prior art keywords
duty cycle
signal
correction apparatus
cycle correction
widths
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2012/004999
Other languages
English (en)
French (fr)
Other versions
WO2012177101A2 (ko
Inventor
선종국
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LS Electric Co Ltd
Original Assignee
LSIS Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by LSIS Co Ltd filed Critical LSIS Co Ltd
Priority to CN201280031276.5A priority Critical patent/CN103620961A/zh
Priority to US14/127,876 priority patent/US20140125391A1/en
Publication of WO2012177101A2 publication Critical patent/WO2012177101A2/ko
Publication of WO2012177101A3 publication Critical patent/WO2012177101A3/ko
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/017—Adjustment of width or dutycycle of pulses
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
    • H03K5/1565—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern the output pulses having a constant duty cycle
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

듀티 사이클 보정장치가 개시된다. 본 발명의 장치는, 입력신호의 신호폭을 조정하고, 이 신호의 폭을 평균화하고, 이 신호를 반전한 후, 반전한 신호의 폭을 평균화하여, 평균화한 두 신호를 비교하고 그 차이를 출력한다.
PCT/KR2012/004999 2011-06-24 2012-06-25 듀티 사이클 보정장치 Ceased WO2012177101A2 (ko)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201280031276.5A CN103620961A (zh) 2011-06-24 2012-06-25 用于校正占空比的装置
US14/127,876 US20140125391A1 (en) 2011-06-24 2012-06-25 Duty cycle correction apparatus

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020110061881A KR101309465B1 (ko) 2011-06-24 2011-06-24 듀티 사이클 보정장치
KR10-2011-0061881 2011-06-24

Publications (2)

Publication Number Publication Date
WO2012177101A2 WO2012177101A2 (ko) 2012-12-27
WO2012177101A3 true WO2012177101A3 (ko) 2013-03-28

Family

ID=47423123

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2012/004999 Ceased WO2012177101A2 (ko) 2011-06-24 2012-06-25 듀티 사이클 보정장치

Country Status (4)

Country Link
US (1) US20140125391A1 (ko)
KR (1) KR101309465B1 (ko)
CN (1) CN103620961A (ko)
WO (1) WO2012177101A2 (ko)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9492741B2 (en) 2013-05-22 2016-11-15 Microsoft Technology Licensing, Llc Wireless gaming protocol
JP2015012352A (ja) * 2013-06-27 2015-01-19 マイクロン テクノロジー， インク． 半導体装置
US9306547B2 (en) * 2013-12-12 2016-04-05 International Business Machines Corporation Duty cycle adjustment with error resiliency
US10447247B1 (en) * 2018-04-27 2019-10-15 Sandisk Technologies Llc Duty cycle correction on an interval-by-interval basis
CN110957998B (zh) * 2019-12-02 2020-08-11 翱捷智能科技(上海)有限公司 一种精确校正时钟信号占空比的电路
US11527195B2 (en) * 2021-04-22 2022-12-13 Novatek Microelectronics Corp. Display control system and related method of signal transmission
US11509296B2 (en) * 2021-04-25 2022-11-22 Novatek Microelectronics Corp. Clock generator for frequency multiplication
US11671085B2 (en) 2021-11-01 2023-06-06 Nxp B.V. Circuit to correct duty cycle and phase error of a differential signal with low added noise

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100525080B1 (ko) * 1999-02-05 2005-11-01 매그나칩 반도체 유한회사 평균 듀티 싸이클 교정기
US20060091922A1 (en) * 2004-04-30 2006-05-04 Alessandro Minzoni Duty cycle correction
KR100918263B1 (ko) * 2008-11-04 2009-09-21 주식회사 파이칩스 듀티 사이클 보정장치
KR20100033778A (ko) * 2008-09-22 2010-03-31 주식회사 하이닉스반도체 듀티 보정 회로 및 이를 포함하는 클럭 생성 회로

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7019574B2 (en) * 2004-01-29 2006-03-28 Schroedinger Karl Circuit and method for correction of the duty cycle value of a digital data signal
TWI304293B (en) * 2005-12-23 2008-12-11 Ind Tech Res Inst Duty cycle corrector circuit with widely operating range
JP5231289B2 (ja) * 2009-03-02 2013-07-10 ルネサスエレクトロニクス株式会社 デューティ比補正回路及びデューティ比補正方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100525080B1 (ko) * 1999-02-05 2005-11-01 매그나칩 반도체 유한회사 평균 듀티 싸이클 교정기
US20060091922A1 (en) * 2004-04-30 2006-05-04 Alessandro Minzoni Duty cycle correction
KR20100033778A (ko) * 2008-09-22 2010-03-31 주식회사 하이닉스반도체 듀티 보정 회로 및 이를 포함하는 클럭 생성 회로
KR100918263B1 (ko) * 2008-11-04 2009-09-21 주식회사 파이칩스 듀티 사이클 보정장치

Also Published As

Publication number Publication date
US20140125391A1 (en) 2014-05-08
KR101309465B1 (ko) 2013-09-23
WO2012177101A2 (ko) 2012-12-27
KR20130001023A (ko) 2013-01-03
CN103620961A (zh) 2014-03-05

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