WO2013015548A3 - Ldpc 부호화, 복호화 방법 및 그 방법을 이용하는 장치 - Google Patents

Ldpc 부호화, 복호화 방법 및 그 방법을 이용하는 장치 Download PDF

Info

Publication number
WO2013015548A3
WO2013015548A3 PCT/KR2012/005522 KR2012005522W WO2013015548A3 WO 2013015548 A3 WO2013015548 A3 WO 2013015548A3 KR 2012005522 W KR2012005522 W KR 2012005522W WO 2013015548 A3 WO2013015548 A3 WO 2013015548A3
Authority
WO
WIPO (PCT)
Prior art keywords
bit sequence
ldpc encoding
information bit
generating
same
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/KR2012/005522
Other languages
English (en)
French (fr)
Other versions
WO2013015548A2 (ko
Inventor
신동준
김성래
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Industry University Cooperation Foundation Hanyang University
Original Assignee
Industry University Cooperation Foundation Hanyang University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Industry University Cooperation Foundation Hanyang University filed Critical Industry University Cooperation Foundation Hanyang University
Priority to US14/234,714 priority Critical patent/US9219501B2/en
Publication of WO2013015548A2 publication Critical patent/WO2013015548A2/ko
Publication of WO2013015548A3 publication Critical patent/WO2013015548A3/ko
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1148—Structural properties of the code parity-check or generator matrix
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/611—Specific encoding aspects, e.g. encoding by means of decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/61—Aspects and characteristics of methods and arrangements for error correction or error detection, not provided for otherwise
    • H03M13/618—Shortening and extension of codes

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Error Detection And Correction (AREA)

Abstract

LDPC 부호화, 복호화 방법 및 그 방법을 이용하는 장치가 개시된다. 개시된 방법은 전체 정보 비트로부터 부호화할 정보 비트들을 선택하여 정보 비트 시퀀스를 생성하는 단계(a); 상기 정보 비트 시퀀스의 미리 설정된 적어도 하나의 위치에 미리 설정된 오류 마루 방지 비트를 삽입하여 수정 정보 비트 시퀀스를 생성하는 단계(b); 상기 수정 정보 비트 시퀀스에 기초하여 패리티 검사 비트를 생성하는 단계(c); 및 상기 수정 정보 비트 시퀀스 및 상기 패리티 검사 비트를 이용하여 부호화하는 단계(d)를 포함한다. 개시된 방법에 의하면, LDPC 부호화 및 복호화에서 오류 마루 현상으로 인한 성능 저하를 방지할 수 있는 장점이 있다
PCT/KR2012/005522 2011-07-25 2012-07-12 Ldpc 부호화, 복호화 방법 및 그 방법을 이용하는 장치 Ceased WO2013015548A2 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/234,714 US9219501B2 (en) 2011-07-25 2012-07-12 LDPC encoding/decoding method and device using same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR20110073765 2011-07-25
KR10-2011-0073765 2011-07-25

Publications (2)

Publication Number Publication Date
WO2013015548A2 WO2013015548A2 (ko) 2013-01-31
WO2013015548A3 true WO2013015548A3 (ko) 2013-03-21

Family

ID=47601609

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2012/005522 Ceased WO2013015548A2 (ko) 2011-07-25 2012-07-12 Ldpc 부호화, 복호화 방법 및 그 방법을 이용하는 장치

Country Status (3)

Country Link
US (1) US9219501B2 (ko)
KR (2) KR20130012550A (ko)
WO (1) WO2013015548A2 (ko)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI619353B (zh) * 2013-07-03 2018-03-21 Lsi公司 在低密度奇偶性校驗（ｌｄｐｃ）解碼器中之對數相似比（ｌｌｒ）抑制
US20150222291A1 (en) * 2014-02-05 2015-08-06 Kabushiki Kaisha Toshiba Memory controller, storage device and memory control method
KR101530859B1 (ko) * 2014-03-31 2015-06-23 한양대학교 산학협력단 오류 정정 부호의 부호화, 복호화 장치 및 그를 이용한 저장 장치
CN110661534B (zh) * 2018-06-29 2024-06-18 中兴通讯股份有限公司 一种提高Turbo译码性能的方法、装置及计算机设备
WO2020022539A1 (ko) * 2018-07-27 2020-01-30 엘지전자 주식회사 Ldpc코드의 인코딩 및 디코딩을 수행하는 방법과 이를 위한 통신 장치
US11595155B2 (en) 2019-01-09 2023-02-28 Lg Electronics Inc. Method for decoding low density parity check (LDPC)-coded signal, and terminal therefor

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030074626A1 (en) * 2001-08-01 2003-04-17 International Business Machines Corporation Decoding low density parity check codes
KR20080001581A (ko) * 2006-06-28 2008-01-03 삼성전자주식회사 정보 부호화 장치, 정보 복호 장치, 정보 부호화 방법 및정보 복호 방법
US20100050044A1 (en) * 2007-01-23 2010-02-25 Panasonic Corporation Radio communication apparatus and temporary bit insertion method
US20100162073A1 (en) * 2008-12-18 2010-06-24 Samsung Electronics Co., Ltd. Bit mapping/demapping method and apparatus for communication system

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5815514A (en) * 1996-02-09 1998-09-29 Overland Data, Inc. Variable rate bit inserter for digital data storage
US8037398B2 (en) * 2007-07-02 2011-10-11 Seagate Technology System for precoding parity bits to meet predetermined modulation constraints
US8726137B2 (en) * 2009-02-02 2014-05-13 Telefonaktiebolaget L M Ericsson (Publ) Encoding and decoding methods for expurgated convolutional codes and convolutional turbo codes
CN102224679B (zh) * 2009-09-25 2014-04-02 松下电器产业株式会社 编码装置、解码装置、编码方法、解码方法及通信系统

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030074626A1 (en) * 2001-08-01 2003-04-17 International Business Machines Corporation Decoding low density parity check codes
KR20080001581A (ko) * 2006-06-28 2008-01-03 삼성전자주식회사 정보 부호화 장치, 정보 복호 장치, 정보 부호화 방법 및정보 복호 방법
US20100050044A1 (en) * 2007-01-23 2010-02-25 Panasonic Corporation Radio communication apparatus and temporary bit insertion method
US20100162073A1 (en) * 2008-12-18 2010-06-24 Samsung Electronics Co., Ltd. Bit mapping/demapping method and apparatus for communication system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
ZENGYA ZHANG ET AL., IEEE TRANSACTIONS ON COMMUNICATIONS, vol. 57, no. ISSUE:, 30 November 2009 (2009-11-30), pages 3258 - 3268 *

Also Published As

Publication number Publication date
US9219501B2 (en) 2015-12-22
KR20130012549A (ko) 2013-02-04
US20140173375A1 (en) 2014-06-19
WO2013015548A2 (ko) 2013-01-31
KR20130012550A (ko) 2013-02-04

Similar Documents

Publication Publication Date Title
WO2013075125A3 (en) Systems, methods, and devices for multi-tiered error correction
WO2013019560A3 (en) Checksum using sums of permutation sub-matrices
WO2013075128A3 (en) Data encoder and decoder using memory-specific parity-check matrix
WO2007142476A3 (en) Method of encoding/decoding using low density check code matrix
WO2007057885A3 (en) Method and device for multi phase error-correction
WO2012138662A3 (en) Encoding and decoding techniques using low-density parity check codes
WO2009102146A3 (en) Method and apparatus for channel encoding and decoding in a communication system using low-density parity-check codes
EP3748861A3 (en) Check bit aided list decoding
WO2012027400A3 (en) Determination of parity-check matrices suitable for iterative decoding of linear block codes
BRPI0813344A2 (pt) Circuito de codificação de erro, e, método para codificar em erro em uma seqüência de bit de entrada.
GB201306562D0 (en) Decoding in solid stsate memory devices
WO2011071293A3 (en) Method and apparatus for channel encoding and decoding in a communication system using a low-density parity check code
WO2006135877A3 (en) Forward error-correcting (fec) coding and streaming
MY191686A (en) Data processing apparatus and data processing method
GB2524426A (en) Unequal error protection scheme for headerized sub data sets
KR101882157B1 (ko) 부호화 장치, 부호화 방법, 복호 장치, 복호 방법, 및 컴퓨터 판독가능한 기억 매체
WO2013043968A3 (en) Power-optimized decoding of linear codes
GB2510492A (en) Apparatus, system, and method for generating and decoding a longer linear block codeword using a shorter block length
WO2010080844A3 (en) System and method for packet acknowledgment using an acknowledgment codebook
WO2011062424A3 (en) Method and apparatus for transmitting and receiving data in a communication system
MX2020003792A (es) Entrelazador de bits para palabra codigo de revision de paridad de baja densidad que tiene una longitud de 16200 y un indice de codigo de 4/15 y mapeo de 16 simbolos, y metodo para entrelazar bits que utiliza el mismo.
MX369485B (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
WO2010009232A3 (en) Methods and systems for turbo decoding in a wireless communication system
MX2016003220A (es) Dispositivo de procesamiento de datos y metodo de procesamiento de datos.
DE602007000915D1 (de) Zugehörige vorrichtungen

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 12817956

Country of ref document: EP

Kind code of ref document: A2

WWE Wipo information: entry into national phase

Ref document number: 14234714

Country of ref document: US

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 12817956

Country of ref document: EP

Kind code of ref document: A2