WO2013189486A1 - Proceédé de fabrication d'une structure de pistes conductrices tridimensionnelle et structure de pistes conductrices fabriquée selon ce procédé - Google Patents
Proceédé de fabrication d'une structure de pistes conductrices tridimensionnelle et structure de pistes conductrices fabriquée selon ce procédé Download PDFInfo
- Publication number
- WO2013189486A1 WO2013189486A1 PCT/DE2013/100216 DE2013100216W WO2013189486A1 WO 2013189486 A1 WO2013189486 A1 WO 2013189486A1 DE 2013100216 W DE2013100216 W DE 2013100216W WO 2013189486 A1 WO2013189486 A1 WO 2013189486A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- coating
- conductor track
- track structure
- dimensional
- carrier material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/105—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by conversion of non-conductive material on or in the support into conductive material, e.g. by using an energy beam
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0284—Details of three-dimensional rigid printed circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
- H05K2203/107—Using laser light
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1157—Using means for chemical reduction
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing of the conductive pattern
- H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
- H05K3/246—Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating
Definitions
- a method for producing a three-dimensional interconnect structure and a conductor track structure produced by this method is to produce a three-dimensional interconnect structure and a conductor track structure produced by this method.
- the invention relates to a method for producing a three-dimensional strip conductor structure on a dielectric carrier material. Furthermore, the invention relates to a conductor track structure produced by this method.
- the advantages of the MID technology over conventional methods of circuit carrier generation lie in the improved freedom of design and environmental compatibility as well as in a rationalization potential with regard to the manufacturing process of the end product.
- the improved design freedom and the integration of electrical and mechanical functions in an injection molded part can lead to a miniaturization of the assembly.
- new functions can be realized and any shapes can be designed.
- thermoplastic material is doped with a laser-activatable additive.
- a laser beam activates the additive in the writing process in accordance with the course of the subsequent printed conductor structure and at the same time generates a microrough track.
- the metal particles of this trace form the seeds for the subsequent metallization.
- electroless copper bath the printed conductor layers are formed precisely on these tracks.
- nickel and a gold finish can be applied.
- metallization causes a significant proportion of the total cost of the manufacturing process.
- No. 7,087,523 B2 describes the production of a three-dimensional strip conductor structure on a carrier material.
- gold nanoparticles in the form of droplets are deposited in a printing process as a suspension on a flat surface of the carrier material and exposed to a selective electromagnetic radiation. Due to the thermal energy input, there is a melting of the particles, wherein the liquid is evaporated. Subsequently, the melt solidifies to the desired conductor track structure.
- the invention has for its object to provide a way to further improve the process and reduce the manufacturing cost.
- the method should substantially increase the cost-effectiveness in the production of three-dimensional printed conductor structures.
- the invention has the object to provide a printed conductor structure produced by this method.
- the first object is achieved by a method according to the features of claim 1.
- the further embodiment of the invention can be found in the dependent claims.
- a method is provided in which the carrier material is at least partially provided with at least one planar coating and the coating is exposed only in a partial region of a selective electromagnetic radiation, so that the effective surface of the electromagnetic radiation is smaller than the coating surface, so as to selective radiation exposure by the introduced energy to achieve a United of contained in the coating or generated in situ particles, which form in this way the desired three-dimensional wiring pattern.
- the essential idea of the invention is therefore based on a full-surface application of the coating, for example as a paint application, and a selective electromagnetic irradiation of the coating.
- a significant difference of the invention over the prior art is in particular that the application of the coating over the entire surface can be made on almost arbitrarily contoured, three-dimensional surfaces, while the action on the thus created three-dimensional surface coating only selectively, so limited to certain area proportions ,
- the coating preferably contains as a substantial proportion of material metal oxides which are present in the coating or generated during the irradiation or which have organometallic compounds as a substantial proportion of material, the selective energy is introduced into the coating by the selective electromagnetic radiation to the chemical Trigger locally reaction between the reaction partners contained in the coating or incurred or released.
- metal oxides in particular nanoscale copper oxides are applied with a suitable coating of a reducing agent as a coating on the substrate and selectively so limited to the surface portion of the produced conductor track structure exposed to electromagnetic radiation, so that the metal oxide is reduced to elemental metal.
- a suitable coating of a reducing agent as a coating on the substrate and selectively so limited to the surface portion of the produced conductor track structure exposed to electromagnetic radiation, so that the metal oxide is reduced to elemental metal.
- the area of action of the electromagnetic radiation corresponds to the coating of the printed conductor to be produced.
- the coating thus fulfills the dual function of reducing agent on the one hand and as a protective layer on the other to avoid spontaneous sintering of the active particles.
- Another, also particularly promising embodiment of the invention is also achieved by an electrostatic charge of the metal oxides or their coating.
- a positive or negative charge which is partially canceled by the action of the electromagnetic radiation, induces the sintering of the particles by removing the repulsive forces.
- supplementary constituents of the coating lead to steric hindrance and thus to a considerable delay in the reactions. By these components are changed by selective energy supply by means of electromagnetic radiation, there is an application of steric hindrance and thus to the desired sintering of the metallic particles.
- such particles are contained in the coating, which particles have an extent of less than 1 ⁇ m in at least one direction. As a result, the sintering process is significantly favored.
- the use of a laser as electromagnetic radiation source proves to be particularly practical which, due to its optimum suitability for three-dimensional writing processing and its problem-free control of the power, in conjunction with controllability of the energy input, is particularly suitable for targeted energy input.
- the application of the coating can be realized by means of known contourless processes, wherein the coating process preferably takes place in the liquid phase.
- the coating can also be applied as a powder.
- a particularly useful embodiment of the method for the three-dimensional coating is realized by surface application methods such as spraying, pad printing or dipping.
- a one or more repetition of the cycle comprising the application of the coating and the selective electromagnetic irradiation for reinforcing the conductive layer can be advantageously realized in order to increase the strength of the conductor track structure.
- the conductor track structure is amplified without external current or galvanic, so as to be able to set desired conductor track strengths and to achieve a targeted layer structure.
- an intermediate layer in particular a primer layer
- the scope can be extended to almost any surface and also the adhesive strength can be significantly improved.
- adhesion-promoting components can be added to the coating from the outset. In particular, therefore, an adhesion promoter can be contained in the coating.
- non-irradiated areas of the coating are removed by means of an aqueous or organic solvent and the non-irradiated material portions of the coating are dissolved, so that they can be reused for the production of further coatings. This improves the economy of the process.
- the second-mentioned object to provide a three-dimensional interconnect structure produced by the method, is preferably realized by an antenna, a sensor or an electromagnetic shield, wherein the contours of the interconnect structure can be optimally adapted to the carrier material embodied, for example, as a molded part.
- carrier material Although a variety of materials are suitable as a carrier material, in particular in conjunction with a primer layer, carrier materials having a substantial proportion of polymers, glasses and ceramics have proven to be particularly practical.
- 1 a to 1 d show a sequence of the method steps in carrying out the method.
- FIGS. 1 a to 1 d The method according to the invention for producing a printed conductor structure 4 on a dielectric carrier material 1 is described below with reference to FIGS. 1 a to 1 d, not a three-dimensional, but a flat carrier material 1 being shown for the sake of clarity, differing from the preferred application in FIG.
- the carrier material 1 is first provided with a two-dimensional coating 2.
- the coating 2 contains particles which contain metal oxides as a substantial proportion of material.
- metal oxides for example, nanoscale copper oxides which are partially or completely coated with reducing agents are suitable for this purpose.
- a spray method not shown here is used for applying the coating 2, for example, a spray method not shown here is used.
- the coating 2 is selectively exposed to electromagnetic radiation from a laser 3.
- the conductor track structure 4 correspondingly forms the radiation input of the laser 3.
- Coating 2 removed by means of an aqueous or organic solvent is suitable for a large number of typical applications, the conductor track structure 4 can be amplified, for example, without external current or galvanically. Of course, the cycle with the application of the coating 2 and the selective irradiation can also be repeated.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Chemically Coating (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP13740202.0A EP2862425A1 (fr) | 2012-06-19 | 2013-06-13 | Proceédé de fabrication d'une structure de pistes conductrices tridimensionnelle et structure de pistes conductrices fabriquée selon ce procédé |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102012105317.0 | 2012-06-19 | ||
| DE102012105317 | 2012-06-19 | ||
| DE102012105765.6 | 2012-06-29 | ||
| DE102012105765A DE102012105765A1 (de) | 2012-06-19 | 2012-06-29 | Verfahren zur Herstellung einer dreidimensionalen Leiterbahnstruktur sowie eine nach diesem Verfahren hergestellte Leiterbahnstruktur |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2013189486A1 true WO2013189486A1 (fr) | 2013-12-27 |
Family
ID=49667899
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/DE2013/100216 Ceased WO2013189486A1 (fr) | 2012-06-19 | 2013-06-13 | Proceédé de fabrication d'une structure de pistes conductrices tridimensionnelle et structure de pistes conductrices fabriquée selon ce procédé |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP2862425A1 (fr) |
| DE (1) | DE102012105765A1 (fr) |
| WO (1) | WO2013189486A1 (fr) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10472536B2 (en) | 2014-06-30 | 2019-11-12 | Mitsubishi Engineering-Plastics Corporation | Composition for forming laser direct structuring layer, kit, and method for manufacturing resin molded article with plated layer |
| WO2021156793A1 (fr) * | 2020-02-05 | 2021-08-12 | Harting Ag | Porteuse composante pour agencer des composants électriques sur une carte de circuit imprimé |
| WO2021232817A1 (fr) * | 2020-05-18 | 2021-11-25 | 广东小天才科技有限公司 | Procédé de fabrication de circuit et antenne lds |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102017108437B4 (de) | 2017-04-20 | 2020-07-09 | Gottfried Wilhelm Leibniz Universität Hannover | Elektrische Schaltungsstruktur und Verfahren zu deren Herstellung |
| TWI616999B (zh) * | 2017-07-20 | 2018-03-01 | Atp Electronics Taiwan Inc. | 具有堆疊式積體電路晶片之記憶體製作方法 |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4159414A (en) * | 1978-04-25 | 1979-06-26 | Massachusetts Institute Of Technology | Method for forming electrically conductive paths |
| US7087523B2 (en) | 2001-01-10 | 2006-08-08 | The Regents Of The University Of California | Method for producing a structure using nanoparticles |
| US20090181184A1 (en) | 2007-05-24 | 2009-07-16 | Pope Dave S | Method for Reducing Thin Films on Low Temperature Substrates |
| US20090297802A1 (en) * | 2008-05-29 | 2009-12-03 | Chidella Krishna Sastry | Process for making self-patterning substrates and the product thereof |
| US7820097B2 (en) | 2004-11-24 | 2010-10-26 | Ncc Nano, Llc | Electrical, plating and catalytic uses of metal nanomaterial compositions |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102004037524A1 (de) * | 2004-07-29 | 2006-03-23 | Samsung SDI Co., Ltd., Suwon | Display und Verfahren zur Herstellung eines Substrats für ein Display |
| US10231344B2 (en) * | 2007-05-18 | 2019-03-12 | Applied Nanotech Holdings, Inc. | Metallic ink |
-
2012
- 2012-06-29 DE DE102012105765A patent/DE102012105765A1/de not_active Withdrawn
-
2013
- 2013-06-13 WO PCT/DE2013/100216 patent/WO2013189486A1/fr not_active Ceased
- 2013-06-13 EP EP13740202.0A patent/EP2862425A1/fr not_active Withdrawn
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4159414A (en) * | 1978-04-25 | 1979-06-26 | Massachusetts Institute Of Technology | Method for forming electrically conductive paths |
| US7087523B2 (en) | 2001-01-10 | 2006-08-08 | The Regents Of The University Of California | Method for producing a structure using nanoparticles |
| US7820097B2 (en) | 2004-11-24 | 2010-10-26 | Ncc Nano, Llc | Electrical, plating and catalytic uses of metal nanomaterial compositions |
| US20090181184A1 (en) | 2007-05-24 | 2009-07-16 | Pope Dave S | Method for Reducing Thin Films on Low Temperature Substrates |
| US20090297802A1 (en) * | 2008-05-29 | 2009-12-03 | Chidella Krishna Sastry | Process for making self-patterning substrates and the product thereof |
Non-Patent Citations (1)
| Title |
|---|
| See also references of EP2862425A1 * |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10472536B2 (en) | 2014-06-30 | 2019-11-12 | Mitsubishi Engineering-Plastics Corporation | Composition for forming laser direct structuring layer, kit, and method for manufacturing resin molded article with plated layer |
| WO2021156793A1 (fr) * | 2020-02-05 | 2021-08-12 | Harting Ag | Porteuse composante pour agencer des composants électriques sur une carte de circuit imprimé |
| CN115024024A (zh) * | 2020-02-05 | 2022-09-06 | 浩亭股份有限公司 | 用于将电气组件布置在印刷电路板上的组件载体 |
| KR20220134773A (ko) * | 2020-02-05 | 2022-10-05 | 하르팅 아게 | 회로 기판상에 전기 부품을 배치하기 위한 부품 캐리어 |
| US11770896B2 (en) | 2020-02-05 | 2023-09-26 | Harting Ag | Component carrier for arranging electrical components on a circuit board |
| KR102744536B1 (ko) * | 2020-02-05 | 2024-12-20 | 하르팅 아게 | 회로 기판상에 전기 부품을 배치하기 위한 부품 캐리어 |
| WO2021232817A1 (fr) * | 2020-05-18 | 2021-11-25 | 广东小天才科技有限公司 | Procédé de fabrication de circuit et antenne lds |
Also Published As
| Publication number | Publication date |
|---|---|
| EP2862425A1 (fr) | 2015-04-22 |
| DE102012105765A1 (de) | 2013-12-19 |
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