WO2014201823A1 - Procédé de test de cog - Google Patents

Procédé de test de cog Download PDF

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Publication number
WO2014201823A1
WO2014201823A1 PCT/CN2013/089456 CN2013089456W WO2014201823A1 WO 2014201823 A1 WO2014201823 A1 WO 2014201823A1 CN 2013089456 W CN2013089456 W CN 2013089456W WO 2014201823 A1 WO2014201823 A1 WO 2014201823A1
Authority
WO
WIPO (PCT)
Prior art keywords
test
interface
display panel
test board
driver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2013/089456
Other languages
English (en)
Chinese (zh)
Inventor
刘蕊
金亨奎
张�浩
时凌云
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing BOE Optoelectronics Technology Co Ltd
Original Assignee
Beijing BOE Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing BOE Optoelectronics Technology Co Ltd filed Critical Beijing BOE Optoelectronics Technology Co Ltd
Publication of WO2014201823A1 publication Critical patent/WO2014201823A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13452—Conductors connecting driver circuitry and terminals of panels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/1306—Details
    • G02F1/1309—Repairing; Testing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays

Definitions

  • the present disclosure relates to the field of liquid crystal display technologies, and in particular, to a chip fixed on a glass substrate.
  • the final production of the display module from the initial glass requires a plurality of test processes: after the formation of the array substrate, the performance of the array substrate needs to be tested, and the performance of the liquid crystal cell is tested after the liquid crystal cell is formed, wherein The performance of the liquid crystal cell is tested by loading a DC signal on a special test point on the display panel after the display panel is prepared.
  • the performance of the display module needs to be tested, that is, normal. Test the picture and other performance after lighting the product.
  • the traditional COG test is based on the built-in Self Test (BIST) mode test method.
  • the BIST mode test is performed in the display module state, and the timer/counter control register in the driver IC is required.
  • TCON Internally comes with random access memory (RAM).
  • the PCB can provide VGH, VGL, AVDD, Gamma and other boost and voltage processing circuits without the need to provide data via the Low Voltage Differential Signaling (LVDS) interface, or the Mobile Industry Processor Interface (MIPI), or the Red, Green, and Blue interfaces. After power-on, TCON will output some graphics, which is the BIST mode test method.
  • the BIST mode test method requires TCON to have random access memory (RAM) to store some graphics. If TCON does not have built-in RAM and BIST test, then an external electrical erasable can be set outside the driver IC. Programming read-only memory (EEPROM), which undoubtedly increases the cost.
  • the main object of the present disclosure is to provide a COG test method, which can eliminate the production of FPC and PCBA, thereby saving cost and human resources.
  • embodiments of the present disclosure provide a COG testing method, the method comprising:
  • Step 1 Set a test point on the display panel
  • Step 2 The external test board establishes communication with the driving IC on the display panel through the test point;
  • Step 3 Display a graphic generated by the test board on a display panel.
  • connection state of the chip and the glass substrate can be judged based on the display result of the graphic on the display panel.
  • test points include, for example, a serial peripheral interface (SPI) or an integrated circuit bus (I2C) interface.
  • SPI serial peripheral interface
  • I2C integrated circuit bus
  • the SPI or I2C interface includes: a digital serial interface (SDI), a clock signal line (SCL) interface, and a chip select line (CSB) interface.
  • SDI digital serial interface
  • SCL clock signal line
  • CSB chip select line
  • the test point may further include: a VCC interface and a GND interface.
  • the method for example, further includes: an external test board powering the drive IC through the VCC interface.
  • the test board is correspondingly provided with a pin corresponding to the test point of the display panel.
  • the test board is provided with a VCC pin, a GND pin, an SDI pin, an SCL pin, and a CSB pin, respectively.
  • the drive IC is, for example, integrated with a function of a timer/counter control register.
  • the displaying the graphics generated by the test board on the display panel includes: Step A: initializing the driving IC by using a test board;
  • Step B generating a test pattern through the test board, and transmitting the graphic to the driving IC through an SPI or an I2C interface;
  • Step C displaying the graphic on the display panel by the driving IC.
  • the driver IC and the glass substrate are in good contact, the pattern produced by the test board will be displayed on the display panel.
  • the test board is provided with, for example, a single chip, and the single chip is connected by the SPI or the I2C.
  • the port communicates with the driver IC.
  • test board initializes the driving IC and generates a graphic for testing:
  • the test board initializes the drive IC by the single chip microcomputer, and compiles the graphics required for testing by the single chip microcomputer.
  • a test point is set on a display panel, and an external test board establishes communication with a driving IC on the display panel through the test point, and displays a graphic generated by the test board on the display panel.
  • the present disclosure can perform COG test before the display module is manufactured, does not need to drive the IC to bring the RAM, or does not need to store the picture in the RAM, only needs to set the test point on the display panel, and the external test board only needs to pass the test point.
  • the serial peripheral interface (SPI) or the integrated circuit bus (I2C) interface establishes communication with the driver IC, and displays the graphics generated by the test board on the display panel, so that the COG test can be implemented by the driver IC. If the COG test is poor, there is no need to make FPC and PCBA, which not only saves costs, but also saves manpower and material resources.
  • FIG. 1 is a schematic diagram showing the flow of a COG testing method according to an embodiment of the present invention
  • FIG. 2 is a schematic plan view showing a display panel according to an embodiment of the invention. detailed description
  • the basic idea of the present disclosure is to: set a test point on the display panel, the external test board establishes communication with the drive IC on the display panel through the test point, and displays the graphic generated by the test board on the display panel.
  • the test point is an SPI or an I2C interface, and may include: a digital serial interface (SDI), a clock signal line (SCL) interface, and a chip select line (CSB) interface.
  • SDI digital serial interface
  • SCL clock signal line
  • CSB chip select line
  • the test points may further include: a power supply (VCC) interface and a ground (GND) interface.
  • FIG. 1 is a schematic diagram of a flow of a COG testing method according to an embodiment of the present disclosure. As shown in FIG. 1, the method includes the following steps:
  • Step 101 Setting a test point on the display panel
  • the output from the driving IC is set on the display panel, That is, the SPI or I2C interface connected to the drive ic, as shown in FIG. 2, the test point may be disposed at a lower edge position of the display panel, wherein the SPI or I2C interface may include: SDI, SCL interface, CSB interface Wait.
  • the test point may further include: two test points of a VCC interface and a GND interface connected to the driving IC.
  • An external test board can supply power to the drive IC through the VCC interface, thereby driving a power supply circuit inside the IC to generate voltages required by display panels such as VGH, VGL, AVDD, and AVEE.
  • test points are set once before the COG test, and need not be reset during the subsequent test.
  • the driver IC integrates a TCON function, and includes a 3-wire interface such as an SPI or an I2C interface in addition to a conventional RGB interface, an LVDS interface, an MIPI, and a CPU interface.
  • a 3-wire interface such as an SPI or an I2C interface in addition to a conventional RGB interface, an LVDS interface, an MIPI, and a CPU interface.
  • Step 102 The external test board establishes communication with the driving IC on the display panel through the test point;
  • an external test board such as a test fixture (jig) communicates with the driver IC via an SPI or I2C interface.
  • the test board is exemplified by a test fixture, and the test fixture is required to have pins corresponding to the above interfaces of the display panel, for example, five pins such as VCC, GND, SDL SCL, and CSB.
  • the five pins are respectively connected to the VCC interface, the GND interface, the SDI, the SCL interface, and the CSB interface of the driving IC.
  • Step 103 Display a graphic generated by the test board on a display panel
  • the test board first needs to initialize the driver IC, and then generate the test pattern, and transmit it to the driver IC through the SPI or I2C interface, and display the test board on the display panel through the driver IC. Graphics.
  • the driver IC and the glass substrate are in good contact, the pattern produced by the test board will be displayed on the display panel. Therefore, the connection of the driving IC to the glass substrate can be judged based on the display result of the graphic on the display panel.
  • the test board is provided with a single chip, and the single chip communicates with the driving IC through the SPI or I2C interface.
  • the test board initializes the driving IC through the single chip, and is required by the single chip compiling test. Graphics.
  • the present disclosure performs the COG test before the display module is manufactured, does not need to drive the IC to bring the RAM, or does not need to store the picture in the RAM, only needs to set the test point on the display panel, and the external test board only needs to pass the test point.
  • the SPI or I2C interface establishes communication with the driver IC, and the graphics generated by the test board are displayed on the display panel, so that the COG test can be realized by the driver IC. If the COG test is poor, there is no need to make FPC and PCBA, which not only saves cost, but also saves manpower and material resources.

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

La présente invention concerne un procédé de test de COG consistant à : définir un point de test sur un panneau d'affichage (101) ; une plaque de test externe communiquant avec un circuit intégré de commande sur le panneau d'affichage au moyen du point de test (102) ; et afficher, sur le panneau d'affichage, une image générée sur la plaque de test (103). La présente invention permet de réaliser un test de COG sans fabrication de FPC ni assemblage de PCBA, ce qui permet d'économiser le coût et de conserver le travail manuel.
PCT/CN2013/089456 2013-06-17 2013-12-14 Procédé de test de cog Ceased WO2014201823A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201310238958.XA CN104238152A (zh) 2013-06-17 2013-06-17 一种cog测试方法
CN201310238958.X 2013-06-17

Publications (1)

Publication Number Publication Date
WO2014201823A1 true WO2014201823A1 (fr) 2014-12-24

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2013/089456 Ceased WO2014201823A1 (fr) 2013-06-17 2013-12-14 Procédé de test de cog

Country Status (2)

Country Link
CN (1) CN104238152A (fr)
WO (1) WO2014201823A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105448221A (zh) * 2015-12-29 2016-03-30 上海中航光电子有限公司 显示装置及其测试方法
CN107462825B (zh) * 2017-08-08 2019-11-29 吉林师范大学 用于检测fpca和pcba的信号输出方法及设备
CN108022556B (zh) * 2018-01-19 2021-05-14 昆山国显光电有限公司 防止显示屏老化的方法及驱动芯片、显示屏

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1503040A (zh) * 2002-11-19 2004-06-09 三星电子株式会社 液晶显示器及其测试方法
CN101082718A (zh) * 2006-05-25 2007-12-05 Nec液晶技术株式会社 图像显示装置
CN201015016Y (zh) * 2006-11-29 2008-01-30 汕头超声显示器有限公司 薄膜晶体管液晶显示器件检测仪
US20110018571A1 (en) * 2009-07-21 2011-01-27 Bung-Goo Kim Chip on glass type lcd device and inspecting method of the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1503040A (zh) * 2002-11-19 2004-06-09 三星电子株式会社 液晶显示器及其测试方法
CN101082718A (zh) * 2006-05-25 2007-12-05 Nec液晶技术株式会社 图像显示装置
CN201015016Y (zh) * 2006-11-29 2008-01-30 汕头超声显示器有限公司 薄膜晶体管液晶显示器件检测仪
US20110018571A1 (en) * 2009-07-21 2011-01-27 Bung-Goo Kim Chip on glass type lcd device and inspecting method of the same

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
CHEN, XIAOMING ET AL.: "Application of a Single Chip Microcomputer in the Functional Test of a COG Liquid Crystal Display Module Driving IC", SCIENCE INFORMATION, 2006, pages 69 *

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Publication number Publication date
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