WO2016190838A1 - Sélecteurs hybrides - Google Patents

Sélecteurs hybrides Download PDF

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Publication number
WO2016190838A1
WO2016190838A1 PCT/US2015/032117 US2015032117W WO2016190838A1 WO 2016190838 A1 WO2016190838 A1 WO 2016190838A1 US 2015032117 W US2015032117 W US 2015032117W WO 2016190838 A1 WO2016190838 A1 WO 2016190838A1
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WO
WIPO (PCT)
Prior art keywords
selector
nonlinear
hybrid
memristor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2015/032117
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English (en)
Inventor
Miao HU
Gary Gibson
John Paul Strachan
Ning GE
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Hewlett Packard Enterprise Development LP
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Hewlett Packard Enterprise Development LP
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Priority to PCT/US2015/032117 priority Critical patent/WO2016190838A1/fr
Publication of WO2016190838A1 publication Critical patent/WO2016190838A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01—Manufacture or treatment
    • H10D12/021—Manufacture or treatment of gated diodes, e.g. field-controlled diodes [FCD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/211—Gated diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N99/00—Subject matter not provided for in other groups of this subclass
    • H10N99/03—Devices using Mott metal-insulator transition, e.g. field-effect transistor-like devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes

Definitions

  • Memristors are devices that can be programmed to different resistive states by applying a programming energy, such as a voltage.
  • a programming energy such as a voltage.
  • Large crossbar arrays of memory devices can be used in a variety of applications, including random access memory, nonvolatile solid state memory, programmable logic, signal processing control systems, pattern recognition, and other applications.
  • FIG. 1 A is a cross-sectional view of an example hybrid selector
  • FIG. 1 B is a cross-sectional view of an example memory cell having a hybrid selector
  • FIG. 2 is a diagram of an example memory crossbar array
  • FIG. 3 is a diagram of an example memory crossbar array illustrating vector input registers and vector output registers.
  • FIG. 4 is a graph showing the current-voltage relationship of example selectors.
  • Memristors are devices that may be used as components in a wide range of electronic circuits, such as memories, switches, radio frequency circuits, and logic circuits and systems.
  • a crossbar array of memory devices having memristors may be used.
  • memristors When used as a basis for memory devices, memristors may be used to store bits of information, 1 or 0.
  • the resistance of a memristor may be changed by applying an electrical stimulus, such as a voltage or a current, through the memristor.
  • an electrical stimulus such as a voltage or a current
  • at least one channel may be formed that is capable of being switched between two states— one in which the channel forms an electrically conductive path ("ON") and one in which the channel forms a less conductive path ("OFF"). In some other cases, conductive paths represent "OFF” and less conductive paths represent "ON”.
  • Vector-matrix operations are utilized in data-compression, digital data processing, neural networks, encryption, and optimization, to name a few applications. The use of memristors at each junction or cross- point of the crossbar array enables programming the resistance (or conductance) at each such junction corresponding to the values of G, leading to use of the crossbar array as a dot product engine (DPE).
  • DPE dot product engine
  • Selectors may increase the nonlinearity of the memory device which may help mitigate sneak currents in the crossbar array.
  • memory crossbar arrays are more effective in dot product and vector-matrix computations when the memory elements are linear during computation. Nonlinear behavior of the memory cells can create challenges when accurately calculating vector-matrix and dot product operations.
  • hybrid selectors that include a nonlinear selector coupled in series with an ohmic resistor.
  • the hybrid selector may have a threshold voltage.
  • the hybrid selector may be nonlinear below the threshold voltage, while the hybrid selector may be less nonlinear, or even linear in some instances, above the threshold voltage. In this manner, examples herein provide advantages of the nonlinear selector while supporting accurate vector-matrix and dot product operations.
  • FIG. 1 is a cross-sectional view of an example hybrid selector 100.
  • Hybrid selector 100 may have a nonlinear selector 1 10 coupled in electrical series with an ohmic resistor 120.
  • components may be coupled by forming an electrical connection between the components.
  • ohmic resistor 120 may be coupled to nonlinear selector 1 10 by forming a direct, surface contact or by other forms of physical connection.
  • Hybrid selector 100 may be an electrical device that may be used in memristor devices to provide desirable electrical properties.
  • hybrid selector 100 may be a 2-terminal device or circuit element that admits a current that depends on the voltage applied across the terminals.
  • hybrid selector 100 may be coupled in series with memristors or active regions of memristor devices, as illustrated in reference to subsequent figures.
  • Nonlinear selector 1 10 may exhibit nonlinear l-V behavior.
  • Nonlinear may describe a function that grows faster than a linear function. For example, this may mean that current flowing through nonlinear selector 1 10 increases faster than linear growth with relation to applied voltage.
  • typical materials may follow Ohm's law, where the current through them is proportional to the voltage.
  • the l-V behavior in this voltage range may be highly nonlinear.
  • nonlinear selector 1 10 may exhibit negative differential resistance (NDR), which further adds to the nonlinearity.
  • Negative differential resistance is a property in which an increase in applied current may cause a decrease in voltage across the terminals, in certain current ranges.
  • negative differential resistance may be a result of heating effects on certain selectors.
  • the NDR effect may further contribute to the nonlinearity of nonlinear selector 1 10.
  • nonlinear resistor 1 10 may be a tunneling barrier selector.
  • tunneling barrier selectors electrons may pass through the tunneling barrier by the process of quantum tunneling. The rate of tunneling electrons may increase with the amount of bias applied across the tunnel. In some examples, the tunneling rate may increase nonlinearly with voltage.
  • Nonlinear selector 1 10 may include a number of materials.
  • nonlinear selector 1 10 may include a metal oxide, such as, for example, a transition metal oxide.
  • a metal oxide such as, for example, a transition metal oxide.
  • Non-limiting examples include niobium oxide, tantalum oxide, vanadium oxide, titanium oxide, and chromium oxide.
  • nonlinear selector 1 10 may include other features and orientations.
  • nonlinear selector 1 10 may include electrodes, dielectrics, and other materials.
  • Ohmic resistor 120 may exhibit less nonlinear l-V behavior than nonlinear selector 1 10.
  • ohmic resistor 120 may be linear in voltage ranges of interest. As explained herein, linear may mean current through resistor 120 is proportional to an applied voltage.
  • Ohmic resistor 120 may be any resistor that provides a compatible resistance.
  • ohmic resistor 120 may be a metal, semiconductor, or other types of materials.
  • hybrid selector 100 may exhibit electrical properties of both components.
  • hybrid selector 100 may have a threshold voltage, below which hybrid selector 100 may exhibit nonlinear l-V behavior. Above the threshold voltage, hybrid selector 100 may exhibit less nonlinear or linear l-V behavior.
  • threshold voltage may be a threshold voltage and not confined to a specific voltage value.
  • hybrid selector 100 may have a threshold voltage range where hybrid selector 100 gradually transitions from nonlinear to linear behavior.
  • FIG. 1 B is a cross-sectional view of an example memory cell 150 having a hybrid selector, such as the hybrid selector 100 of FIG. 1A.
  • Memory cell 150 may have a first electrode 130, a memristor 140 coupled in electrical series with first electrode 130, nonlinear selector 1 10 coupled in electrical series with memristor 140, and ohmic resistor 120 coupled in electrical series with memristor 140 and nonlinear selector 1 10.
  • First electrode 130 may be electrically conducting layers that conduct current to and from memory cell 150.
  • first electrode 1 10 may connect memory cell 150 with a crossbar array.
  • electrodes may serve as lines of the array.
  • Example materials for the electrode may include conducting materials such as Pt, Ta, Hf, Zr, Al, Co, Ni, Fe, Nb, Mo, W, Cu, Ti, TiN, TaN, Ta2N, WN 2 , NbN, MoN, TiSi2, TiSi, TisSis, TaSi2, WS12, NbSi2, VsSi, electrically doped polycrystalline Si, electrically doped polycrystalline Ge, and combinations thereof.
  • Memristor 140 may have a resistance that changes with an applied voltage or current. Furthermore, memristor 140 may "memorize" its last resistance. In this manner, each memristor 140 may be set to at least two states. For example, a voltage larger than a programming voltage of memristor 140 may switch it from an OFF, insulating state to an ON, conducting state. Furthermore in some examples, other components may be coupled with memristors 140. For example, each memristor may be coupled in series with resistors, transistors, or selectors.
  • a memristor may be nitride-based, meaning that at least a portion of the memristor is formed from a nitride-containing composition.
  • a memristor may also be oxide-based, meaning that at least a portion of the memristor is formed from an oxide-containing material.
  • a memristor may be oxy-nitride based, meaning that at least a portion of the memristor is formed from an oxide-containing material and that at least a portion of the memristor is formed from a nitride-containing material.
  • Example materials of memristors may include tantalum oxide, hafnium oxide, titanium oxide, yttrium oxide, niobium oxide, zirconium oxide, or other like oxides, or non-transition metal oxides, such as aluminum oxide, calcium oxide, magnesium oxide, dysprosium oxide, lanthanum oxide, silicon dioxide, or other like oxides. Further examples include nitrides, such as aluminum nitride, gallium nitride, tantalum nitride, silicon nitride, and oxynitrides such as silicon oxynitride. In addition, other functioning mem stors may be employed in the practice of the teachings herein.
  • Memristors 140 may exhibit nonlinear or linear current-voltage behavior. Nonlinear may describe a function that grows differently than a linear function. In some implementations, such as a typical DPE application, memristors 140 may be linear in voltage ranges of interest. A voltage rage of interest may be, for example, the range of voltages between the threshold voltage of hybrid selector 100 and the programming voltage of memristor 140.
  • Hybrid selector 100 may be coupled in series to memristor 140.
  • nonlinear selector 1 10 may be directly coupled in series with memristor 140, while ohmic resistor 120 is coupled directly with nonlinear selector 1 10 and in electrical series with memristor 140.
  • ohmic resistor 120 may operate as a second electrode for conducting current to and away from memory cell 150. In such cases, ohmic resistor 120 has adequate resistance to function as described herein. Alternatively in some examples, an additional second electrode may be coupled to memory cell 150.
  • FIG. 2 is a diagram of an example memory crossbar array 200.
  • Memory crossbar array 200 may be a configuration of parallel and perpendicular lines with memory cells and other components coupled between lines at cross-points.
  • Memory crossbar array 200 may include a plurality of row lines 210, a plurality of column lines 220, and a plurality of memory cells 230. Each memory cell may be coupled between a unique combination of one row line and one column line. In other words, no memory cells share both a row line and a column line.
  • Memory crossbar array 200 may be used in a variety of applications, including as a dot product engine as described herein.
  • Row lines 210 may be electrodes that carry current through memory crossbar array 200. In some examples, row lines 210 may be in parallel to each other, generally with equal spacing. Row lines 210 may sometimes be referred to as bit lines. Depending on orientation, row lines 210 may alternatively be referred to as word lines. Similarly, column lines 220 may be electrodes that run nonparallel to row lines 210. Column lines 220 may be referred to as word lines in some conventions. In other orientations, column lines 220 may refer to bit lines. Row lines 210 and column lines 220 may serve as electrodes that deliver voltage and current to the memory cells 230, and may be analogous to first electrode 1 10 of FIG. 1 B.
  • FIG. 3 illustrates an example memory crossbar array 302 illustrating vector input registers 310 and vector output registers 314, where the memory crossbar array may function as a memristive dot product engine 300.
  • Dot-product engine 300 may include N row electrodes 304 and M column electrodes 306. The crossbar junctions throughout crossbar array 302 may include a memory cell 308.
  • Dot-product engine 300 may include vector input register or vector input 310 for applying voltages to row electrodes 304 and vector output register or vector output 314 for receiving output voltages resulting from current flows in column electrodes 306.
  • Dot-product engine 300 may also include sense circuitry 316 for converting an electrical current in a column electrode 306 to a voltage.
  • sense circuitry 316 may include an operational amplifier 318 and a resistor 320, which can be arranged to represent a virtual ground for read operations.
  • Dot-product engine 300 may also include other peripheral circuitry associated with crossbar arrays 302 used as storage devices.
  • vector input 310 may include drivers connected to row electrodes 304.
  • An address decoder can be used to select a row electrode 304 and activate a driver corresponding to the selected row electrode 304.
  • the driver for a selected row electrode 304 can drive a corresponding row electrode 304 with different voltages corresponding to a vector-matrix multiplication or the process of setting resistance values within memristive elements 308 of crossbar array 302.
  • Similar driver and decoder circuitry may be included for column electrodes 306.
  • Control circuitry may also be used to control application of voltages at the inputs and reading of voltages at the outputs of dot-product engine 300.
  • Digital to analog circuitry and analog to digital circuitry may be used at vector inputs 310 and at vector output 314.
  • Input signals to row electrodes 304 and column electrodes 306 can be either analog or digital.
  • the peripheral circuitry above described can be fabricated using semiconductor processing techniques in the same integrated structure or semiconductor die as crossbar array 302 in the above example.
  • the first operation is to program the memristors in the crossbar array so as to map the mathematic values in an NxM matrix to the array. In one example, only one memristor is programmed at a time during the programming operation.
  • the second operation is the dot-product or matrix multiplication operation.
  • vector and matrix multiplications may be executed through dot-product engine 300 by applying a set of voltages V 310 simultaneously along rows 304 of the NxM crossbar array (302) and collecting the currents through columns 306 and measuring output voltage V° 314. On each column, every input voltage 310 is weighted by the corresponding memristance (1/Gy) and the weighted summation is reflected at the output voltage 314.
  • Gy is an NxM matrix determined by the conductance (inverse of resistance) of crossbar array 302
  • Rs is the resistance value of the sense amplifiers
  • T denotes the transpose of the column vectors V° and V.
  • the negative sign follows from use of a negative feedback operational amplifier in the sense amplifiers.
  • the vector operation can be set forth in more detail as follows.
  • aiivibi + a2i ib2 + . . . + aNi ibN CM.
  • the vector processing or multiplication using the principles described herein generally starts by mapping a matrix of values [ay] onto crossbar array 302 or, stated otherwise, programming - e.g., writing - conductance values Gy into the crossbar junctions of the array 302.
  • each of the conductance values Gy is set by sequentially imposing a voltage drop over each of the crossbar junctions (Fig. 2, 210).
  • the conductance value G2,3 may be set by applying a voltage equal to VROW2 at the 2 ND row of crossbar array 302 and a voltage equal to Vcoi3 at the 3 RD column of the array.
  • the sense circuitry 316 for that electrode may be switched out and a voltage driver switched in.
  • the voltage difference VR 0 W2 - Vcoi3 will generally determine the resulting conductance value G2,3 based on the characteristics of the memristive element 308 located at the intersection.
  • the unselected columns 306 and rows 304 may be addressed according to one of several schemes, including, for example, floating all unselected columns 306 and rows 304 or grounding all unselected columns and rows. Other schemes involve grounding columns 306 or grounding partial columns 306. Grounding all unselected columns and rows is beneficial in that the scheme helps to isolate the unselected columns and rows to minimize the sneak path currents to the selected output column 306.
  • operation of dot-product engine 300 proceeds by applying the vector of input voltages 310 and reading the vector of output voltages 314.
  • the memristors used for the dot product engines 300 may have linear current-voltage relation. Linear current-voltage relations permit higher accuracy in the vector multiplication process.
  • crossbar arrays 302 having linear memristors are prone to having large sneak path currents during programming of the array 302, particularly when the size of crossbar array 302 is larger than a certain size, for instance, 32 x 32.
  • the current running through a selected mem stor may not be sufficient to program the memristor because most of the current runs through the sneak paths.
  • the memristor may be programmed at an inaccurate value because of the sneak paths.
  • an access device such as a non-linear selector, such as hybrid selector 100 of FIG. 1
  • a memristor may be incorporated within or utilized together with a memristor to minimize the sneak path currents in the array.
  • memory cell should be broadly interpreted to include memristive devices including, for example, a memristor, a memristor and selector, or a memristor and other components.
  • FIG. 4 is a graph, on axes of current (I) and voltage (V), showing the current- voltage relationship of example selectors.
  • FIG. 4 shows the l-V curves of four different selectors to illustrate the effect of coupling an ohmic resistor to selectors.
  • the solid line shows the l-V behavior of a selector.
  • the dashed lines show the l-V behavior of hybrid selectors that have a selector coupled with an ohmic resistor.
  • the hybrid selectors show a threshold voltage at around 1 .5V. At voltages greater than the threshold, the hybrid selectors show steady, linear l-V behavior.
  • Curve 410 shows the l-V behavior of a nonlinear selector. As shown in the figure, the l-V of the selector becomes nonlinear after a threshold voltage, which is approximately 1 .5V according to the example.
  • Curve 420 shows the l-V behavior of a hybrid selector having a 1 kQ resistor. As shown in the figure, the behavior of the hybrid selector is less nonlinear past the threshold.
  • Curve 430 shows the l-V behavior of a hybrid selector having a 10kQ resistor. As shown in the figure, the behavior of the hybrid selector is less nonlinear past the threshold and have a higher resistance than the hybrid selector of Curve 420.
  • Curve 440 shows the l-V behavior of a hybrid selector having a 10OkQ resistor. As shown in the figure, the behavior of the hybrid selector is less nonlinear past the threshold and have a higher resistance than the hybrid selector of Curve 430.
  • the hybrid selectors in some examples, may be linear above the threshold voltage.
  • hybrid selectors described herein may include additional components and that some of the components described herein may be removed or modified without departing from the scope of the hybrid selectors or their applications. It should also be understood that the components depicted in the figures are not drawn to scale, and thus, the components may have different relative sizes with respect to each other than as shown in the figures.

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Abstract

Un sélecteur hybride comprend un sélecteur non linéaire et une résistance ohmique couplée en série au sélecteur non linéaire. Le sélecteur hybride est non linéaire au-dessous d'une tension de seuil. Le sélecteur hybride est linéaire au-dessus de la tension de seuil.
PCT/US2015/032117 2015-05-22 2015-05-22 Sélecteurs hybrides Ceased WO2016190838A1 (fr)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019117965A1 (fr) * 2017-12-15 2019-06-20 Intel Corporation Cellule de mémoire 1s-1r à ballast non linéaire

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080147954A1 (en) * 2006-04-03 2008-06-19 Blaise Laurent Mouttet Crossbar arithmetic and summation processor
US20130134382A1 (en) * 2011-11-28 2013-05-30 Katholieke Universiteit Leuven, K.U. Leuven R&D Selector Device for Memory Applications
US20140027700A1 (en) * 2012-07-30 2014-01-30 Janice H. Nickel Memristor with embedded switching layer
US20140215121A1 (en) * 2013-01-30 2014-07-31 Hewlett-Packard Development Company, L.P. Memory controller using crisscross error-correcting codes
WO2015072958A1 (fr) * 2013-11-12 2015-05-21 Hewlett-Packard Development Company, L.P. Dispositifs de memristance non linéaire pourvus de sélecteurs à trois couches

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080147954A1 (en) * 2006-04-03 2008-06-19 Blaise Laurent Mouttet Crossbar arithmetic and summation processor
US20130134382A1 (en) * 2011-11-28 2013-05-30 Katholieke Universiteit Leuven, K.U. Leuven R&D Selector Device for Memory Applications
US20140027700A1 (en) * 2012-07-30 2014-01-30 Janice H. Nickel Memristor with embedded switching layer
US20140215121A1 (en) * 2013-01-30 2014-07-31 Hewlett-Packard Development Company, L.P. Memory controller using crisscross error-correcting codes
WO2015072958A1 (fr) * 2013-11-12 2015-05-21 Hewlett-Packard Development Company, L.P. Dispositifs de memristance non linéaire pourvus de sélecteurs à trois couches

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019117965A1 (fr) * 2017-12-15 2019-06-20 Intel Corporation Cellule de mémoire 1s-1r à ballast non linéaire

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