WO2018024214A1 - Io流调节方法与装置 - Google Patents

Io流调节方法与装置 Download PDF

Info

Publication number
WO2018024214A1
WO2018024214A1 PCT/CN2017/095662 CN2017095662W WO2018024214A1 WO 2018024214 A1 WO2018024214 A1 WO 2018024214A1 CN 2017095662 W CN2017095662 W CN 2017095662W WO 2018024214 A1 WO2018024214 A1 WO 2018024214A1
Authority
WO
WIPO (PCT)
Prior art keywords
command
logical unit
unit group
processing
logical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2017/095662
Other languages
English (en)
French (fr)
Inventor
路向峰
孙清涛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Beijing Memblaze Technology Co Ltd
Original Assignee
Beijing Memblaze Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from CN201610836522.4A external-priority patent/CN107688435B/zh
Application filed by Beijing Memblaze Technology Co Ltd filed Critical Beijing Memblaze Technology Co Ltd
Publication of WO2018024214A1 publication Critical patent/WO2018024214A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers

Definitions

  • the present application relates to solid state drives and, in particular, to methods and apparatus for processing multiple write request streams in a solid state drive.
  • the solid state storage device 102 is coupled to the host for providing storage capabilities to the host.
  • the host and the solid-state storage device 102 can be coupled in various manners, including but not limited to, for example, SATA (Serial Advanced Technology Attachment), SCSI (Small Computer System Interface). , SAS (Serial Attached SCSI), IDE (Integrated Drive Electronics), USB (Universal Serial Bus), PCIE (Peripheral Component Interconnect Express, PCIe, High Speed Peripheral Component Interconnect) NVMe (NVM Express, high speed nonvolatile storage), Ethernet, Fibre Channel, wireless communication network, etc. are connected to the host and solid state storage device 102.
  • SATA Serial Advanced Technology Attachment
  • SCSI Serial Attached SCSI
  • IDE Integrated Drive Electronics
  • USB Universal Serial Bus
  • PCIE Peripheral Component Interconnect Express
  • PCIe High Speed Peripheral Component Interconnect
  • NVMe High Speed nonvolatile storage
  • Ethernet Fibre Channel
  • Fibre Channel
  • the host may be an information processing device capable of communicating with the storage device in the manner described above, such as a personal computer, tablet, server, portable computer, network switch, router, cellular telephone, personal digital assistant, and the like.
  • the storage device 102 includes an interface 103, a control unit 104, one or more NVM (Non-Volatile Memory) chips 105, and a DRAM (Dynamic Random Access Memory) 110.
  • NVM Non-Volatile Memory
  • DRAM Dynamic Random Access Memory
  • the interface 103 can be adapted to exchange data with the host via, for example, SATA, IDE, USB, PCIE, NVMe, SAS, Ethernet, Fibre Channel, and the like.
  • Control component 104 is used to control data transfers between interface 103, NVM chip 105, and firmware memory 110, as well as for storage management, host logical address to flash physical address mapping, erase equalization, bad block management, and the like.
  • Control component 104 can be implemented in a variety of ways, including software, hardware, firmware, or a combination thereof.
  • the control unit 104 may be in the form of an FPGA (Field-programmable gate array), an ASIC (Application Specific Integrated Circuit), or a combination thereof.
  • Control component 104 may also include a processor or controller that executes software in the processor or controller to manipulate the hardware of control component 104 to process IO commands.
  • Control component 104 is also coupled to DRAM 110 and can access data from DRAM 110.
  • the DRAM can store data for FTL tables and/or cached IO commands.
  • a memory target is one or more Logic Units of a shared chip enable (CE, Chip Enable) signal within a NAND flash package.
  • Each logical unit has a LUN (Logic Unit Number).
  • One or more dies (Die) may be included in the NAND flash package.
  • the logic unit corresponds to a single die.
  • the logic unit can include a plurality of planes. Multiple planes within a logical unit can be accessed in parallel, while multiple logical units within a NAND flash chip can execute command and report states independently of each other.
  • Data is typically stored and read on a page by NVM storage media. And erase the data by block.
  • a block contains multiple pages.
  • a page on a storage medium (referred to as a physical page) has a fixed size, such as 17,664 bytes. Physical pages can also have other sizes.
  • FTL Flash Translation Layer
  • the logical address constitutes the storage space of the solid-state storage device perceived by the upper layer software such as the operating system.
  • the physical address is the address of the physical storage unit used to access the solid state storage device. Address mapping can also be implemented in the prior art using intermediate address patterns. For example, a logical address is mapped to an intermediate address, and the intermediate address is further mapped to a physical address.
  • FTL tables are important metadata in solid state storage devices. Usually, the data items of the FTL table record the address mapping relationship in units of data pages in the solid state storage device.
  • the FTL table includes multiple FTL table entries (or tables).
  • a correspondence between a logical page address and a physical page is recorded in each FTL table entry.
  • a correspondence between consecutive multiple logical page addresses and consecutive multiple physical pages is recorded in each FTL table entry.
  • a correspondence between a logical block address and a physical block address is recorded in each FTL table entry.
  • the mapping relationship between the logical block address and the physical block address, and/or the logical page address and the physical page address are recorded in the FTL table.
  • the write command processing bandwidth of the SSD is limited by the number of flash channels and the backup battery, it is necessary to process multiple IO commands with limited bandwidth and achieve good performance, user experience or quality of service.
  • a method of processing a first IO command comprising: acquiring a first logical unit group; acquiring a first IO having a first label based on the first logical unit group a command, wherein the first set of logical units is associated with the first tag; and writing data to the first set of logical units in response to the first IO command.
  • a method of processing a first processing IO command according to the first aspect of the present application further comprising: acquiring a second logical unit group; based on the second logical unit group, Obtaining a second IO command having a second tag, wherein the second set of logical units is associated with the second tag; and writing data to the second set of logical units in response to the second IO command.
  • a method for processing a third processing IO command according to the first aspect of the present application, further comprising: based on the first logical unit group, if there is no waiting Processing the first IO command having the first tag, acquiring a third IO command having the second tag; and writing data to the first logical unit group in response to the third IO command.
  • a method of processing a fourth IO command according to the first aspect of the present application further comprising: based on the second logical unit group, if there is no pending a second IO command of the second tag, acquiring a fourth IO command having a third tag; and writing data to the second logical unit group in response to the fourth IO command.
  • a method of processing a fifth IO command according to the first aspect of the present application further comprising: before writing data to the logical unit group, The physical address is assigned to the IO command from the logical unit group; and the FTL table is updated with the logical address and physical address of the IO command.
  • a method for processing a first or second processing IO command according to the first aspect of the present application further comprising: if the first logical unit group has responded to the first a first number of IO commands, based on the first set of logical units, obtaining a fifth IO command having a second tag; and writing data to the first set of logical units in response to the fifth IO command.
  • a method of processing a IO command according to the seventh aspect of the first aspect of the present application further comprising: if the second logical unit group has responded to the second number of Two
  • the IO command acquires a sixth IO command having a third tag based on the second logical unit group; and writes data to the second logical unit group in response to the sixth IO command.
  • a ninth processing IO command according to the first aspect of the present application, further comprising: changing a correspondence relationship between the logical unit group and the label The first logical unit group is associated with the second label.
  • a ninth method of processing an IO command of the first aspect of the present application there is provided a method for processing a tenth IO command according to the first aspect of the present application, further comprising: acquiring, based on the first logical unit group, the first logical unit An associated IO command having a second tag; and writing data to the first set of logical units in response to the IO command.
  • a method for processing an IO command according to the eleventh aspect of the first aspect of the present application further comprising: changing a correspondence relationship between the logical unit group and the label such that the first The logical unit group is associated with the second label with a first priority, and the first logical unit group is associated with the third label with a second priority, wherein the first priority is higher than the second priority.
  • a method of the twelfth processing IO command according to the first aspect of the present application further comprising: obtaining, according to the priority based on the first logical unit group An IO command having a second tag or an IO command having a third tag associated with a logical group unit; and writing data to the first logical unit group in response to the IO command.
  • a thirteenth processing IO command according to the first aspect of the present application, wherein the writing is based on the first logical unit group
  • the specified amount of data is changed, and the correspondence between the first logical unit group and the label is changed such that the first logical unit group is associated with the second label.
  • a method of the fourteenth processing IO command according to the first aspect of the present application wherein the change is based on the lapse of the specified time interval A correspondence between a logical unit group and a tag, such that the first logical unit group is associated with the second label.
  • the method of processing the IO command according to the first aspect of the present application further comprising: changing the logical unit group and the label Corresponding relationship, the second logical unit group is associated with the third label.
  • the first label indicates a sequential write stream
  • the second tag indicates a random write stream
  • the third tag indicates a command stream from a garbage collection operation.
  • a method of processing a IO command according to the seventeenth aspect of the first aspect of the present application further comprising: receiving an IO command.
  • a seventeenth method of processing an IO command of the first aspect of the present application there is provided a method of processing an IO command according to the eighteenth aspect of the first aspect of the present application, further comprising: setting a label for the IO command.
  • a method for processing an IO command according to the seventeenth or eighteenth aspect of the first aspect of the present application the method for processing a tenth processing IO command according to the first aspect of the present application, further comprising: adjusting according to the number of idle large blocks Processing bandwidth of IO commands for different tags.
  • a twentieth method of processing an IO command according to the first aspect of the present application wherein if the number of idle large blocks is lower than a threshold, the reduction has a first The processing bandwidth of the IO command of the tag and/or the second tag increases the processing bandwidth of the IO command with the third tag.
  • the nineteenth or twentieth method of processing an IO command of the first aspect of the present application there is provided a method for processing an IO command according to the twenty-first aspect of the first aspect of the present application, wherein the number of free large blocks is not lower than Threshold, increasing the processing bandwidth of the IO command with the first tag and/or the second tag, reducing the IO command with the third tag Processing bandwidth.
  • a twenty-second method of processing an IO command according to the first aspect of the present application wherein a processing bandwidth of the IO command is The number of IO commands with the specified label processed per unit time.
  • apparatus for a first processing IO command comprising: a module for acquiring a first logical unit group; and for acquiring based on the first logical unit group a module of a first IO command of a tag, wherein the first set of logical units is associated with the first tag; and a module for writing data to the first set of logical units in response to the first IO command.
  • An apparatus for processing a first processing IO command according to the second aspect of the present application further comprising: a module for acquiring a second logical unit group; a second logical unit group, a module for acquiring a second IO command having a second label, wherein the second logical unit group is associated with the second label; and for writing data to the second logical unit group in response to the second Module for IO commands.
  • An apparatus for processing a first or second IO command according to the second aspect of the present application the apparatus for processing a third processing IO command according to the second aspect of the present application, further comprising: for using the first logical unit group, if not There is a first IO command with a first tag to be processed, a module for acquiring a third IO command with a second tag, and a module for writing data to the first logical unit group in response to the third IO command.
  • An apparatus for processing a second IO command according to the second aspect of the present application the apparatus for processing a fourth processing IO command according to the second aspect of the present application, further comprising: for using the second logical unit group, if there is no pending a second IO command having a second tag, a module for acquiring a fourth IO command having a third tag; and a module for writing data to the second logical unit group in response to the fourth IO command.
  • apparatus for processing a fifth processing IO command further comprising: for writing data to the logical unit group Previously, a module that assigns a physical address to a IO command from a logical unit group; and a module for updating an FTL table with a logical address and a physical address of the IO command.
  • An apparatus for processing a first or second IO command according to the second aspect of the present application the apparatus for processing a sixth processing IO command according to the second aspect of the present application, further comprising: if the first logical unit group has responded a first number of first IO commands, based on the first set of logical units, acquiring a module having a fifth IO command of the second tag; and means for writing data to the first logical unit group in response to the fifth IO command Module.
  • the apparatus for processing a IO command according to the second aspect of the present application further comprising: if the second logical unit group has responded to the second quantity And a second IO command, based on the second logical unit group, acquiring a module of the sixth IO command having the third label; and means for writing data to the second logical unit group in response to the sixth IO command.
  • an apparatus for processing an IO command according to the second aspect of the present application wherein the writing of the data to the logical unit group is a logical The active chunks of the unit group are sequentially written to the data.
  • an apparatus for processing a ninth IO command according to the second aspect of the present application further comprising: for changing a logical unit group and a label Corresponding relationship, a module that associates the first logical unit group with the second label.
  • An apparatus for processing a IO command according to a ninth aspect of the present application the apparatus for processing a tenth processing IO command according to the second aspect of the present application, further comprising: acquiring and the first logic based on the first logical unit group a module associated with the IO command of the second tag associated with the cell; and a module for writing data to the first set of logical cells in response to the IO command.
  • the apparatus for processing an IO command according to the second aspect of the present application further comprising: changing a correspondence relationship between the logical unit group and the label, such that The first logical unit group is associated with the second label with a first priority, and the first logical unit group has a second priority A module associated with a third tag, wherein the first priority is higher than the second priority.
  • An apparatus for processing a tenth command according to the tenth aspect of the present application the apparatus for the twelfth processing IO command according to the second aspect of the present application, further comprising: for acquiring based on the priority based on the first logical unit group a module having an IO command of a second tag or an IO command having a third tag associated with the first logical group unit; and a module for writing data to the first logical unit group in response to the IO command.
  • an apparatus for processing a thirteenth processing IO command according to the second aspect of the present application wherein the writing is based on writing to the first logical unit group The specified amount of data is changed, and the correspondence between the first logical unit group and the label is changed such that the first logical unit group is associated with the second label.
  • an apparatus for processing a fourteenth processing IO command according to the second aspect of the present application wherein the change is based on the lapse of a specified time interval A correspondence between a logical unit group and a tag, such that the first logical unit group is associated with the second label.
  • an apparatus for processing a fifteenth processing IO command according to the second aspect of the present application further comprising: for changing a logical unit group and The correspondence of the labels, such that the second logical unit group is associated with the third label.
  • the apparatus for processing a sixteenth processing IO command wherein the first label indicates a sequential write stream, The second tag indicates a random write stream and the third tag indicates a command stream from a garbage collection operation.
  • an apparatus for processing a seventeenth IO command according to the second aspect of the present application, further comprising: a module for receiving an IO command .
  • an apparatus for processing an IO command an apparatus for processing an IO command according to the eighteenth aspect of the present application, a module for setting a label for an IO command.
  • An apparatus for processing an IO command according to the seventeenth or eighteenth aspect of the second aspect of the present application the apparatus for processing a tenth processing IO command according to the second aspect of the present application, further comprising: for the number of free blocks according to A module that adjusts the processing bandwidth of IO commands with different labels.
  • the apparatus for processing an IO command the apparatus for processing a twentieth IO command according to the second aspect of the present application, wherein if the number of idle large blocks is lower than a threshold, the reduction has the first The processing bandwidth of the IO command of the tag and/or the second tag, the module that increases the processing bandwidth of the IO command with the third tag.
  • the apparatus for processing an IO command according to the nineteenth aspect of the second aspect of the present application the apparatus for processing an IO command according to the twenty-first aspect of the second aspect of the present application, wherein if the number of idle large blocks is not lower than a threshold, the improvement has The processing bandwidth of the IO command of the first tag and/or the second tag reduces the processing bandwidth of the IO command with the third tag.
  • An apparatus for processing an IO command according to the nineteenth to twenty-firstth aspects of the second aspect of the present application the apparatus for processing a twenty-second processing IO command according to the second aspect of the present application, wherein a processing bandwidth of the IO command is The number of IO commands with tags generated per unit time.
  • a solid state storage device according to the first processing IO command of the third aspect of the present application, comprising: a controller and a nonvolatile memory; the nonvolatile memory comprising a plurality of memory cell groups; Selecting a first logical unit group, based on the first logical unit group, acquiring a first IO command having a first label, wherein the first logical unit group is associated with the first label, and writing data to the first logical unit group in response The first IO command.
  • a solid state storage device according to the first processing IO command of the third aspect of the present application, the solid state storage device according to the second processing IO command of the third aspect of the present application, wherein: the controller further selects the second logical unit group Acquiring, based on the second set of logical units, a second IO command having a second tag, wherein the second set of logical units is associated with the second tag; and writing data to the second set of logical units in response to the second IO command .
  • a solid state storage device according to the first or second processing IO command of the third aspect of the present application, the solid state storage device according to the third processing IO command of the third aspect of the present application, the controller including a host interface, front end processing The component and the back-end processing component, the host interface receives the IO command and forwards it to the front-end processing component; the front-end processing component sets the label for the IO command and forwards it to the back-end processing component; the back-end processing component selects the first logical unit group, based on the a logical unit group that acquires a first IO command having a first label, wherein the first logical unit group is associated with the first label and writes data to the first logical unit group in response to the first IO command.
  • a solid state storage device according to a third processing IO command of the third aspect of the present application, the solid state storage device according to the fourth processing IO command of the third aspect of the present application, wherein the backend processing component is further based on an idle chunk
  • the amount of adjustment adjusts the processing bandwidth of IO commands with different labels.
  • a solid state storage device according to the third or fourth processing IO command of the third aspect of the present application, the solid state storage device according to the fifth processing IO command of the third aspect of the present application, wherein the backend processing component further adjusts The relationship between a logical unit group and a label.
  • a program comprising an instruction code according to the fourth aspect of the present application, when loaded into a solid state storage device and executed on a controller of the solid state storage device, the program code The controller performs the method according to the first aspect of the application.
  • a solid state storage device comprising a controller and a nonvolatile memory, the nonvolatile memory comprising a plurality of memory cell groups; the controller executing by executing a program According to the method according to the first aspect of the application.
  • a first solid state storage device comprising a controller and a nonvolatile memory, the nonvolatile memory comprising a plurality of memory cell groups; the controller by executing a program: Acquiring a first logical unit group; acquiring, according to the first logical unit group, a first IO command having a first label, wherein the first logical unit group is associated with the first label; and writing data to the first logical unit group in response The first IO command.
  • a second solid-state storage device according to the sixth aspect of the present application, wherein the controller further selects a second logical unit group; based on the second logical unit group, Obtaining a second IO command having a second tag, wherein the second set of logical units is associated with the second tag; and writing data to the second set of logical units in response to the second IO command.
  • a third solid-state storage device according to the sixth aspect of the present application, wherein the controller: receives an IO command; sets a label for an IO command; a logical unit group, based on the first logical unit group, acquiring a first IO command having a first label, wherein the first logical unit group is associated with the first label; and writing data to the first logical unit group in response to the The first IO command.
  • a fourth solid-state storage device according to the sixth aspect of the present application, wherein the controller further adjusts processing of IO commands having different tags according to the number of idle chunks bandwidth.
  • a fifth solid-state storage device according to the sixth aspect of the present application, wherein the controller further adjusts an association relationship of the logical unit group with the tag.
  • Figure 1 shows a block diagram of a solid state storage device
  • Figure 2 shows a schematic view of a block in accordance with an embodiment of the present application
  • FIG. 3 shows a schematic diagram of a logical unit group according to an embodiment of the present application
  • FIG. 4 is a schematic diagram of processing an IO command by a solid state storage device according to an embodiment of the present application
  • 5A is a schematic diagram of a mapping of a write command flow to a logical unit group in accordance with an embodiment of the present application
  • 5B is a mapping table of a write command stream and a logical unit group according to an embodiment of the present application
  • 5C is a mapping table of a write command stream and a logical unit group according to another embodiment of the present application.
  • FIG. 6 is a flow chart of processing an IO command in accordance with an embodiment of the present application.
  • FIG. 7 is a schematic diagram of a mapping of a write command flow to a logical unit group according to still another embodiment of the present application.
  • FIG. 8 is a flow chart of processing an IO command in accordance with yet another embodiment of the present application.
  • a plurality of NVM chips are included in the solid state storage device.
  • Each NVM chip includes one or more logic units.
  • a chunk includes a physical block from each of a plurality of logical units.
  • Preferably, each logical unit provides one physical block for the large block.
  • a chunk is constructed on every 16 logical units (LUNs).
  • Each chunk consists of 16 physical blocks from each of the 16 logical units (LUNs).
  • chunk 0 includes physical block 0 from each of 16 logical units (LUNs)
  • chunk 1 includes physical block 1 from each logical unit (LUN).
  • a page strip is constructed in chunks, and the physical pages of the same physical address within each logical unit (LUN) constitute a "page strip.”
  • LUN logical unit
  • physical page 0-0, physical page 0-1, ... and physical page 0-x form a page strip 0, where physical page 0-0, physical page 0-1, ... physical page 0-14 User data is stored, while physical pages 0-15 are used to store parity data calculated from all user data within the stripe.
  • page physical page 2-0, physical page 2-1, ... and physical page 2-x constitute page strip 2.
  • the physical page used to store the verification data can be located anywhere in the page strip.
  • FIG. 3 a schematic diagram of a logical unit group in accordance with an embodiment of the present application is shown.
  • a large block is constructed on every 16 logical units, and 16 logical units for constructing a large block constitute a logical unit group.
  • logical unit 0 (LUN 0) to logical unit 15 (LUN 15) constitute logical unit group 1 (LUN group 1)
  • logical unit 16 (LUN 16) to logical unit 31 (LUN 31) constitute a logical unit.
  • LUN group 2 logical unit 32 (LUN 32) to logical unit 47 (LUN 47) constitute logical unit group 3 (LUN group 3), logical unit 48 (LUN 48) to logical unit 63 (LUN 63) Logical unit group 4 (LUN group 4).
  • LUN group 3 logical unit group 3
  • logical unit 48 LUN 48
  • LUN 63 Logical unit group 4
  • each logical unit group shown in Figure 3 has 16 logical units, it is apparent that other configurations may be employed to provide different numbers of logical units in a logical unit group.
  • the number of LUN groups reflects the ability of solid-state storage devices to process IO commands in parallel. At most one large block at the same time in each logical unit group is being written with data. A large chunk of a logical unit group that can currently be written to is called an active chunk.
  • Solid state storage devices are used to process IO commands.
  • the IO command includes a variety of attributes.
  • the attribute indicates whether the IO command is a read command or a write command.
  • the attributes also indicate the frequency, order, randomness, subsequent IO commands, time/space affinity, etc. of the IO commands.
  • the properties of the IO command are defined.
  • an application can set attributes in an IO command based on application characteristics, user scenarios, and the like.
  • the operating system/storage driver or protocol can set properties for IO commands, such as which virtual machine or operating system the IO command comes from, or convert the attributes noted by the application in the IO command to a protocol-defined form.
  • the storage device can also set properties for IO commands. For example, in the Chinese patent application entitled "Sequence Flow Detection Method and Apparatus" (Application No. CN201610169011.1), the storage device marks the IO command with attributes indicating sequence and/or randomness based on the logical address accessed by the IO command. This is incorporated herein by reference in its entirety.
  • the storage device can also classify and set attributes for IO commands based on historical information, rules, or machine learning results.
  • the attributes of the IO command can be indicated by the tag carried in the IO command.
  • Applications, drivers, operating systems, and storage devices can also convert attributes in IO commands to labels.
  • Labels have a limited or diverse meaning.
  • the tags include T1, T2, T3, T4, and T5, while T1 to T3 represent one of three sequential write streams, respectively, while T4 represents a random write stream and T5 represents a GC (garbage collection) write stream.
  • Other tags can be provided to indicate other meanings of IO commands.
  • the processing of IO commands can be optimized according to the tags in the IO commands.
  • FIG. 4 illustrates a schematic diagram of processing an IO command by a solid state storage device in accordance with an embodiment of the present application.
  • the control component 104 of the solid state storage device includes a host interface 410, a front end processing module 420, and a back end processing module 440.
  • the host interface 410 is used to exchange commands and data with the host.
  • the host communicates with the storage device through the NVMe/PCIe protocol, and the host interface 410 processes the PCIe protocol data packet, extracts the NVMe protocol command, and returns the processing result of the NVMe protocol command to the host.
  • Host interface 410 receives a plurality of IO commands (shown as A1, B1, C2, B2, A3, B4, C1, and B1 in Figure 4) that access the solid state storage device.
  • the front end processing module 420 labels the IO commands received from the host interface 410. In FIG.
  • the IO command carrying the tag T1 constitutes the write command stream S1
  • the IO command carrying the tag T2 constitutes the write command stream S2
  • the IO command carrying the tag T3 constitutes the write command stream S3
  • the IO command carrying the tag T5 constitutes the write.
  • the write command stream S5 is a sequential stream in which the IO commands write data to a contiguous logical address space in general
  • the write command stream S2 is another sequential stream in which the IO commands are written substantially to a contiguous logical address space.
  • the write command stream S3 is a command stream from a garbage collection (GC) task
  • the write command stream S4 is a command stream from another garbage collection task.
  • the front-end module 420 generates a write command stream S1 and/or a write command stream S2 using a scheme disclosed in Chinese Patent Application No. CN201610169011.1 (the name of the invention is "Sequence Flow Detection Method and Apparatus"), optionally, a front-end module
  • the 420 sets a label for the IO command to classify the IO command into a plurality of write command streams using prior art or in a manner that can be implemented in the future and known to those skilled in the art.
  • the command stream labeled by the front-end module can have different numbers, and a label is set in the IO command to distinguish the command stream.
  • the backend processing module 440 receives the write command stream and accesses one or more NVM chips.
  • a plurality of NVM chips constitute a logical unit group including a logical unit group 401, a logical unit group 403, a logical unit group 405, and a logical unit group 407.
  • the backend processing module assigns the write command stream to different logical unit groups.
  • write commands belonging to the same write command stream are assigned to the same logical unit group to enhance spatial locality of data in the NVM chip 105.
  • the write command stream S1 is assigned to the logical unit group 401
  • the write command stream S2 is assigned to the logical unit group 403
  • the write command stream S3 is assigned to the logical unit group 405
  • the write command stream S4 is assigned to the logical unit 407.
  • the correspondence between the logical address of the write command that writes the command stream and the physical address to which the write command is written is also recorded in the FTL table.
  • the FTL table may be updated by the backend processing module 440, or may be updated by other components of the control component 104.
  • 5A is a schematic diagram of a mapping of a write command flow to a logical unit group in accordance with an embodiment of the present application.
  • the logical unit group assignment module 510 in the backend processing module (see FIG. 4, backend processing module 440) distributes the write command stream to the logical unit group. Maintain a mapping table to record the mapping relationship between the write command stream and the logical unit.
  • FIG. 5B is a mapping table of a write command stream and a logical unit group according to an embodiment of the present application.
  • the write command stream S1 is mapped to the logical unit group 1
  • the write command stream S2 is mapped to the logical unit group 2
  • the write command stream S3 is mapped to the logical unit group 3
  • the write command stream S4 is mapped to the logical unit group. 4.
  • the logical unit group assignment module 510 assigns a logical unit group to the write command stream according to the mapping table.
  • the logical unit group assignment module 510 acquires a write command, identifies a write command stream (eg, S1) to which the write command belongs from a label (eg, T1) in the write command, and from the mapping table according to the label (T1) A corresponding logical unit group (for example, logical unit group 1) is obtained.
  • the backend processing module 440 (see FIG. 4) also assigns a physical address belonging to the logical unit group 1 to the write command. To execute a write command, based on the assigned physical address The data corresponding to the write command is written to the logical unit group 1. And the FTL table is also updated, and the correspondence between the logical address of the write command and the physical address of the assigned logical unit group 1 is recorded in the FTL table.
  • logical unit group assignment module 510 selects a logical unit group and assigns a write command to it.
  • logical unit group allocation module 510 in turn distributes commands for each of a plurality of logical unit groups in a solid state storage device.
  • the logical unit group selects the logical unit group 2, and it is determined by the mapping table (see Fig. 5B) that the logical unit group 2 is associated with the write command stream S2 identified by the tag T2.
  • the logical unit group assignment module 510 acquires a write command belonging to the write command stream S2.
  • the logical unit group allocation module 510 or the back end processing module 440 also assigns a physical address belonging to the logical unit group 2 to the write command. To execute the write command, the data corresponding to the write command is written to the logical unit group 2 according to the assigned physical address.
  • logical unit group allocation module 510 allocates write commands to a plurality of logical unit groups in parallel.
  • the write command stream S1 is a sequential write stream
  • the write command stream S2 is a random write stream
  • the write command stream S3 is a command stream from a garbage collection task
  • the write command stream S4 is from another garbage collection.
  • the command stream for the task By mapping the write command stream to a particular set of logical units, data belonging to the same write command stream (eg, write command stream S1) is stored in the same set of storage units (eg, logical unit group 1), thereby enhancing the data at Spatial locality in solid state storage devices, and in turn, write amplification of solid state storage devices. Free storage space is freed for a storage unit group by performing a garbage collection operation in a logical unit group.
  • adjust the mapping relationship between the logical unit group and the write command stream For example, after writing a specified amount of data to a logical unit group, changing a mapping relationship between the logical unit group and the write command stream; and/or changing a mapping relationship between the logical unit group and the write command stream at a specified time interval; And/or changing the mapping relationship between the logical unit group and the write command stream based on the number of free storage spaces of the logical unit group; and/or changing the mapping relationship between the logical unit group and the write command stream according to the user's instruction.
  • the mapping table shown in FIG. 5B is modified.
  • FIG. 5C is a mapping table of a write command stream and a logical unit group according to another embodiment of the present application.
  • a write command for writing the command stream S1 is assigned with a high priority for the logical unit group 1 (LUN group 1), and a write command for the write command stream S2 is assigned with a low priority; for the logical unit group 2 (LUN group 2)
  • the write command of the write command stream S2 is assigned with a high priority
  • the write command of the write command stream S3 is assigned with a low priority
  • the write command of the write command stream S3 is assigned with a high priority for the logical unit group 3 (LUN group 3)
  • the write command of the write command stream S4 is assigned with a low priority
  • the write command of the write command stream S4 is assigned with a high priority for the logical unit group 4 (LUN group 4)
  • the write command for the write command stream S1 is assigned with a low priority.
  • logical unit group allocation module 510 in turn distributes commands for each of a plurality of logical unit groups in a solid state storage device.
  • logical unit group selects logical unit group 1, and it is determined by the mapping table (see Fig. 5C) that logical unit group 1 is associated with high priority with write command stream S1 identified by tag T1.
  • the logical unit group assignment module 510 acquires a write command belonging to the write command stream S1.
  • the logical unit group assignment module 510 or the backend processing module 440 also allocates a physical address belonging to the logical unit group 1 for the write command, and writes a write command corresponding to the logical unit group 1 according to the assigned physical address. data.
  • the logical unit group assignment module 510 determines from the mapping table shown in FIG. 5C that the logical unit group 1 is associated with the write command stream identified by the tag T2 with a low priority. S2, and acquires a write command belonging to the write command S2 and performs processing.
  • the logical unit group selects the logical unit group 2, and through the mapping table (see Fig. 5C), determines that the logical unit group 2 is associated with the write command stream S2 identified by the tag T1 with a high priority.
  • the logical unit group assignment module 510 acquires and processes a write command belonging to the write command stream S2.
  • the logical unit group allocation module 510 also maintains a direction The number of data or write commands belonging to the command stream S2 written by the logical unit group 2, if the number of data or write commands belonging to the command stream S2 written to the logical unit group 2 exceeds the threshold, the mapping table is obtained (see FIG. 5C).
  • Another write command stream (write command stream S3) associated with the logical unit group 2 is acquired, and a write command belonging to the write command stream S3 is acquired and processed.
  • the backend processing module 440 selects one of a plurality of logical unit groups (eg, logical unit group 3) in the solid state storage device (610).
  • a write command (620) of the write command stream S3 indicated by the tag T3 is obtained.
  • the tag T3 or write command stream S3 associated with the logical unit group 3 is obtained by a mapping table (see FIG. 5B or FIG. 5C) or other means.
  • a physical address is also assigned to the write command from logical unit group 3.
  • a physical address is allocated from the active chunk of logical unit group 3. Specifically, the current write location of the active chunk is used as the assigned physical address, and the current write location of the active chunk is directed to the next idle location of the active chunk.
  • the assigned physical address is recorded in the FTL table in association with the logical address indicated by the write command, so that the physical address at which the written data is stored can be acquired through the FTL table and the written data can be accessed.
  • the backend processing module 440 (see FIG. 4) or the logical unit group assignment module 510 (see FIG. 5) alternately selects one of the plurality of logical unit groups and performs the method shown in FIG. 6 to the logical unit. The group assigns a write command.
  • the backend processing module 440 (see FIG. 4) or the logical unit group allocation module 510 (see FIG. 5) and acts as a plurality of logical unit groups to allocate write commands.
  • backend processing module 440 (see FIG. 4) or logical unit group allocation module 510 (see FIG. 5) may include multiple processing components (eg, processors, threads, or tasks), each processing component being a logical unit group Assign a write command.
  • the backend processing module (see FIG. 4, backend processing 440) includes a logical unit group allocation module 510 and a write command stream conditioning module 710.
  • the logical unit group assignment module 510 assigns a write command stream to the logical unit group.
  • the write command stream adjustment module 710 adjusts the processing bandwidth of each write command stream.
  • the processing bandwidth of the write command stream can be described by the number of write commands that belong to a write command stream passed in a unit time.
  • write command flow adjustment module 710 provides the maximum processing bandwidth for write command stream S2, providing the next largest processing bandwidth for write command stream S1, and lower or for write command stream S3 and write command stream S4. 0 processing bandwidth.
  • the write command stream adjustment module 710 adjusts the processing bandwidth of each write command stream based on the size of the free storage space (or the number of free chunks) in the solid state storage device. For example, when the free storage of the solid state storage device is sufficiently free (eg, greater than a threshold), the write command stream S1 and/or the write command stream S2 formed by the write command from the user are preferentially processed, for the write command stream S1 and/or the write command stream.
  • S2 provides high processing bandwidth, while limiting write command stream S3 and/or write command stream S4 from garbage collection operations, setting low processing bandwidth for write command stream S3 and/or write command stream S4 or not allowing write command stream S3 and / Or write the command stream S4 through.
  • the storage space of the storage solid-state storage device is insufficient (for example, not larger or smaller than the threshold)
  • the write command flow from the garbage collection operation is preferentially processed to release the storage space, and the write command flow from the user is restricted to slow down the free storage space. Consumption.
  • limit write command stream S1 and/or write command stream S2 set low processing bandwidth for write command stream S1 and/or write command stream S2, and write command stream S3 and/or write command stream S4 from garbage collection operation. Set high processing bandwidth.
  • Backend processing module 440 (see Referring to Figure 4) or logical unit group assignment module 710 (see Figure 7) adjusts the processing bandwidth of the write command stream (810).
  • the backend processing module 440 selects one of a plurality of logical unit groups (eg, logical unit group 4) in the solid state storage device (820).
  • a write command (830) of the write command stream S4 indicated by the tag T4 is obtained.
  • a physical address is also assigned to the write command from logical unit group 4.
  • the assigned physical address is recorded in the FTL table in association with the logical address indicated by the write command, so that the written data can be accessed.
  • the backend processing module 440 (see FIG. 4) or the logical unit group allocation module 510 (see FIG. 7) also updates the association relationship (850) of the logical unit group with the write command stream. For example, after writing a specified number of data from the write command stream S4 to the logical unit group 4, the logical unit group 4 is modified to be preferentially associated with the write command stream 1 (eg, modifying the mapping provided by FIG. 5B or FIG. 5C) Table) to distribute the write command stream 1 more to the logical unit group 4, so that the logical unit group 4 carries the data of the write command stream 1. In another example, the association of the logical unit group with the write command stream is modified based on the lapse of the specified time period.
  • the logical unit group in the mapping table is rotated to replace the logical unit group with the next logical unit group adjacent to a logical unit group number.
  • the logical unit group 2 is the next logical unit group adjacent to the logical unit group number numbering, and when the association relationship provided by the mapping table of FIG. 5B or FIG. 5C is modified, the logical unit group 1 is replaced with the logical unit group 2.
  • logical unit group 2 is replaced with logical unit group 3
  • logical unit group 4 is replaced with logical unit group 1.
  • the embodiment of the present application further provides a program including a program code that, when loaded into a host CPU and executed in a CPU, causes the CPU to execute the above method executed by the host.
  • Embodiments of the present application also provide a program including program code that, when loaded into a storage device and executed on a storage device, causes the processor of the storage device to perform one of the methods performed by the device above.
  • the computer program instructions can also be stored in a computer readable memory that can be booted by a computer or other programmable data control device to function in a particular manner, such that it can be manufactured using instructions stored in the computer readable memory, including for implementing one Or an article of computer readable instructions of a plurality of functions specified in the flowchart box.
  • the computer program instructions can also be loaded onto a computer or other programmable data control device to cause a series of operational operations to be performed on a computer or other programmable data control device to produce a computer-implemented process, which in the computer or other programmable data.
  • the instructions executed on the control device provide operations for implementing the functions specified in one or more of the flowchart blocks.
  • blocks of the block diagrams and flowcharts support combinations of means for performing the specified functions, combinations of operations for performing the specified functions, and combinations of program instruction means for performing the specified functions. It will also be understood that each block of the block diagrams and flowcharts, and combinations of blocks of the block diagrams and flowcharts can be implemented by a hardware-based, special-purpose computer system that performs the specified function or operation, or by a combination of special purpose hardware and computer.

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)

Abstract

提供IO流调节方法与装置,通过处理IO命令调节IO流。提供的处理IO命令的方法,包括:获取第一逻辑单元组;基于第一逻辑单元组,获取具有第一标签的第一IO命令,其中第一逻辑单元组与第一标签相关联;以及向第一逻辑单元组写入数据以响应所述第一IO命令。

Description

IO流调节方法与装置 技术领域
本申请涉及固态硬盘,具体地,涉及在固态硬盘中处理多个写请求流的方法与装置。
背景技术
参看图1,展示了固态存储设备的框图。固态存储设备102同主机相耦合,用于为主机提供存储能力。主机同固态存储设备102之间可通过多种方式相耦合,耦合方式包括但不限于通过例如SATA(Serial Advanced Technology Attachment,串行高级技术附件)、SCSI(Small Computer System Interface,小型计算机系统接口)、SAS(Serial Attached SCSI,串行连接SCSI)、IDE(Integrated Drive Electronics,集成驱动器电子)、USB(Universal Serial Bus,通用串行总线)、PCIE(Peripheral Component Interconnect Express,PCIe,高速外围组件互联)、NVMe(NVM Express,高速非易失存储)、以太网、光纤通道、无线通信网络等连接主机与固态存储设备102。主机可以是能够通过上述方式同存储设备相通信的信息处理设备,例如,个人计算机、平板电脑、服务器、便携式计算机、网络交换机、路由器、蜂窝电话、个人数字助理等。存储设备102包括接口103、控制部件104、一个或多个NVM(非易失存储器,Non-Volatile Memory)芯片105以及DRAM(Dynamic Random Access Memory,动态随机访问存储器)110。NAND闪存、相变存储器、FeRAM、MRAM等是常见的NVM。接口103可适配于通过例如SATA、IDE、USB、PCIE、NVMe、SAS、以太网、光纤通道等方式与主机交换数据。控制部件104用于控制在接口103、NVM芯片105以及固件存储器110之间的数据传输,还用于存储管理、主机逻辑地址到闪存物理地址映射、擦除均衡、坏块管理等。可通过软件、硬件、固件或其组合的多种方式实现控制部件104。控制部件104可以是FPGA(Field-programmable gate array,现场可编程门阵列)、ASIC(Application Specific Integrated Circuit,应用专用集成电路)或者其组合的形式。控制部件104也可以包括处理器或者控制器,在处理器或控制器中执行软件来操纵控制部件104的硬件来处理IO命令。控制部件104还耦合到DRAM110,并可访问DRAM 110的数据。在DRAM可存储FTL表和/或缓存的IO命令的数据。
存储器目标(Target)是NAND闪存封装内的共享芯片使能(CE,Chip Enable)信号的一个或多个逻辑单元(Logic Unit)。每个逻辑单元具有逻辑单元号(LUN,Logic Unit Number)。NAND闪存封装内可包括一个或多个管芯(Die)。典型地,逻辑单元对应于单一的管芯。逻辑单元可包括多个平面(Plane)。逻辑单元内的多个平面可以并行存取,而NAND闪存芯片内的多个逻辑单元可以彼此独立地执行命令和报告状态。在可从http://www.micron.com/~/media/Documents/Products/Other%20Documents/ONFI3_0Gol d.ashx获得的“Open NAND Flash Interface Specification(Revision 3.0)”中,提供了关于目标(target)、逻辑单元、LUN、平面(Plane)的含义,其为现有技术的一部分。
NVM存储介质上通常按页来存储和读取数据。而按块来擦除数据。块包含多个页。存储介质上的页(称为物理页)具有固定的尺寸,例如17664字节。物理页也可以具有其他的尺寸。
在固态存储设备中,利用FTL(Flash Translation Layer,闪存转换层)来维护从逻辑地址到物理地址的映射信息。逻辑地址构成了操作系统等上层软件所感知到的固态存储设备的存储空间。物理地址是用于访问固态存储设备的物理存储单元的地址。在现有技术中还可利用中间地址形态实施地址映射。例如将逻辑地址映射为中间地址,进而将中间地址进一步映射为物理地址。
存储了从逻辑地址到物理地址的映射信息的表结构被称为FTL表。FTL表是固态存储设备中的重要元数据。通常FTL表的数据项记录了固态存储设备中以数据页为单位的地址映射关系。
FTL表包括多个FTL表条目(或称表项)。在一个例子中,每个FTL表条目中记录了一个逻辑页地址与一个物理页的对应关系。在另一个例子中,每个FTL表条目中记录了连续的多个逻辑页地址与连续的多个物理页的对应关系。在又一个实施例中,每个FTL表条目中记录了逻辑块地址与物理块地址的对应关系。在依然又一个实施例中,FTL表中记录逻辑块地址与物理块地址的映射关系,和/或逻辑页地址与物理页地址的映射关系。
发明内容
由于固态硬盘的写命令处理带宽受限于闪存通道数量与备用电池电量,需要以有限的带宽处理多种IO命令,并获得好的性能、用户体验或服务质量。
根据本申请的第一方面,提供了根据本申请第一方面的第一处理IO命令的方法,包括:获取第一逻辑单元组;基于第一逻辑单元组,获取具有第一标签的第一IO命令,其中第一逻辑单元组与第一标签相关联;以及向第一逻辑单元组写入数据以响应所述第一IO命令。
根据本申请的第一方面的第一处理IO命令的方法,提供了根据本申请第一方面的第二处理IO命令的方法,还包括:获取第二逻辑单元组;基于第二逻辑单元组,获取具有第二标签的第二IO命令,其中第二逻辑单元组与第二标签相关联;以及向第二逻辑单元组写入数据以响应所述第二IO命令。
根据本申请的第一方面的第一或第二处理IO命令的方法,提供了根据本申请第一方面的第三处理IO命令的方法,还包括:基于第一逻辑单元组,若不存在待处理的具有第一标签的第一IO命令,获取具有第二标签的第三IO命令;以及向第一逻辑单元组写入数据以响应所述第三IO命令。
根据本申请的第一方面的第二处理IO命令的方法,提供了根据本申请第一方面的第四处理IO命令的方法,还包括:基于第二逻辑单元组,若不存在待处理的具有第二标签的第二IO命令,获取具有第三标签的第四IO命令;以及向第二逻辑单元组写入数据以响应所述第四IO命令。
根据本申请的第一方面的第一至第四处理IO命令的方法之一,提供了根据本申请第一方面的第五处理IO命令的方法,还包括:向逻辑单元组写入数据前,从逻辑单元组为IO命令分配物理地址;以及用IO命令的逻辑地址与物理地址更新FTL表。
根据本申请的第一方面的第一或第二处理IO命令的方法,提供了根据本申请第一方面的第六处理IO命令的方法,还包括:若第一逻辑单元组已经响应了第一数量的第一IO命令,基于第一逻辑单元组,获取具有第二标签的第五IO命令;以及向第一逻辑单元组写入数据以响应所述第五IO命令。
根据本申请的第一方面的第二处理IO命令的方法,提供了根据本申请第一方面的第七处理IO命令的方法,还包括:若第二逻辑单元组已经响应了第二数量的第二 IO命令,基于第二逻辑单元组,获取具有第三标签的第六IO命令;以及向第二逻辑单元组写入数据以响应所述第六IO命令。
根据本申请的第一方面的第一至第七处理IO命令的方法之一,提供了根据本申请第一方面的第八处理IO命令的方法,其中向逻辑单元组写入数据,是向逻辑单元组的活动大块顺序写入数据。
根据本申请的第一方面的第一至第八处理IO命令的方法之一,提供了根据本申请第一方面的第九处理IO命令的方法,还包括:改变逻辑单元组与标签的对应关系,使得第一逻辑单元组与第二标签相关联。
根据本申请的第一方面的第九处理IO命令的方法,提供了根据本申请第一方面的第十处理IO命令的方法,还包括:基于第一逻辑单元组,获取与第一逻辑单元相关联的具有第二标签的IO命令;以及向第一逻辑单元组写入数据以响应IO命令。
根据本申请的第一方面的第三处理IO命令的方法,提供了根据本申请第一方面的第十一处理IO命令的方法,还包括:改变逻辑单元组与标签的对应关系,使得第一逻辑单元组以第一优先级与第二标签相关联,以及第一逻辑单元组以第二优先级与第三标签相关联,其中第一优先级高于第二优先级。
根据本申请的第一方面的第十处理IO命令的方法,提供了根据本申请第一方面的第十二处理IO命令的方法,还包括:基于第一逻辑单元组,根据优先级获取与第一逻辑组单元相关联的具有第二标签的IO命令或具有第三标签的IO命令;以及向第一逻辑单元组写入数据以响应IO命令。
根据本申请的第一方面的第九到第十二处理IO命令的方法之一,提供了根据本申请第一方面的第十三处理IO命令的方法,其中基于向第一逻辑单元组写入了指定量数据,改变第一逻辑单元组与标签的对应关系,使得第一逻辑单元组与第二标签相关联。
根据本申请的第一方面的第九到第十二处理IO命令的方法之一,提供了根据本申请第一方面的第十四处理IO命令的方法,其中基于指定时间间隔的流逝,改变第一逻辑单元组与标签的对应关系,使得第一逻辑单元组与第二标签相关联。
根据本申请的第一方面的第九到第十四处理IO命令的方法之一,提供了根据本申请第一方面的第十五处理IO命令的方法,还包括:改变逻辑单元组与标签的对应关系,使得第二逻辑单元组与第三标签相关联。
根据本申请的第一方面的第一到第十五处理IO命令的方法之一,提供了根据本申请第一方面的第十六处理IO命令的方法,其中第一标签指示顺序写流,第二标签指示随机写流,而第三标签指示来自垃圾回收操作的命令流。
根据本申请的第一方面的第一到第十六处理IO命令的方法之一,提供了根据本申请第一方面的第十七处理IO命令的方法,还包括:接收IO命令。
根据本申请的第一方面的第十七处理IO命令的方法,提供了根据本申请第一方面的第十八处理IO命令的方法,还包括:为IO命令设置标签。
根据本申请的第一方面的第十七或第十八处理IO命令的方法,提供了根据本申请第一方面的第十九处理IO命令的方法,还包括:根据空闲大块的数量调整具有不同标签的IO命令的处理带宽。
根据本申请的第一方面的第十九处理IO命令的方法,提供了根据本申请第一方面的第二十处理IO命令的方法,其中若空闲大块的数量低于阈值,降低具有第一标签和/或第二标签的IO命令的处理带宽,提高具有第三标签的IO命令的处理带宽。
根据本申请的第一方面的第十九或第二十处理IO命令的方法,提供了根据本申请第一方面的第二十一处理IO命令的方法,其中若空闲大块的数量不低于阈值,提高具有第一标签和/或第二标签的IO命令的处理带宽,降低具有第三标签的IO命令 的处理带宽。
根据本申请的第一方面的第十九到第二十一处理IO命令的方法之一,提供了根据本申请第一方面的第二十二处理IO命令的方法,其中IO命令的处理带宽为单位时间内处理的具有指定标签的IO命令的数量。
根据本申请的第二方面,提供了根据本申请第二方面的第一处理IO命令的装置,包括:用于获取第一逻辑单元组的模块;用于基于第一逻辑单元组,获取具有第一标签的第一IO命令的模块,其中第一逻辑单元组与第一标签相关联;以及用于向第一逻辑单元组写入数据以响应所述第一IO命令的模块。
根据本申请的第二方面的第一处理IO命令的装置,提供了根据本申请第二方面的第二处理IO命令的装置,还包括:用于获取第二逻辑单元组的模块;用于基于第二逻辑单元组,获取具有第二标签的第二IO命令的模块,其中第二逻辑单元组与第二标签相关联;以及用于向第二逻辑单元组写入数据以响应所述第二IO命令的模块。
根据本申请的第二方面的第一或第二处理IO命令的装置,提供了根据本申请第二方面的第三处理IO命令的装置,还包括:用于基于第一逻辑单元组,若不存在待处理的具有第一标签的第一IO命令,获取具有第二标签的第三IO命令的模块;以及用于向第一逻辑单元组写入数据以响应所述第三IO命令的模块。
根据本申请的第二方面的第二处理IO命令的装置,提供了根据本申请第二方面的第四处理IO命令的装置,还包括:用于基于第二逻辑单元组,若不存在待处理的具有第二标签的第二IO命令,获取具有第三标签的第四IO命令的模块;以及用于向第二逻辑单元组写入数据以响应所述第四IO命令的模块。
根据本申请的第二方面的第一至第四处理IO命令的装置之一,提供了根据本申请第二方面的第五处理IO命令的装置,还包括:用于向逻辑单元组写入数据前,从逻辑单元组为IO命令分配物理地址的模块;以及用于用IO命令的逻辑地址与物理地址更新FTL表的模块。
根据本申请的第二方面的第一或第二处理IO命令的装置,提供了根据本申请第二方面的第六处理IO命令的装置,还包括:用于若第一逻辑单元组已经响应了第一数量的第一IO命令,基于第一逻辑单元组,获取具有第二标签的第五IO命令的模块;以及用于向第一逻辑单元组写入数据以响应所述第五IO命令的模块。
根据本申请的第二方面的第二处理IO命令的装置,提供了根据本申请第二方面的第七处理IO命令的装置,还包括:用于若第二逻辑单元组已经响应了第二数量的第二IO命令,基于第二逻辑单元组,获取具有第三标签的第六IO命令的模块;以及用于向第二逻辑单元组写入数据以响应所述第六IO命令的模块。
根据本申请的第二方面的第一至第七处理IO命令的装置之一,提供了根据本申请第二方面的第八处理IO命令的装置,其中向逻辑单元组写入数据,是向逻辑单元组的活动大块顺序写入数据。
根据本申请的第二方面的第一至第八处理IO命令的装置之一,提供了根据本申请第二方面的第九处理IO命令的装置,还包括:用于改变逻辑单元组与标签的对应关系,使得第一逻辑单元组与第二标签相关联的模块。
根据本申请的第二方面的第九处理IO命令的装置,提供了根据本申请第二方面的第十处理IO命令的装置,还包括:用于基于第一逻辑单元组,获取与第一逻辑单元相关联的具有第二标签的IO命令的模块;以及用于向第一逻辑单元组写入数据以响应IO命令的模块。
根据本申请的第二方面的第三处理IO命令的装置,提供了根据本申请第二方面的第十一处理IO命令的装置,还包括:用于改变逻辑单元组与标签的对应关系,使得第一逻辑单元组以第一优先级与第二标签相关联,以及第一逻辑单元组以第二优先 级与第三标签相关联的模块,其中第一优先级高于第二优先级。
根据本申请的第二方面的第十处理IO命令的装置,提供了根据本申请第二方面的第十二处理IO命令的装置,还包括:用于基于第一逻辑单元组,根据优先级获取与第一逻辑组单元相关联的具有第二标签的IO命令或具有第三标签的IO命令的模块;以及用于向第一逻辑单元组写入数据以响应IO命令的模块。
根据本申请的第二方面的第九至第十二处理IO命令的装置之一,提供了根据本申请第二方面的第十三处理IO命令的装置,其中基于向第一逻辑单元组写入了指定量数据,改变第一逻辑单元组与标签的对应关系,使得第一逻辑单元组与第二标签相关联。
根据本申请的第二方面的第九至第十二处理IO命令的装置之一,提供了根据本申请第二方面的第十四处理IO命令的装置,其中基于指定时间间隔的流逝,改变第一逻辑单元组与标签的对应关系,使得第一逻辑单元组与第二标签相关联。
根据本申请的第二方面的第九至第十四处理IO命令的装置之一,提供了根据本申请第二方面的第十五处理IO命令的装置,还包括:用于改变逻辑单元组与标签的对应关系,使得第二逻辑单元组与第三标签相关联的模块。
根据本申请的第二方面的第一至第十五处理IO命令的装置之一,提供了根据本申请第二方面的第十六处理IO命令的装置,其中第一标签指示顺序写流,第二标签指示随机写流,而第三标签指示来自垃圾回收操作的命令流。
根据本申请的第二方面的第一至第十六处理IO命令的装置之一,提供了根据本申请第二方面的第十七处理IO命令的装置,还包括:用于接收IO命令的模块。
根据本申请的第二方面的第十七处理IO命令的装置,提供了根据本申请第二方面的第十八处理IO命令的装置,用于为IO命令设置标签的模块。
根据本申请的第二方面的第十七或第十八处理IO命令的装置,提供了根据本申请第二方面的第十九处理IO命令的装置,还包括:用于根据空闲大块的数量调整具有不同标签的IO命令的处理带宽的模块。
根据本申请的第二方面的第十九处理IO命令的装置,提供了根据本申请第二方面的第二十处理IO命令的装置,其中若空闲大块的数量低于阈值,降低具有第一标签和/或第二标签的IO命令的处理带宽,提高具有第三标签的IO命令的处理带宽的模块。
根据本申请的第二方面的第十九处理IO命令的装置,提供了根据本申请第二方面的第二十一处理IO命令的装置,其中若空闲大块的数量不低于阈值,提高具有第一标签和/或第二标签的IO命令的处理带宽,降低具有第三标签的IO命令的处理带宽。
根据本申请的第二方面的第十九至第二十一处理IO命令的装置之一,提供了根据本申请第二方面的第二十二处理IO命令的装置,其中IO命令的处理带宽为单位时间内生成的具有标签的IO命令的数量。
根据本申请的第三方面,提供了根据本申请第三方面的第一处理IO命令的固态存储设备,包括,控制器与非易失存储器;非易失存储器包括多个存储单元组;控制器选择第一逻辑单元组,基于第一逻辑单元组,获取具有第一标签的第一IO命令,其中第一逻辑单元组与第一标签相关联,以及向第一逻辑单元组写入数据以响应所述第一IO命令。
根据本申请的第三方面的第一处理IO命令的固态存储设备,提供了根据本申请第三方面的第二处理IO命令的固态存储设备,其中:所述控制器还选择第二逻辑单元组;基于第二逻辑单元组,获取具有第二标签的第二IO命令,其中第二逻辑单元组与第二标签相关联;以及向第二逻辑单元组写入数据以响应所述第二IO命令。
根据本申请的第三方面的第一或第二处理IO命令的固态存储设备,提供了根据本申请第三方面的第三处理IO命令的固态存储设备,所述控制器包括主机接口、前端处理部件与后端处理部件,主机接口接收IO命令,并转发给前端处理部件;前端处理部件为IO命令设置标签,并转发给后端处理部件;后端处理部件选择第一逻辑单元组,基于第一逻辑单元组,获取具有第一标签的第一IO命令,其中第一逻辑单元组与第一标签相关联,以及向第一逻辑单元组写入数据以响应所述第一IO命令。
根据本申请的第三方面的第三处理IO命令的固态存储设备,提供了根据本申请第三方面的第四处理IO命令的固态存储设备,其中,所述后端处理部件还根据空闲大块的数量调整具有不同标签的IO命令的处理带宽。
根据本申请的第三方面的第三或第四处理IO命令的固态存储设备,提供了根据本申请第三方面的第五处理IO命令的固态存储设备,其中,所述后端处理部件还调整逻辑单元组与标签的关联关系。
根据本申请的第四方面,提供了根据本申请第四方面的一种包括指令代码的程序,当被载入固态存储设备并在固态存储设备的控制器上执行时,所述程序代码使所述控制器执行根据本申请第一方面所述的方法。
根据本申请的第五方面,提供了根据本申请第五方面的一种固态存储设备,包括控制器与非易失存储器,非易失存储器包括多个存储单元组;控制器通过执行程序来执行根据根据本申请第一方面所述的方法。
根据本申请的第六方面,提供了根据本申请第六方面的第一固态存储设备,包括控制器与非易失存储器,非易失存储器包括多个存储单元组;控制器通过执行程序来:获取第一逻辑单元组;基于第一逻辑单元组,获取具有第一标签的第一IO命令,其中第一逻辑单元组与第一标签相关联;以及向第一逻辑单元组写入数据以响应所述第一IO命令。
根据本申请的第六方面的第一固态存储设备,提供了根据本申请第六方面的第二固态存储设备,其中,所述控制器还选择第二逻辑单元组;基于第二逻辑单元组,获取具有第二标签的第二IO命令,其中第二逻辑单元组与第二标签相关联;以及向第二逻辑单元组写入数据以响应所述第二IO命令。
根据本申请的第六方面的第一或第二固态存储设备,提供了根据本申请第六方面的第三固态存储设备,其中所述控制器:接收IO命令;为IO命令设置标签;选择第一逻辑单元组,基于第一逻辑单元组,获取具有第一标签的第一IO命令,其中第一逻辑单元组与第一标签相关联;以及向第一逻辑单元组写入数据以响应所述第一IO命令。
根据本申请的第六方面的第三固态存储设备,提供了根据本申请第六方面的第四固态存储设备,其中所述控制器还根据空闲大块的数量调整具有不同标签的IO命令的处理带宽。
根据本申请的第六方面的第三或第四固态存储设备,提供了根据本申请第六方面的第五固态存储设备,其中所述控制器还调整逻辑单元组与标签的关联关系。
附图说明
当连同附图阅读时,通过参考后面对示出性的实施例的详细描述,将最佳地理解本申请以及优选的使用模式和其进一步的目的和优点,其中附图包括:
图1展示了固态存储设备的框图;
图2示出了根据本申请实施例的大块的示意图;
图3示出了根据本申请实施例的逻辑单元组的示意图;
图4示出了根据本申请实施例的固态存储设备对IO命令进行处理的示意图;
图5A是根据本申请实施例的写命令流到逻辑单元组的映射的示意图;
图5B是根据本申请实施例的写命令流与逻辑单元组的映射表;
图5C是根据本申请另一实施例的写命令流与逻辑单元组的映射表;
图6是根据本申请实施例的处理IO命令的流程图;
图7是根据本申请又一实施例的写命令流到逻辑单元组的映射的示意图;以及
图8是根据本申请又一实施例的处理IO命令的流程图。
具体实施方式
参看图2,示出了根据本申请实施例的大块的示意图。固态存储设备中包括多个NVM芯片。每个NVM芯片包括一个或多个逻辑单元。大块包括来自多个逻辑单元的每个的物理块。优选的,每个逻辑单元为大块提供一个物理块。作为举例,在每16个逻辑单元(LUN)上构造大块。每个大块包括16个物理块,来自16个逻辑单元(LUN)的每一个。在图2的例子中,大块0包括来自16个逻辑单元(LUN)的每个的物理块0,而大块1包括来自每个逻辑单元(LUN)的物理块1。也可以有多种其他方式来构造大块。
在大块中构造页条带,每个逻辑单元(LUN)内相同物理地址的物理页构成了“页条带”。图2中,物理页0-0、物理页0-1……与物理页0-x构成了页条带0,其中物理页0-0、物理页0-1……物理页0-14用于存储用户数据,而物理页0-15用于存储根据条带内的所有用户数据计算得到的校验数据。类似地,图2中,页物理页2-0、物理页2-1……与物理页2-x构成了页条带2。可选地,用于存储校验数据的物理页可以位于页条带中的任意位置。
参看图3,示出了根据本申请实施例的逻辑单元组的示意图。在图3中,在每16个逻辑单元上构造大块,用于构造大块的16个逻辑单元构成逻辑单元组。如图3所示,逻辑单元0(LUN 0)到逻辑单元15(LUN 15)构成逻辑单元组1(LUN组1),逻辑单元16(LUN 16)到逻辑单元31(LUN 31)构成逻辑单元组2(LUN组2),逻辑单元32(LUN 32)到逻辑单元47(LUN 47)构成逻辑单元组3(LUN组3),逻辑单元48(LUN 48)到逻辑单元63(LUN 63)构成逻辑单元组4(LUN组4)。虽然图3中展示的每个逻辑单元组有16个逻辑单元,显然,可采用其他的配置,以在逻辑单元组中提供不同数量的逻辑单元。
固态存储设备中,LUN组的数量体现了固态存储设备并行处理IO命令的能力。每个逻辑单元组中同一时刻至多有1个大块在被写入数据。逻辑单元组中当前可被写入数据的大块称为活动大块。
固态存储设备用于处理IO命令。IO命令包括多种属性。例如属性指示IO命令是读命令还是写命令。属性还指示IO命令的发生频率、顺序性、随机性、后续IO命令、时间/空间亲和性等。在多种标准中,定义了IO命令的属性。
在IO命令处理的多个阶段为IO命令设置属性。例如应用程序可基于应用特点、用户场景等在IO命令中设置属性。操作系统/存储驱动程序或协议可为IO命令设置属性,例如,标注IO命令来自哪个虚拟机或操作系统,或将应用在IO命令中标注的属性转换为协议定义的形式。存储设备也可为IO命令设置属性。例如,发明名称为顺序流检测方法与装置的中国专利申请(申请号CN201610169011.1)中,存储设备基于IO命令访问的逻辑地址来为IO命令标注指示顺序性和/或随机性的属性,将其全文以引用方式合并于此。存储设备还可以基于历史信息、规则、或机器学习结果为IO命令分类并设置属性。
IO命令的属性可由在IO命令中携带的标签指示。应用、驱动程序、操作系统、存储设备也可将IO命令中的属性转换为标签。标签具有有限的或多样化的含义。例如,标签包括T1、T2、T3、T4与T5,而T1到T3分别代表三个顺序写流之一,而T4代表随机写流,T5代表GC(垃圾回收)写流。可以提供其他标签,来指示其他含义的IO命令。
在处理IO命令时,依据IO命令中的标签,可对IO命令的处理进行优化。
图4示出了根据本申请实施例的固态存储设备对IO命令进行处理的示意图。固态存储设备的控制部件104包括主机接口410、前端处理模块420与后端处理模块440。
主机接口410用于同主机交换命令与数据。在一个例子中,主机与存储设备通过NVMe/PCIe协议通信,主机接口410处理PCIe协议数据包,提取出NVMe协议命令,并向主机返回NVMe协议命令的处理结果。主机接口410接收到访问固态存储设备的多个IO命令(在图4中示出为A1,B1,C2,B2,A3,B4,C1以及B1)。前端处理模块420对从主机接口410收到的IO命令标注标签。在图4中,携带标签T1的IO命令,构成写命令流S1,携带标签T2的IO命令构成写命令流S2,携带标签T3的IO命令构成写命令流S3而携带标签T5的IO命令构成写命令流S5。作为举例,写命令流S1为顺序流,其中的IO命令大体上向连续的逻辑地址空间写入数据;写命令流S2为另一顺序流,其中的IO命令大体上向连续的逻辑地址空间写入数据,写命令流S3为来自垃圾回收(GC)任务的命令流,写命令流S4为来自另一垃圾回收任务的命令流。前端模块420采用申请号为CN201610169011.1的中国专利申请(发明名称为“顺序流检测方法与装置”)中公开的方案生成写命令流S1和/或写命令流S2,可选地,前端模块420采用现有技术或将来可实现并为本领域技术人员所知悉的方式为IO命令设置标签以将IO命令归类为多个写命令流。前端模块所标注的命令流可以有不同的数量,并在IO命令中设置标签来区分命令流。
后端处理模块440接收写命令流,并访问一个或多个NVM芯片。图4中,多个NVM芯片构成逻辑单元组,包括逻辑单元组401、逻辑单元组403、逻辑单元组405与逻辑单元组407。后端处理模块将写命令流分配到不同的逻辑单元组。优选地,将属于同一写命令流的写命令分配到同一逻辑单元组,以增强数据在NVM芯片105中的空间局部性。例如,将写命令流S1分配到逻辑单元组401,将写命令流S2分配到逻辑单元组403,将写命令流S3分配到逻辑单元组405以及将写命令流S4分配到逻辑单元407。
还在FTL表中记录写命令流的写命令的逻辑地址与写命令被写入的物理地址的对应关系。可由后端处理模块440更新FTL表,或由控制部件104的其他部件来更新FTL表。
图5A是根据本申请实施例的写命令流到逻辑单元组的映射的示意图。在后端处理模块(参看图4,后端处理模块440)中的逻辑单元组分配模块510,将写命令流分配到逻辑单元组。维护映射表,记录写命令流与逻辑单元的映射关系。
图5B是根据本申请实施例的写命令流与逻辑单元组的映射表。依据图5B,将写命令流S1映射到逻辑单元组1,将写命令流S2映射到逻辑单元组2,将写命令流S3映射到逻辑单元组3以及将写命令流S4映射到逻辑单元组4。
返回参看图5A,逻辑单元组分配模块510依据映射表,为写命令流分配逻辑单元组。在一个例子中,逻辑单元组分配模块510获取写命令,从写命令中的标签(例如,T1)识别写命令所属的写命令流(例如,S1),并依据标签(T1)从映射表中获得对应的逻辑单元组(例如,逻辑单元组1)。后端处理模块440(参看图4)还为写命令分配属于逻辑单元组1的物理地址。为执行写命令,根据所分配的物理地址 向逻辑单元组1写入写命令所对应的数据。以及还更新FTL表,在FTL表中记录写命令的逻辑地址与所分配的逻辑单元组1的物理地址的对应关系。
在另一个例子中,逻辑单元组分配模块510选择逻辑单元组,并为其分配写命令。例如,逻辑单元组分配模块510轮流为固态存储设备中的多个逻辑单元组的每个分配命令。作为举例,逻辑单元组选择逻辑单元组2,通过映射表(参看图5B)确定逻辑单元组2关联于由标签T2识别的写命令流S2。逻辑单元组分配模块510获取属于写命令流S2的写命令。逻辑单元组分配模块510或后端处理模块440(参看图4)还为写命令分配属于逻辑单元组2的物理地址。为执行写命令,根据所分配的物理地址向逻辑单元组2写入写命令所对应的数据。
在依然另一个例子中,逻辑单元组分配模块510并行地为多个逻辑单元组分配写命令。
在根据本申请的实施例中,写命令流S1是顺序写流,写命令流S2是随机写流,写命令流S3是来自垃圾回收任务的命令流,写命令流S4是来自另一垃圾回收任务的命令流。通过将写命令流映射到特定的逻辑单元组,使得属于相同写命令流(例如写命令流S1)的数据被存储在相同的存储单元组(例如,逻辑单元组1)中,从而增强数据在固态存储设备中的空间局部性,并进而降低固态存储设备的写放大。通过在逻辑单元组中执行垃圾回收操作来为存储单元组释放空闲存储空间。选择适当的时机,将其他写命令流(写命令流S2、写命令流S3或写命令S4分配到逻辑单元组1(例如,逻辑单元组2),或者将写命令流S1分配到其他逻辑单元组(逻辑单元组2、逻辑单元组3或逻辑单元组4),以充分利用固态存储设备中的存储空间。
在一定条件下,调整逻辑单元组与写命令流的映射关系。例如,向一个逻辑单元组写入指定量的数据后,改变该逻辑单元组与写命令流的映射关系;和/或,在指定的时间间隔,改变逻辑单元组与写命令流的映射关系;和/或基于逻辑单元组的空闲存储空间数量,改变该逻辑单元组与写命令流的映射关系;和/或依据用户的指示,改变逻辑单元组与写命令流的映射关系。为改变逻辑单元组与写命令流的映射关系,修改如图5B所示的映射表。
图5C是根据本申请另一实施例的写命令流与逻辑单元组的映射表。依据图5C,为逻辑单元组1(LUN组1)以高优先级分配写命令流S1的写命令,以低优先级分配写命令流S2的写命令;为逻辑单元组2(LUN组2)以高优先级分配写命令流S2的写命令,以低优先级分配写命令流S3的写命令;为逻辑单元组3(LUN组3)以高优先级分配写命令流S3的写命令,以低优先级分配写命令流S4的写命令;为逻辑单元组4(LUN组4)以高优先级分配写命令流S4的写命令,以低优先级分配写命令流S1的写命令。
例如,逻辑单元组分配模块510轮流为固态存储设备中的多个逻辑单元组的每个分配命令。作为举例,逻辑单元组选择逻辑单元组1,通过映射表(参看图5C)确定逻辑单元组1以高优先级关联于由标签T1识别的写命令流S1。逻辑单元组分配模块510获取属于写命令流S1的写命令。逻辑单元组分配模块510或后端处理模块440(参看图4)还为写命令分配属于逻辑单元组1的物理地址,并根据所分配的物理地址向逻辑单元组1写入写命令所对应的数据。在一些情况下,不存在属于写命令流S1的写命令,逻辑单元组分配模块510从图5C所示的映射表中确定逻辑单元组1以低优先级关联于由标签T2识别的写命令流S2,并获取属于写命令S2的写命令并进行处理。
在另一个例子中,逻辑单元组选择逻辑单元组2,通过映射表(参看图5C)确定逻辑单元组2以高优先级关联于由标签T1识别的写命令流S2。逻辑单元组分配模块510获取属于写命令流S2的写命令并处理。逻辑单元组分配模块510还维护向 逻辑单元组2写入的属于命令流S2的数据或写命令的数量,若向逻辑单元组2写入的属于命令流S2的数据或写命令的数量超过阈值,则从映射表(参看图5C)中获取同逻辑单元组2相关联的另一优先级的写命令流(写命令流S3),并获取属于写命令流S3的写命令并处理。
图6是根据本申请实施例的处理IO命令的流程图。后端处理模块440(参看图4)或逻辑单元组分配模块510(参看图5)选择固态存储设备中的多个逻辑单元组之一(例如,逻辑单元组3)(610)。获取由标签T3所指示的写命令流S3的写命令(620)。作为举例,通过映射表(参看图5B或图5C)或其他方式获取与逻辑单元组3相关联的标签T3或写命令流S3。以及向逻辑单元组3写入来自写命令流S3的该写命令的数据(630)。
为向逻辑单元组(例如,逻辑单元组3)写入命令,在步骤620之后,还从逻辑单元组3为写命令分配物理地址。为增加数据在逻辑单元组中的局部性,从逻辑单元组3的活动大块中分配物理地址。特别地,用活动大块的当前写入位置作为分配的物理地址,并使活动大块的当前写入位置指向活动大块的下一空闲位置。
将分配的物理地址与写命令所指示的逻辑地址相关联地记录在FTL表中,从而可通过FTL表获取存储被写入数据的物理地址并访问被写入的数据。
在一个例子中,后端处理模块440(参看图4)或逻辑单元组分配模块510(参看图5)轮流选择多个逻辑单元组之一,并通过执行图6所示的方法来向逻辑单元组分配写命令。在另一个例子中,后端处理模块440(参看图4)或逻辑单元组分配模块510(参看图5)并行为多个逻辑单元组分配写命令。例如,后端处理模块440(参看图4)或逻辑单元组分配模块510(参看图5)可包括多个处理部件(例如,处理器、线程或任务),每个处理部件为一个逻辑单元组分配写命令。
图7是根据本申请又一实施例的写命令流到逻辑单元组的映射的示意图。后端处理模块(参看图4,后端处理440)包括逻辑单元组分配模块510与写命令流调节模块710。逻辑单元组分配模块510将写命令流分配到逻辑单元组。写命令流调节模块710调节各写命令流的处理带宽。可利用单位时间内通过的属于一写命令流的写命令的数量来描述该写命令流的处理带宽。在图7中,写命令流调节模块710为写命令流S2提供最大的处理带宽,为写命令流S1提供次大的处理带宽,而为写命令流S3与写命令流S4提供较低或为0的处理带宽。
通过调节写命令流的处理带宽,能够为不同写命令流定制不同的服务质量等级,还能够调节处理来自用户的写命令与来自垃圾回收的写命令的数量的比例。
在固态存储设备中的空闲存储空间不足时,通过执行垃圾回收操作,释放存储空间。但垃圾回收操作会占用固态存储设备的处理带宽,并对用户IO命令(读命令和/或写命令)的处理造成的影响。在根据本申请的实施例中,写命令流调节模块710基于固态存储设备中空闲存储空间的大小(或空闲大块的数量),调节各写命令流的处理带宽。例如,固态存储设备的空闲存储空闲充足(例如,大于阈值)时,优先处理来自用户的写命令形成的写命令流S1和/或写命令流S2,为写命令流S1和/或写命令流S2提供高处理带宽,而限制来自垃圾回收操作的写命令流S3和/或写命令流S4,为写命令流S3和/或写命令流S4设置低处理带宽或不允许写命令流S3和/或写命令流S4通过。而在存固态存储设备的存储空间不足(例如,不大于或小于阈值)时,优先处理来自垃圾回收操作的写命令流以释放存储空间,并限制来自用户的写命令流以减缓对空闲存储空间的消耗。例如,限制写命令流S1和/或写命令流S2,为写命令流S1和/或写命令流S2设置低处理带宽,而为来自垃圾回收操作的写命令流S3和/或写命令流S4设置高处理带宽。
图8是根据本申请又一实施例的处理IO命令的流程图。后端处理模块440(参 看图4)或逻辑单元组分配模块710(参看图7)调节写命令流的处理带宽(810)。为具有不同标签的不同写命令流设置不同的处理带宽。例如,在空闲存储空间充足时,为来自用户的写命令流设置相对高的处理带宽,而为来自垃圾回收操作的写命令流设置相对低的处理带宽。而在空闲存储空间不足时,为来自用户的写命令流设置相对低的处理带宽,而为来自垃圾回收操作的写命令流设置相对高的处理带宽。
后端处理模块440(参看图4)或逻辑单元组分配模块510(参看图7)选择固态存储设备中的多个逻辑单元组之一(例如,逻辑单元组4)(820)。获取由标签T4所指示的写命令流S4的写命令(830)。以及向逻辑单元组4写入来自写命令流S4的该写命令的数据(840)。
为向逻辑单元组(例如,逻辑单元组4)写入命令,在步骤830之后,还从逻辑单元组4为写命令分配物理地址。将分配的物理地址与写命令所指示的逻辑地址相关联地记录在FTL表中,从而可访问被写入的数据。
后端处理模块440(参看图4)或逻辑单元组分配模块510(参看图7)还更新逻辑单元组与写命令流的关联关系(850)。例如,在向逻辑单元组4写入了指定数量的来自写命令流S4的数据后,将逻辑单元组4修改为优先与写命令流1相关联(例如,修改图5B或图5C提供的映射表),以将写命令流1更多的分布到逻辑单元组4,使逻辑单元组4来承载写命令流1的数据。在另一个例子中,基于指定时间段的流逝,修改逻辑单元组与写命令流的关联关系。作为另一个例子,为修改逻辑单元组与写命令流的关联关系,对映射表中的逻辑单元组进行轮转,以与一逻辑单元组编号上相邻的下一逻辑单元组替代该逻辑单元组。例如,逻辑单元组2是与逻辑单元组1编号上相邻的下一逻辑单元组,在修改图5B或图5C的映射表提供的关联关系时,以逻辑单元组2替换逻辑单元组1。类似地,以逻辑单元组3替换逻辑单元组2,以及以逻辑单元组1替换逻辑单元组4。
本申请实施例还提供一种包含程序代码的程序,当被载入主机CPU并在CPU中执行时,所述程序代码使所述CPU执行上面的由主机执行的方法。
本申请实施例还提供一种包括程序代码的程序,当被载入存储设备并在存储设备上执行时,所述程序使所述存储设备的处理器执行上面由设备执行的方法之一。
应该理解,框图和流程图的每个框以及框图和流程图的框的组合可以分别由包括计算机程序指令的各种装置来实施。这些计算机程序指令可以加载到通用计算机、专用计算机或其他可编程数据控制设备上以产生机器,从而在计算机或其他可编程数据控制设备上执行的指令创建了用于实现一个或多个流程图框中指定的功能的装置。
这些计算机程序指令还可以存储在可以引导计算机或其他可编程数据控制设备的计算机可读存储器中从而以特定方式起作用,从而能够利用存储在计算机可读存储器中的指令来制造包括用于实现一个或多个流程图框中所指定功能的计算机可读指令的制品。计算机程序指令还可以加载到计算机或其他可编程数据控制设备上以使得在计算机或其他可编程数据控制设备上执行一系列的操作操作,从而产生计算机实现的过程,进而在计算机或其他可编程数据控制设备上执行的指令提供了用于实现一个或多个流程图框中所指定功能的操作。
因而,框图和流程图的框支持用于执行指定功能的装置的组合、用于执行指定功能的操作的组合和用于执行指定功能的程序指令装置的组合。还应该理解,框图和流程图的每个框以及框图和流程图的框的组合可以由执行指定功能或操作的、基于硬件的专用计算机系统实现,或由专用硬件和计算机指令的组合实现。
虽然当前发明参考的示例被描述,其只是为了解释的目的而不是对本申请的限制,对实施方式的改变,增加和/或删除可以被做出而不脱离本申请的范围。
这些实施方式所涉及的、从上面描述和相关联的附图中呈现的教导获益的领域中的技术人员将认识到这里记载的本申请的很多修改和其他实施方式。因此,应该理解,本申请不限于公开的具体实施方式,旨在将修改和其他实施方式包括在所附权利要求书的范围内。尽管在这里采用了特定的术语,但是仅在一般意义和描述意义上使用它们并且不是为了限制的目的而使用。

Claims (10)

  1. 一种处理IO命令的方法,包括:
    获取第一逻辑单元组;
    基于第一逻辑单元组,获取具有第一标签的第一IO命令,其中第一逻辑单元组与第一标签相关联;以及
    向第一逻辑单元组写入数据以响应所述第一IO命令。
  2. 根据权利要求1所述的方法,还包括:
    获取第二逻辑单元组;
    基于第二逻辑单元组,获取具有第二标签的第二IO命令,其中第二逻辑单元组与第二标签相关联;以及
    向第二逻辑单元组写入数据以响应所述第二IO命令。
  3. 根据权利要求1-2之一所述的方法,还包括:
    基于第一逻辑单元组,若不存在待处理的具有第一标签的第一IO命令,获取具有第二标签的第三IO命令;以及
    向第一逻辑单元组写入数据以响应所述第三IO命令。
  4. 根据权利要求1-3之一所述的方法,还包括:
    向逻辑单元组写入数据前,从逻辑单元组为IO命令分配物理地址;以及
    用IO命令的逻辑地址与物理地址更新FTL表。
  5. 根据权利要求1-4之一所述的方法,还包括:
    若第一逻辑单元组已经响应了第一数量的第一IO命令,基于第一逻辑单元组,获取具有第二标签的第四IO命令;以及
    向第一逻辑单元组写入数据以响应所述第四IO命令。
  6. 根据权利要求1-5之一所述的方法,还包括:
    改变逻辑单元组与标签的对应关系,使得第一逻辑单元组与第二标签相关联。
  7. 根据权利要求1-6之一所述的方法,还包括:
    根据空闲大块的数量调整具有不同标签的IO命令的处理带宽。
  8. 一种处理IO命令的装置,包括:
    用于获取第一逻辑单元组的模块;
    用于基于第一逻辑单元组,获取具有第一标签的第一IO命令的模块,其中第一逻辑单元组与第一标签相关联;以及
    用于向第一逻辑单元组写入数据以响应所述第一IO命令的模块。
  9. 一种处理IO命令的固态存储设备,包括控制器与非易失存储器;
    非易失存储器包括多个存储单元组;
    控制器选择第一逻辑单元组,基于第一逻辑单元组,获取具有第一标签的第一IO命令,其中第一逻辑单元组与第一标签相关联,以及
    向第一逻辑单元组写入数据以响应所述第一IO命令。
  10. 一种固态存储设备,包括控制器与非易失存储器,非易失存储器包括多个存储单元组;
    控制器通过执行程序来执行根据权利要求1-7之一所述的方法。
PCT/CN2017/095662 2016-08-04 2017-08-02 Io流调节方法与装置 Ceased WO2018024214A1 (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
CN201610633214.1 2016-08-04
CN201610633214 2016-08-04
CN201610836522.4 2016-09-21
CN201610836522.4A CN107688435B (zh) 2016-08-04 2016-09-21 Io流调节方法与装置

Publications (1)

Publication Number Publication Date
WO2018024214A1 true WO2018024214A1 (zh) 2018-02-08

Family

ID=61072508

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2017/095662 Ceased WO2018024214A1 (zh) 2016-08-04 2017-08-02 Io流调节方法与装置

Country Status (1)

Country Link
WO (1) WO2018024214A1 (zh)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110554833A (zh) * 2018-05-31 2019-12-10 北京忆芯科技有限公司 存储设备中并行处理io命令
CN110955609A (zh) * 2018-09-26 2020-04-03 北京忆恒创源科技有限公司 用于多流、开放通道存储设备的演进的自动流跟踪(east)
CN110955613A (zh) * 2018-09-26 2020-04-03 北京忆恒创源科技有限公司 存储设备的智能数据分流与流跟踪
CN110968528A (zh) * 2018-09-30 2020-04-07 北京忆恒创源科技有限公司 应用统一缓存架构为非易失存储介质组装数据
CN112115065A (zh) * 2019-06-20 2020-12-22 北京忆芯科技有限公司 存储设备的统一地址空间
CN116048427A (zh) * 2023-03-31 2023-05-02 北京忆恒创源科技股份有限公司 一种管理ssd闪存资源的方法及存储设备

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102799487A (zh) * 2012-06-29 2012-11-28 记忆科技(深圳)有限公司 基于阵列/lun的io调度方法及装置
CN103250143A (zh) * 2012-12-28 2013-08-14 华为技术有限公司 数据存储方法和存储设备
CN104182701A (zh) * 2014-08-15 2014-12-03 华为技术有限公司 一种阵列控制器、阵列和数据处理方法
CN104423889A (zh) * 2013-08-26 2015-03-18 国际商业机器公司 一种多路径管理方法和系统

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102799487A (zh) * 2012-06-29 2012-11-28 记忆科技(深圳)有限公司 基于阵列/lun的io调度方法及装置
CN103250143A (zh) * 2012-12-28 2013-08-14 华为技术有限公司 数据存储方法和存储设备
CN104423889A (zh) * 2013-08-26 2015-03-18 国际商业机器公司 一种多路径管理方法和系统
CN104182701A (zh) * 2014-08-15 2014-12-03 华为技术有限公司 一种阵列控制器、阵列和数据处理方法

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110554833A (zh) * 2018-05-31 2019-12-10 北京忆芯科技有限公司 存储设备中并行处理io命令
CN110554833B (zh) * 2018-05-31 2023-09-19 北京忆芯科技有限公司 存储设备中并行处理io命令
CN110955609A (zh) * 2018-09-26 2020-04-03 北京忆恒创源科技有限公司 用于多流、开放通道存储设备的演进的自动流跟踪(east)
CN110955613A (zh) * 2018-09-26 2020-04-03 北京忆恒创源科技有限公司 存储设备的智能数据分流与流跟踪
CN110968528A (zh) * 2018-09-30 2020-04-07 北京忆恒创源科技有限公司 应用统一缓存架构为非易失存储介质组装数据
CN110968528B (zh) * 2018-09-30 2024-05-28 北京忆恒创源科技股份有限公司 应用统一缓存架构为非易失存储介质组装数据
CN112115065A (zh) * 2019-06-20 2020-12-22 北京忆芯科技有限公司 存储设备的统一地址空间
CN116048427A (zh) * 2023-03-31 2023-05-02 北京忆恒创源科技股份有限公司 一种管理ssd闪存资源的方法及存储设备

Similar Documents

Publication Publication Date Title
US12001359B2 (en) Identification and classification of write stream priority
US10564872B2 (en) System and method for dynamic allocation to a host of memory device controller memory resources
CN107885456B (zh) 减少io命令访问nvm的冲突
US11263149B2 (en) Cache management of logical-physical translation metadata
US9009397B1 (en) Storage processor managing solid state disk array
WO2018024214A1 (zh) Io流调节方法与装置
US12360697B2 (en) Method for selecting a data block to be collected in GC and storage device thereof
CN110447009A (zh) 用于自适应命令获取聚合的系统和方法
US10896131B2 (en) System and method for configuring a storage device based on prediction of host source
CN110554833B (zh) 存储设备中并行处理io命令
CN103902475B (zh) 一种基于队列管理机制的固态硬盘并行访问方法及装置
US20110016261A1 (en) Parallel processing architecture of flash memory and method thereof
CN104750433A (zh) 一种基于scst的缓存设计方法
CN109783404B (zh) 具有非对称通道的固态存储设备
CN114253461A (zh) 混合通道存储设备
US11907123B2 (en) Flash memory garbage collection
CN110096452B (zh) 非易失随机访问存储器及其提供方法
WO2018041258A1 (zh) 去分配命令处理的方法与存储设备
CN213338708U (zh) 一种控制部件及存储设备
CN110515861B (zh) 处理刷写命令的存储设备及其方法
CN107688435B (zh) Io流调节方法与装置
CN107885667B (zh) 降低读命令处理延迟的方法与装置
JP6100927B2 (ja) 情報処理装置
CN110968525B (zh) Ftl提供的缓存、其优化方法与存储设备
CN112181274A (zh) 提升存储设备性能稳定性的大块的组织方法及其存储设备

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 17836396

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 17836396

Country of ref document: EP

Kind code of ref document: A1