WO2019013524A1 - Appareil de traitement de substrat - Google Patents

Appareil de traitement de substrat Download PDF

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Publication number
WO2019013524A1
WO2019013524A1 PCT/KR2018/007806 KR2018007806W WO2019013524A1 WO 2019013524 A1 WO2019013524 A1 WO 2019013524A1 KR 2018007806 W KR2018007806 W KR 2018007806W WO 2019013524 A1 WO2019013524 A1 WO 2019013524A1
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Prior art keywords
substrate
chamber
epitaxial
nh4f
plasma
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Ceased
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PCT/KR2018/007806
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English (en)
Korean (ko)
Inventor
양승국
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Eugene Technology Co Ltd
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Eugene Technology Co Ltd
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Publication date
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Publication of WO2019013524A1 publication Critical patent/WO2019013524A1/fr
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05H—PLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OF NEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMIC BEAMS
    • H05H1/00—Generating plasma; Handling plasma
    • H05H1/24—Generating plasma
    • H05H1/46—Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6502—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials
    • H10P14/6512—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials by exposure to a gas or vapour
    • H10P14/6514—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed before formation of the materials by exposure to a gas or vapour by exposure to a plasma
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering

Definitions

  • the present invention relates to a substrate processing method, and more particularly, to a substrate processing method capable of processing a substrate through a plasma in an annealing step to minimize the influence of impurities on a substrate surface on a subsequent epitaxial process.
  • the native oxide is typically formed when the substrate surface is exposed to oxygen. Oxygen exposure occurs when the substrate is moved between processing chambers at atmospheric conditions, or when a small amount of oxygen is maintained in the vacuum chamber. Natural oxides may cause contamination during etching. Natural oxides are typically undesirable and must be removed prior to subsequent processing.
  • An object of the present invention is to provide a substrate processing method capable of removing natural oxide on the surface of a substrate.
  • Another object of the present invention is to provide a substrate processing method capable of minimizing impurities remaining on the surface of a substrate upon removal of native oxide.
  • a method of processing a substrate comprises: disposing a substrate including silicon in a chamber; A step of exposing the surface of the substrate to ammonium fluoride (NH4F) or ammonium hydrogen fluoride (NH4F (HF)); And an annealing step of exposing the substrate to plasma while annealing.
  • NH4F ammonium fluoride
  • HF ammonium hydrogen fluoride
  • the substrate may be heated to 80 degrees or higher.
  • the plasma may be generated from at least one selected from the group consisting of H2, NH3, H2O, O2, NO, NF3, HxOy (where x and y are integers).
  • the plasma may be a hydrogen plasma.
  • the step of reacting may comprise producing ammonium fluoride (NH4F) or ammonium fluoride (NH4F (HF)) through a gas mixture comprising ammonia (NH3) and nitrogen trifluoride (NF3).
  • NH4F ammonium fluoride
  • HF ammonium fluoride
  • NH3 ammonia
  • NF3 nitrogen trifluoride
  • the reaction step may comprise producing ammonium fluoride (NH4F) or ammonium fluoride (NH4F (HF)) through a gas mixture comprising H2O and nitrogen trifluoride (NF3).
  • NH4F ammonium fluoride
  • HF ammonium fluoride
  • NF3 nitrogen trifluoride
  • natural oxide on the surface of the substrate can be removed. Particularly, it is possible to minimize impurities remaining on the surface of the substrate upon removal of the native oxide, so that the epitaxial layer can be uniformly formed in the subsequent epitaxial process.
  • FIG. 1 is a schematic view of a semiconductor manufacturing facility according to an embodiment of the present invention.
  • FIG. 2 is a flowchart illustrating a substrate processing method according to an embodiment of the present invention.
  • FIG 3 is a view illustrating a process of processing a substrate according to an embodiment of the present invention.
  • FIGS. 4 to 6 are diagrams illustrating a process of performing an epitaxial process after the conventional annealing process.
  • FIGS. 7 to 9 are views showing a process of performing the epitaxial process after the annealing step shown in FIG. 3.
  • FIG. 7 is a view showing a process of performing the epitaxial process after the annealing step shown in FIG. 3.
  • the present invention can be applied to various semiconductor manufacturing processes including an epitaxial process.
  • the semiconductor manufacturing apparatus 1 includes a process facility 2, an equipment front end module (EFEM) 3, and an interface wall 4.
  • the facility front end module 3 is mounted in front of the process facility 2 to transfer the wafer W between the container (not shown) and the process facility 2 in which the substrates S are accommodated.
  • the plant front end module 3 has a plurality of loadports 60 and a frame 50.
  • the frame 50 is located between the load port 60 and the process facility 2.
  • the vessel containing the substrate S is conveyed by a conveying means (not shown), such as an overhead transfer, an overhead conveyor, or an automatic guided vehicle, .
  • the container may be a hermetically sealed container such as a front open unified pod (FOUP).
  • a frame robot 170 for transferring the substrate S between the container placed in the load port 60 and the process facility 2 is provided in the frame 50.
  • a door opener (not shown) for automatically opening and closing the door of the container may be provided.
  • the frame 50 may also be provided with a fan filter unit (FFU) (not shown) for supplying clean air into the frame 50 so that clean air flows from the top to the bottom of the frame 50 .
  • FFU fan filter unit
  • the substrate S is subjected to a predetermined process in the process facility 2.
  • the process facility 2 includes a transfer chamber 102, a load lock chamber 106, cleaning chambers 108a and 108b, a buffer chamber 110, And an epitaxial chamber (or epitaxial device) 112a, 112b, 112c.
  • the transfer chamber 102 has a generally polygonal shape when viewed from the top and includes a load lock chamber 106, a cleaning chamber 108a and 108b, a buffer chamber 110 and an epitaxial chamber 112a, 112b and 112c. Is installed on the side surface of the transfer chamber 102.
  • the load lock chamber 106 is located on the side of the transfer chamber 102 that is adjacent to the facility front end module 3.
  • the substrate S is temporarily stored in the load lock chamber 106 and then loaded into the process facility 2 to perform the process. After the process is completed, the substrate S is unloaded from the process facility 2, (106). ≪ / RTI >
  • the transfer chamber 102, the cleaning chambers 108a and 108b, the buffer chamber 110 and the epitaxial chambers 112a, 112b and 112c are kept in vacuum and the load lock chamber 106 is switched to vacuum and atmospheric pressure .
  • the load lock chamber 106 prevents external contaminants from entering the transfer chamber 102, the cleaning chambers 108a and 108b, the buffer chamber 110 and the epitaxial chambers 112a, 112b and 112c. Further, during transfer of the substrate S, since the substrate S is not exposed to the atmosphere, it is possible to prevent the oxide film from growing on the substrate S.
  • a gate valve (not shown) is installed between the load lock chamber 106 and the transfer chamber 102, and between the load lock chamber 106 and the equipment front end module 3.
  • the gate valve provided between the load lock chamber 106 and the transfer chamber 102 is closed and the load lock chamber 106 is closed.
  • the gate valve provided between the load lock chamber 106 and the facility front end module 3 is closed.
  • the transfer chamber 102 has a substrate handler 104.
  • the substrate handler 104 transfers the substrate S between the load lock chamber 106, the cleaning chambers 108a and 108b, the buffer chamber 110 and the epitaxial chambers 112a, 112b and 112c.
  • the transfer chamber 102 is sealed to maintain a vacuum when the substrate S moves. Maintaining the vacuum is to prevent the substrate S from being exposed to contaminants (e.g., O 2, particulate matter, etc.).
  • the epitaxial chambers 112a, 112b, 112c are provided to form an epitaxial layer on the substrate S. [ In this embodiment, three epitaxial chambers 112a, 112b and 112c are provided. Since the epitaxial process takes more time than the cleaning process, the manufacturing yield can be improved through a plurality of epitaxial chambers. Unlike the present embodiment, four or more or two or less epitaxial chambers may be provided, and vice versa, the epitaxial chamber may be provided in a semiconductor manufacturing facility separate from the present semiconductor manufacturing facility.
  • the cleaning chambers 108a and 108b are provided to clean the substrate S prior to the epitaxial processing for the substrate S in the epitaxial chambers 112a, 112b and 112c.
  • the amount of oxides present on the crystalline substrate must be minimized. If the surface oxygen content of the substrate is too high, the epitaxial process is adversely affected because oxygen atoms hinder the crystallographic placement of the deposition material on the seed substrate. For example, during silicon epitaxial deposition, excess oxygen on the crystalline substrate can cause silicon atoms to be displaced from their epitaxial positions by oxygen atom clusters in atomic units. These localized atomic displacements can cause errors in subsequent atomic arrangements as the layer grows thicker.
  • Oxygenation of the substrate surface may occur, for example, when the substrate is exposed to the atmosphere as it is transported. Therefore, a cleaning process for removing a native oxide (or surface oxide) formed on the substrate S can be performed in the cleaning chambers 108a and 108b.
  • the cleaning process is a dry etching process using radical hydrogen (H *) and NF3 gas.
  • H * radical hydrogen
  • NF3 gas NF3 gas
  • a reactive gas such as a radical H * of a hydrogen gas and a fluoride gas (for example, nitrogen fluoride (NF 3)) is supplied into the chamber, the reactive gas is reduced as shown in the following reaction formula (1) and x and y are arbitrary integers).
  • a reactive gas such as a radical H * of a hydrogen gas and a fluoride gas (for example, nitrogen fluoride (NF 3))
  • NF 3 nitrogen fluoride
  • the reaction product Since the intermediate product has high reactivity with the silicon oxide film (SiO 2), when the intermediate product reaches the surface of the silicon substrate, the reaction product selectively reacts with the silicon oxide film to produce a reaction product ((NH 4) 2 SiF 6) as shown in the following reaction formula (2).
  • pyrolysis gas includes fluorine-containing gas such as HF gas or SiF 4 gas.
  • the cleaning process includes a reaction process for producing a reaction product and an annealing (heating) process for pyrolyzing the reaction product, and the reaction process and the annealing (heating) process are performed together in one cleaning chamber 108a and 108b Or a reaction process may be performed in any of the cleaning chambers 108a and 108b and an annealing (heating) process may be performed in the other of the cleaning chambers 108a and 108b.
  • the buffer chamber 110 provides a space in which the substrate S on which the cleaning process has been completed is loaded and a space on which the substrate S on which the epitaxial process is performed is loaded.
  • the substrate S is transferred to the buffer chamber 110 and is loaded into the buffer chamber 110 before being transferred to the epitaxial chambers 112a, 112b, and 112c.
  • the epitaxial chambers 112a, 112b and 112c may be of a batch type in which a single process is performed for a plurality of substrates and when the epitaxial process is completed in the epitaxial chambers 112a, 112b and 112c, Substrates S subjected to the epitaxial process are sequentially stacked in the buffer chamber 110 and substrates S having been subjected to the cleaning process are sequentially stacked in the epitaxial chambers 112a, 112b and 112c. At this time, the substrate S may be stacked in the buffer chamber 110 in the longitudinal direction.
  • FIG. 2 is a flowchart illustrating a substrate processing method according to an embodiment of the present invention.
  • the cleaning process described above can be explained by the method 250 shown in Fig. That is, a substrate on which surface contaminants (e.g., silicon oxide film, etc.) are formed is placed within the chamber (252).
  • the chamber corresponds to the cleaning chambers 108a and 108b described above.
  • ammonium fluoride (NH4F) or ammonium hydrogen fluoride (NH4F (HF)) is formed (254).
  • Ammonium fluoride (NH4F) or ammonium hydrogen fluoride (NH4F (HF)) is formed using a gas mixture comprising ammonia (NH3) and nitrogen trifluoride (NF3) or a gas mixture comprising H2O and nitrogen trifluoride (NF3) .
  • a gas mixture can be dissociated into reactive species in a remote plasma chamber and can form ammonium fluoride (NH4F) or ammonium hydrogen fluoride (NH4F (HF)).
  • ammonium fluoride or ammonium fluoride (NH4F (HF)) to form a silicon oxide film on the surface of ammonium fluoride (NH4F) or ammonium fluoride (NH4F To form ammonium hexafluorosilicate (NH4) 2SiF6), H2O, NH3 products.
  • the volatile byproduct, (NH4) 2SiF6 can be removed by sublimation, and a thin film of (NH4) 2SiF6 can dissociate or sublimate into volatile SiF4, NH3, and HF products (258). These volatile products can then be removed from the chamber by means of a vacuum pump or the like.
  • a plasma is supplied to the silicon substrate, and the plasma is generated from at least one selected from the group consisting of H2, NH3, H2O, O2, NO, NF3, HxOy . That is, the stomach gas can be supplied to the remote plasma chamber, and the plasma generated in the remote plasma chamber can be supplied into the chamber.
  • the plasma supplied into the chamber can increase the reactivity of surface impurities (e.g., F, N, O, H, etc.) remaining on the substrate, thereby removing surface impurities from the surface of the substrate. A detailed description will be given later.
  • the substrate has surface contaminants such as native oxide film 72, and the substrate can be a silicon-containing substrate such as a crystalline silicon substrate (a).
  • ammonium fluoride (NH4F) or ammonium hydrogen fluoride (NH4F (HF)) 76 can be deposited on the surface of the native oxide film 72 (b) and reacted with the natural oxide film 72 to form ammonium hexafluorosilicate ammonium hexafluorosilicate, (NH4) 2SiF6) (c).
  • the substrate is then annealed to sublimate the (NH4) 2SiF6 film, where the plasma is supplied to the substrate to increase the reactivity of the remaining surface impurities and remove surface impurities from the surface of the substrate to expose the cleaned surfaces 74 .
  • the substrate may be heated to a temperature greater than 80 degrees.
  • FIGS. 4 to 6 are diagrams illustrating a process of performing an epitaxial process after the conventional annealing process.
  • a conventional annealing process is performed (except plasma) in the state where (NH 4) 2 SiF 6 is formed on a substrate, surface impurities (for example, F, N , O, H, etc.) remain on the substrate.
  • surface impurities e.g., F, N, O, H, etc.
  • FIGS. 7 to 9 are views showing a process of performing the epitaxial process after the annealing step shown in FIG. 3.
  • FIG. 7 when an annealing process including a plasma is performed in the state where (NH4) 2SiF6 is formed on a substrate as shown in FIG. 7, a remote plasma is supplied to the substrate as shown in FIG. 8, (For example, F, N, O, H, etc.) and silicon and bonds with silicon or bonds with silicon in a dangling bond state.
  • a remote plasma is supplied to the substrate as shown in FIG. 8
  • F, N, O, H, etc. silicon and bonds with silicon or bonds with silicon in a dangling bond state.
  • it increases the reactivity of surface impurities or reacts with surface impurities to form products such as HF, OH, H2O, and such products can be removed from the chamber by a vacuum pump.
  • the plasma is preferably a hydrogen plasma having a low bonding energy. That is, by terminating the surface of the substrate through the hydrogen radical, the residual surface impurities can be effectively removed. As a result, a subsequent epitaxial process can be carried out with the surface impurities removed, and a high-quality epitaxial layer can be formed as shown in FIG.
  • an epitaxial process is performed on the substrate S in the epitaxial chambers 112a, 112b and 112c.
  • the epitaxial process may be performed by chemical vapor deposition and may form an epitaxial layer 76 on the epitaxial surface 74.
  • the present invention can be applied to various types of semiconductor manufacturing facilities and manufacturing methods.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Electromagnetism (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

Un mode de réalisation de la présente invention concerne un procédé de traitement de substrat comprenant : une étape consistant à disposer un substrat comprenant du silicium dans une chambre; une étape de réaction consistant à exposer la surface du substrat à du fluorure d'ammonium (NH4F) ou du bifluorure d'ammonium (NH4F (HF)); et une étape de recuit consistant à recuire le substrat tout en l'exposant au plasma.
PCT/KR2018/007806 2017-07-11 2018-07-10 Appareil de traitement de substrat Ceased WO2019013524A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020170087908A KR20190006777A (ko) 2017-07-11 2017-07-11 기판 처리 장치
KR10-2017-0087908 2017-07-11

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WO2019013524A1 true WO2019013524A1 (fr) 2019-01-17

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TW (1) TW201909277A (fr)
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Publication number Priority date Publication date Assignee Title
KR102851427B1 (ko) * 2019-10-07 2025-08-28 주식회사 테스 기판 처리 방법
KR20230168652A (ko) 2022-06-07 2023-12-15 삼성디스플레이 주식회사 표시 장치의 제조 장치 및 표시 장치의 제조 방법

Citations (5)

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KR20000034903A (ko) * 1998-11-19 2000-06-26 아끼구사 나오유끼 반도체 장치의 제조방법 및 반도체 장치
JP2012004274A (ja) * 2010-06-16 2012-01-05 Sumitomo Electric Ind Ltd 炭化珪素半導体の洗浄方法
KR101201964B1 (ko) * 2006-02-03 2012-11-20 어플라이드 머티어리얼스, 인코포레이티드 에피택셜 증착 프로세스 및 장치
US20170084456A1 (en) * 2015-09-22 2017-03-23 Applied Materials, Inc. Cleaning method
KR101726804B1 (ko) * 2015-12-17 2017-04-13 주식회사 싸이노스 반도체 제조공정에 사용하는 SiC 부재의 세정방법

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Publication number Priority date Publication date Assignee Title
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KR20000034903A (ko) * 1998-11-19 2000-06-26 아끼구사 나오유끼 반도체 장치의 제조방법 및 반도체 장치
KR101201964B1 (ko) * 2006-02-03 2012-11-20 어플라이드 머티어리얼스, 인코포레이티드 에피택셜 증착 프로세스 및 장치
JP2012004274A (ja) * 2010-06-16 2012-01-05 Sumitomo Electric Ind Ltd 炭化珪素半導体の洗浄方法
US20170084456A1 (en) * 2015-09-22 2017-03-23 Applied Materials, Inc. Cleaning method
KR101726804B1 (ko) * 2015-12-17 2017-04-13 주식회사 싸이노스 반도체 제조공정에 사용하는 SiC 부재의 세정방법

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KR20190006777A (ko) 2019-01-21
TW201909277A (zh) 2019-03-01

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