WO2020132882A1 - Dispositif électroluminescent et son procédé de fabrication, panneau d'affichage et dispositif d'affichage - Google Patents

Dispositif électroluminescent et son procédé de fabrication, panneau d'affichage et dispositif d'affichage Download PDF

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Publication number
WO2020132882A1
WO2020132882A1 PCT/CN2018/123569 CN2018123569W WO2020132882A1 WO 2020132882 A1 WO2020132882 A1 WO 2020132882A1 CN 2018123569 W CN2018123569 W CN 2018123569W WO 2020132882 A1 WO2020132882 A1 WO 2020132882A1
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Prior art keywords
layer
groove
light
substrate
emitting diodes
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Chinese (zh)
Inventor
高伟程
蔡武卫
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Shenzhen Royole Technologies Co Ltd
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Shenzhen Royole Technologies Co Ltd
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Priority to CN201880095889.2A priority Critical patent/CN112640118A/zh
Priority to PCT/CN2018/123569 priority patent/WO2020132882A1/fr
Publication of WO2020132882A1 publication Critical patent/WO2020132882A1/fr
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/8791—Arrangements for improving contrast, e.g. preventing reflection of ambient light
    • H10K59/8792—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. black layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment

Definitions

  • Embodiments of the present application relate to the field of display technology, and in particular, to a light-emitting device and a method of manufacturing the same, a display panel, and a display device.
  • ULED is a display quality technology processing engine developed for electronic medical displays and LCD TVs. It uses multi-zone independent backlight control technology. Each pixel in the ULED panel can be independently controlled and driven. The brightness, contrast, and hierarchy of the screen , Dark field details, accurate color reproduction, picture smoothness and response speed have been greatly improved compared with traditional LED display, and its image quality performance has surpassed OLED in a number of subjective evaluation data.
  • the embodiments of the present application aim to provide a light-emitting device, a manufacturing method thereof, a display panel, and a display device, to solve the technical problems of low production efficiency and increased cost of the light-emitting device in the prior art.
  • a method for manufacturing a light-emitting device comprising: providing a plurality of thin film transistors, each adjacent two of the thin film transistors are set at a preset distance;
  • a plurality of first grooves and a plurality of second grooves are formed on the organic film layer, the plurality of first grooves and the second grooves are spaced apart and correspond to the plurality of thin film transistors one by one, each Each of the first groove portions exposes a corresponding drain electrode of the thin film transistor;
  • each light emitting diode being disposed in a corresponding one of the second grooves, and connecting each light emitting diode to a conductive layer at a corresponding one of the second grooves;
  • the provision of multiple light emitting diodes includes:
  • An LED chip is provided, the LED chip includes a substrate and a plurality of LEDs disposed on the substrate;
  • a plurality of the light emitting diodes are cut to form a plurality of individual light emitting diodes.
  • the substrate is a silicon substrate.
  • the metal layer is an indium metal layer.
  • the forming an organic film layer on the plurality of thin film transistors includes:
  • An organic film layer is formed on the plurality of thin film transistors by sputtering.
  • the opening a plurality of first grooves and a plurality of second grooves on the organic film layer includes:
  • the organic film layer is dry etched to form the plurality of first grooves and the plurality of second grooves.
  • the forming a conductive layer on the first groove, the second groove, and the spaced area between the first groove and the second groove includes:
  • a conductive layer is formed on the first groove, the second groove, and the spaced area between the first groove and the second groove by sputtering or evaporation, and nitrogen or oxygen is passed during deposition.
  • the connecting each of the light emitting diodes to the conductive layer at the second groove includes:
  • the light emitting diode is welded and fixed on the conductive layer at the second groove, and the welding material is PE material.
  • a method for manufacturing a light-emitting device comprising: providing a plurality of thin film transistors, each adjacent two of the thin film transistors are set at a preset distance;
  • a plurality of first grooves and a plurality of second grooves are formed on the organic film layer, the plurality of first grooves and the second grooves are spaced apart and correspond to the plurality of thin film transistors one by one, each Each of the first groove portions exposes a corresponding drain electrode of the thin film transistor;
  • An LED chip is provided, the LED chip includes a substrate and a plurality of LEDs disposed on the substrate;
  • the plurality of light-emitting diodes on the light-emitting diode chip correspond to the plurality of second grooves at the same time, and each of the light-emitting diodes is connected to the corresponding one of the second grooves to conduct electricity On the floor
  • the light-emitting diode chip includes a substrate and a plurality of light-emitting diodes provided on the substrate, including: the light-emitting diode chip provided with a plurality of the light-emitting diodes A metal layer is coated on one side.
  • the substrate is a sapphire substrate.
  • the metal layer is an indium metal layer.
  • the separating the substrate from the plurality of light emitting diodes at the same time includes:
  • the substrate is simultaneously separated from the plurality of light-emitting diodes by a laser lift-off process.
  • the separating the substrate from the plurality of light-emitting diodes at the same time further includes:
  • a light blocking layer is formed between the substrate and the plurality of light emitting diodes.
  • the separating the substrate from the plurality of light-emitting diodes at the same time further includes:
  • a light reflecting layer is formed between the substrate and the plurality of light emitting diodes.
  • the separating the substrate from the plurality of light-emitting diodes at the same time further includes:
  • a heat insulating layer is formed between the substrate and the plurality of light emitting diodes.
  • a light-emitting device includes: a plurality of thin-film transistors, a plurality of light-emitting diodes, an organic film layer and a conductive layer;
  • the organic film layer is formed on the plurality of thin film transistors, the organic film layer is provided with a plurality of first grooves and a plurality of second grooves, a plurality of the first grooves and the second grooves Spaced apart and corresponding to a plurality of the thin film transistors one by one, and each of the first groove portions exposes a corresponding drain electrode of the thin film transistor;
  • the conductive layer is formed on the first groove, the second groove, and the spaced area between the first groove and the second groove, a plurality of the light emitting diodes and a plurality of the second There is a one-to-one correspondence with the grooves, and each of the LEDs is connected to a corresponding conductive layer of the second groove;
  • the drain electrode of the thin film transistor is connected to the light emitting diode through the conductive layer, so that the thin film transistor controls the light emitting diode.
  • it includes: a substrate, a buffer layer, a gate insulating layer, and an interlayer insulating layer;
  • a plurality of the thin film transistors share a common substrate, buffer layer, gate insulating layer and interlayer insulating layer;
  • the buffer layer, the gate insulating layer, the interlayer insulating layer, the organic film layer, and the conductive layer are sequentially formed on the substrate.
  • each of the thin film transistors includes an active layer, a source electrode, and a gate electrode;
  • the active layer is disposed between the buffer layer and the gate insulating layer, the source electrode and the drain electrode penetrate the interlayer insulating layer and the gate insulating layer, respectively, and are respectively connected to the active
  • the gate electrode is provided between the gate insulating layer and the interlayer insulating layer, and is located directly above the active layer.
  • each of the thin film transistors includes an active layer, a source electrode, and a gate electrode;
  • the gate electrode is disposed between the gate insulating layer and the buffer layer, and the active layer is disposed between the interlayer insulating layer and the gate insulating layer, and is located directly above the gate electrode
  • the source electrode and the drain electrode respectively penetrate the interlayer insulating layer, and are respectively connected to opposite sides of the active layer.
  • the interlayer insulating layer is a single layer of silicon dioxide or a double-layer structure of silicon dioxide and silicon nitride.
  • the gate insulating layer is a single layer of silicon dioxide or a double-layer structure of silicon dioxide and silicon nitride.
  • the light emitting device further includes a passivation layer formed on the conductive layer in the spaced region between the first groove and the second groove and the conductive layer in the first groove.
  • a display panel includes: the light-emitting device described above.
  • a display device including:
  • the driving layer is provided on the substrate; and,
  • the display panel described above is provided on the driving layer, and the driving layer is used to drive the display panel.
  • a second groove is formed in the organic film layer, so that a plurality of the light-emitting diodes and a plurality of the second grooves correspond to each other, Furthermore, a plurality of the light emitting diodes can be connected to the conductive layers at the plurality of second grooves at the same time, which can facilitate the massive transfer of the light emitting diodes to the light emitting device, improve the production efficiency, and reduce the production cost.
  • FIG. 1 is a schematic structural diagram of a light-emitting device provided by one embodiment of this application;
  • FIG. 2 is a flowchart of a method for manufacturing a light-emitting device provided by one embodiment of this application;
  • 3a to 3e are schematic diagrams of the manufacturing method of the light-emitting device shown in FIG. 2 at different stages;
  • FIG. 4 is a flowchart of a method for manufacturing a light-emitting device provided by another embodiment of the present application.
  • 5a to 5b are schematic diagrams of the manufacturing method of the light-emitting device shown in FIG. 4 at different stages;
  • FIG. 6 is a schematic structural diagram of a display device according to another embodiment of the present application.
  • a light-emitting device 100 provided in one embodiment of the present application includes a plurality of thin-film transistors 10 and a plurality of light-emitting diodes 20, and each adjacent two of the thin-film transistors 10 are arranged at a predetermined distance.
  • the thin film transistor 10 corresponds to the plurality of light emitting diodes 20 one by one, and each of the light emitting diodes 20 is disposed on a side of the corresponding one of the thin film transistors 10 at a predetermined distance, and each of the thin film transistors 10 controls the corresponding One of the light emitting diodes 20.
  • Each of the thin film transistors 10 shares a common substrate 32, buffer layer 33, gate insulating layer 34, and interlayer insulating layer 35.
  • the substrate 32 serves as a substrate carrying a plurality of the thin film transistors 10 and a plurality of the light emitting diodes 20, and the buffer layer 33, a gate insulating layer 34, an interlayer insulating layer 35, The organic film layer 36, the conductive layer 37, and the passivation layer 38.
  • Each thin film transistor 10 further includes a drain electrode 12, an active layer 13, a source electrode 14, and a gate electrode 16, the active layer 13 is disposed between the buffer layer 33 and the gate insulating layer 34, so The drain electrode 12 and the source electrode 14 respectively penetrate the interlayer insulating layer 35 and the gate insulating layer 34, and are respectively connected to opposite sides of the active layer 13, and the gate electrode 16 is provided on the gate
  • the insulating layer 34 and the interlayer insulating layer 35 are located directly above the active layer 13.
  • the positions of the active layer 13 and the gate electrode 16 are interchanged, that is, the gate electrode 16 is disposed between the gate insulating layer 34 and the buffer layer 33,
  • the active layer 13 is provided between the interlayer insulating layer 35 and the gate insulating layer 34, and is located directly above the gate electrode 16, and the source electrode 14 and the drain electrode 12 respectively penetrate the layer
  • the insulating layer 35 is connected to the opposite sides of the active layer 13 respectively.
  • the organic film layer 36 is formed on the interlayer insulating layer 35 and the source electrode 14 and the drain electrode 12 of each thin film transistor 10.
  • the organic film layer 36 is provided with a plurality of first grooves 22 and a plurality of second grooves 24.
  • the plurality of first grooves 22 correspond to the plurality of thin film transistors 10 in one-to-one correspondence.
  • the first groove 22 is located above the drain electrode 12 of the corresponding one of the thin film transistors 10, and the first groove 22 partially exposes the drain electrode 12 of the thin film transistor 10.
  • the second groove 24 and the first groove 22 are opened in the organic film layer 36 at a predetermined distance.
  • the conductive layer 37 is formed on the first groove 22 and the second groove 24, and the conductive layer 37 is also formed on the space between the first groove 22 and the second groove 24 On the surface.
  • One end of the light emitting diode 20 is disposed on the metal layer 23, the metal layer 23 on one end of the light emitting diode 20 is connected to the conductive layer 37 at the second groove 24, and the drain electrode 12 of the thin film transistor 10 passes through the The conductive layer 37 is connected to the light emitting diode 20 so that the thin film transistor 10 controls the light emitting diode 20.
  • the passivation layer 38 is formed on the conductive layer 37 in the spaced region between the first groove 22 and the second groove 24 and the conductive layer 37 on the first groove 22, and the passivation layer 38 is also formed on On the organic film layer 36.
  • a light-emitting device 100 provided by the present application, by arranging the light-emitting diode 20 at the second groove 24, the second groove 24 The light is refracted in the same direction, which improves the light extraction efficiency of the light emitting diode 20.
  • the drain electrode 12 of the thin film transistor 10 controls the design of the light emitting diode 20 through the conductive layer 37, which can facilitate the mass transfer of the light emitting diode 20 to the light emitting device 100, which improves the production efficiency and reduces the production cost.
  • the substrate 32 is made of transparent materials such as glass, and is pre-cleaned. In some embodiments, due to the high content of metal impurities such as aluminum, barium, and sodium in traditional alkali glass, the diffusion of metal impurities is likely to occur in the high-temperature processing process, so the substrate 32 may also be made of alkali-free glass.
  • the substrate 32 may use quartz, silicon wafer, or other flexible substrates.
  • the flexible substrate includes thin glass, metal foil, plastic, or other flexible materials.
  • the plastic substrate has Flexible structure on both sides of the base film, such as polyimide (PI), polycarbonate (PC), polyethylene glycol terephthalate (PES), polyethersulfone (PES), polyethylene film (PEN), fiber reinforced plastic (FRP), etc. resin.
  • the buffer layer 33 is used to block impurities contained in the substrate 32 from diffusing into the active layer 13 of the thin film transistor 10 and prevent the threshold voltage, source leakage current, and other characteristics of the device of the thin film transistor 10 from being affected.
  • the buffer layer 33 can enhance the adhesion between the active layer 13 or the gate insulating layer 34 and the substrate 32, increase the contact firmness of the active layer 13 or the gate insulating layer 34 and the substrate 32, and thereby avoid the active layer 13 or the peeling of the gate insulating layer 34 improves the stability of the thin film transistor 10.
  • the buffer layer 33 may also be disposed on one or both sides of the gate electrode 16, the source electrode 14, or the drain electrode 12, and the gate electrode 16, the source electrode 14, or the drain electrode 12 and the At the same time, the adhesion between the thin film layers can effectively prevent atoms in the gate electrode 16, the source electrode 14 or the drain electrode 12 from diffusing into the film layer connected thereto, thereby improving the reliability of the thin film transistor 10.
  • the material of the buffer layer 33 is, for example, a copper alloy material.
  • the buffer layer 33 as a barrier film having high adhesion can be produced.
  • the copper alloy material contains nitrogen or oxygen, copper, and aluminum.
  • the content of nitrogen or oxygen, copper, and aluminum can be set according to different requirements, and is not specifically limited here.
  • the atomic percentage of aluminum atoms in the total number of atoms in the copper alloy material may be 0.05-30%
  • the atomic percentage of nitrogen or oxygen in the total number of atoms in the copper alloy material may also be 0.05-30%
  • the rest is copper.
  • the atomic percentage of aluminum atoms in the total number of atoms in the copper alloy material may be 0.05-30%.
  • the buffer layer 33 produced with the aluminum element content within this range has better adhesion and barrier properties.
  • the copper alloy material may further contain non-copper and non-aluminum metal elements.
  • the non-copper and non-aluminum metal element may include at least one element of Ca, Mg, Na, K, Be, Li, Ge, Sr, and Ba elements.
  • the atomic percentage of non-copper and non-aluminum metal atoms in the total number of atoms in the copper alloy material is 0.05-30%, so that the manufactured buffer layer 33 can have higher adhesion and higher barrier properties .
  • the light emitting device 100 further includes a flexible substrate formed between the base 32 and the gate insulating layer 34, the flexible substrate is used for support and protection on Substrates of various components formed.
  • the flexible substrate may be formed of various materials.
  • the flexible substrate may be formed of a flexible insulating material.
  • flexible insulating materials may include polyimide (PI), polyetherimide (PEI), polyethylene terephthalate (PES), polycarbonate (PC), polystyrene (PS) , Styrene-acrylonitrile copolymer, and silicone acrylic resin.
  • the flexible substrate may be formed of a flexible transparent insulating material.
  • the gate insulating layer 34 uses ammonia gas (NH 3 ) and monosilane (SiH 4 ) as reaction source gases, and a series of hydrogenation is deposited on the buffer layer 33 by radio frequency plasma enhanced chemical vapor deposition (RF-PECVD) method.
  • RF-PECVD radio frequency plasma enhanced chemical vapor deposition
  • An amorphous silicon nitride (a-SiNx:H) thin film, the silicon nitride thin film has excellent insulation withstand voltage performance and better interface characteristics.
  • the thickness of the gate insulating layer 34 is 100-400 nm. Because of its good interface characteristics, the prepared semiconductor device has a small leakage current, which improves the electrical performance of the device.
  • the gate insulating layer 34 may also adopt a single-layer silicon dioxide (SiO 2 ) or silicon dioxide and silicon nitride (SiO 2 /SiNx) double-layer structure.
  • the interlayer insulating layer 35 can passivate the back channel of the active layer 13 and contribute to the improvement of the electrical characteristics of the thin film transistor 10.
  • the interlayer insulating layer 35 uses a silicon nitride insulating layer.
  • the silicon nitride insulating layer has the advantages of excellent photoelectric performance, mechanical performance, and strong resistance to impurity particle diffusion and water vapor penetration.
  • the thinner silicon nitride gate insulating layer 34 is less likely to block the diffusion phenomenon, and as the thickness of the interlayer insulating layer 35 increases, the concentration of pollutants at the interface of the active layer 13 decreases, but when the thickness exceeds a critical value, The concentration of pollutants will no longer be greatly reduced to a minimum value, so the thickness of the interlayer insulating layer 35 is set to 100-400 nm.
  • the interlayer insulating layer 35 may also adopt a single-layer silicon dioxide (SiO 2 ) or a double-layer structure of silicon dioxide and silicon nitride (SiO 2 /SiNx).
  • the organic film layer 36 is used to reduce the parasitic capacitance generated between the conductive layer 37, the drain electrode 12, and the light emitting diode 20, and reduce the load and power consumption of the light emitting device 100.
  • the thickness of the organic film layer 36 is 1 to 200 ⁇ m. It is preferably 2 to 100 ⁇ m, and more preferably 5 to 50 ⁇ m.
  • the material of the organic film layer 36 may be polyimide, polybenzoxazole, silicone modified polymer, silicone polymer, acrylic polymer, epoxy polymer, organic film containing silica filler And other thermosetting materials.
  • the material of the conductive layer 37 is selected from one of gold, silver, copper, aluminum, titanium, chromium, molybdenum, cadmium, nickel, and cobalt, or any combination thereof.
  • the passivation layer 38 is a silicon nitride layer or a silicon oxynitride layer; in some embodiments, the passivation layer 38 includes one or a combination of silicon dioxide, doped silicon dioxide, or polysilicon; The thickness of the gate insulating layer 34 is smaller than the thickness of the passivation layer 38.
  • the passivation layer 38 has functions of reducing power consumption, preventing the occurrence of erosion and eliminating crosstalk.
  • the active layer 13 may be various metal oxide semiconductors. Quaternary metal oxides such as indium tin gallium zinc oxide (InSnGaZnO) based materials, materials such as indium gallium zinc oxide (InGaZnO) based materials, indium tin zinc oxide (InSnZnO) based materials, indium aluminum zinc oxide based Materials (InAlZnO), materials based on indium hafnium zinc oxide (InHfZnO), materials based on tin gallium zinc oxide (SnGaZnO), materials based on aluminum gallium zinc oxide (AlGaZnO), or based on tin aluminum zinc oxide (SnAlZnO) ternary metal oxide, and materials such as indium zinc oxide (InZnO), tin zinc oxide (SnZnO), aluminum zinc oxide (AlZnO), zinc magnesium Oxide (ZnMgO) material, tin-magnesium oxide (SnMgO) material, indium magnesium oxide (
  • the material of the drain electrode 12, the source electrode 14 and the gate electrode 16 may be selected from metals such as Cu, Ni, ISO, Au, or metal oxides with high work functions.
  • the drain electrode 12, the source electrode 14, and the gate electrode 16 may have a multilayer structure.
  • the multilayer electrode includes a metal layer having Ag, Mg, Al, PS, Pd, Au, Ni, Nd, Ir, Cr, or a mixture thereof, and a transparent conductive oxide layer including a transparent conductive oxide material.
  • the transparent conductive oxide material may include indium tin oxide (ISO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ISZO), and the like.
  • the multilayer electrode may have a three-layer structure configured to include a first transparent conductive oxide layer, a metal layer, and a second transparent conductive oxide layer.
  • the multilayer electrode may also have a two-layer structure configured to include a transparent conductive oxide layer and a metal layer.
  • the drain electrode 12, the source electrode 14, and the gate electrode 16 each include a flexible substrate, a conductive metal wire layer, and a conductive film, the conductive metal wire layer is disposed on the flexible substrate And the conductive film.
  • the material of the flexible substrate is a material with a visible light transmittance greater than 80%, which may be polyethylene terephthalate, ethylene glycol ester (PES), polyethersulfone (PES), polyethylene naphthalate ( PEN), cycloolefin copolymer (COC) or transparent polyimide (PI).
  • the thickness of the flexible substrate may be 0.1 mm-0.5 mm.
  • the material of the conductive film may be poly(3,4-dioxyethylthiophene)/poly(p-styrenesulfonic acid) (PEDOS:PSS), and the mass ratio of PSS to PEDOS may be 1:20.
  • the thickness of the conductive film may be 15 ⁇ m-1100 ⁇ m.
  • the conductive metal wire layer includes a plurality of conductive metal wires, and the plurality of conductive metal wires are arranged on the flexible substrate.
  • the plurality of conductive metal wires are arranged in a mesh on the flexible substrate material.
  • multiple conductive metal wires may also be arranged in a grid.
  • the diameter of the conductive metal wire is 10 ⁇ m-1000 ⁇ m, the distance between the adjacent two conductive metal wires is 0.2 mm-10 mm, and the material of the conductive metal wire may be gold, silver, aluminum, copper or nickel .
  • the electrode is provided with the conductive metal wire layer between the flexible substrate and the conductive film, and a plurality of conductive metal wires of the conductive metal wire layer are covered with a conductive film to form an internal conductive network, reducing The surface resistance improves the conductivity of the electrode.
  • one of the embodiments of the present application provides the manufacturing method of the above-mentioned light-emitting device 100. It should be noted that the above explanation of the embodiment of the light-emitting device 100 is also applicable to the preparation method of this embodiment, in order to avoid Redundancy will not be detailed here.
  • the manufacturing method of the light emitting device 100 includes:
  • Step S21 providing a plurality of thin film transistors, and each adjacent two thin film transistors are set at a preset distance.
  • each thin film transistor 10 shares a common substrate 32, buffer layer 33, interlayer insulating layer 35, and gate insulating layer 34.
  • the substrate 32 serves as a substrate carrying a plurality of the thin film transistors 10 and a plurality of the light emitting diodes 20.
  • the substrate 32 is formed with the buffer layer 33, the gate insulating layer 34, and the interlayer insulating layer 35 in this order.
  • Each of the thin film transistors 10 further includes a drain electrode 12, an active layer 13, a source electrode 14, and a gate electrode 16.
  • the active layer 13 is provided between the buffer layer 33 and the gate insulating layer 34.
  • the source electrode 14 and the drain electrode 12 respectively penetrate the interlayer insulating layer 35 and the gate insulating layer 34, and are respectively connected to opposite sides of the active layer 13, and the gate electrode 16 is provided on the gate
  • the insulating layer 34 and the interlayer insulating layer 35 are located directly above the active layer 13.
  • Step S22 forming an organic film layer on the plurality of thin film transistors.
  • a plasma enhanced chemical vapor deposition method (Plasma Enhanced Chemical Vapor Deposition: PECVD) and a low pressure chemical vapor deposition method (Low Pressure Pressure Chemical Vapor Deposition:
  • the tube is called LPCVD
  • atmospheric pressure chemical vapor deposition (ASmospheric Pressure, Chemical Vapor Deposition: the tube is called APCVD)
  • the electron cyclotron resonance chemical vapor deposition method (ElecSron CycloSron Resonance Chemical Vapor Deposition: the tube is called ECR-CVD) or the sputtering method.
  • Organic film layer 36 The thickness of the organic film layer 36 ranges from 1 to 200 ⁇ m.
  • Step S23 pattern the organic film layer to form a first groove and a second groove, a plurality of the first grooves correspond to a plurality of the thin film transistors, and each of the first grooves The groove is located above the drain electrode of the corresponding one of the thin film transistors, and the first groove exposes the drain electrode of the thin film transistor, and the first groove and the second groove are separated by a predetermined distance.
  • the patterning process may include only a photolithography process, or include a photolithography process and an etching step, and may also include other processes for forming a predetermined pattern such as printing, inkjet, etc.; photolithography
  • the process refers to a process of forming a pattern using photoresist, mask, exposure machine, etc., including film formation, exposure, development and other processes.
  • the corresponding patterning process can be selected according to the structure formed in the embodiment of the present invention.
  • a layer of photoresist is formed on the organic film layer 36, the photoresist is exposed and developed, and then the organic film layer 36 is dry etched to form the first Groove 22 and second groove 24.
  • Step S24 forming a conductive layer on the first groove, the second groove, and the space between the first groove and the second groove.
  • the specific manufacturing method of the conductive layer 37 is as follows: a silver target is placed in the deposition chamber, and the area where the conductive layer 37 is not required to be formed is masked by a mask plate, by sputtering or Vapor deposition forms a conductive layer 37 on the first groove 22, the second groove 24, and the spaced area between the first groove 22 and the second groove 24, and nitrogen gas or oxygen.
  • the specific manufacturing method of the conductive layer 37 may also be: a target material is made of nitrogen, oxygen, and silver according to a set atomic ratio, and then the first groove 22 and the first The second groove 24 and the space between the first groove 22 and the second groove 24 are deposited to form a conductive layer 37.
  • Step S25 providing a plurality of light-emitting diodes, each of which is disposed in a corresponding one of the second grooves, and connecting each of the light-emitting diodes to a conductive layer at a corresponding one of the second grooves on.
  • each of the light emitting diodes 20 is soldered and fixed to the corresponding conductive layer 37 of the second groove 24 in a temperature range of 50°C to 200°C,
  • the above welding technique can reduce the influence on the electrical performance of the thin film transistor 10 device.
  • the providing of multiple light emitting diodes 20 includes:
  • the LED chip includes a substrate and a plurality of LEDs disposed on the substrate, the plurality of LEDs are disposed on the substrate at a predetermined distance, and the substrate is a silicon substrate .
  • a metal layer is formed on the plurality of light emitting diodes. Specifically, a metal layer is coated on the plurality of light-emitting diodes by a spin coating method, and the metal layer is an indium metal layer.
  • a plurality of the light emitting diodes coated with the metal layer are cut along the spaced region to form a plurality of individual light emitting diodes.
  • a surface of each light-emitting diode coated with a metal layer is fixedly connected to a corresponding conductive layer of the second groove.
  • the method further includes: forming a passivation layer on the space between the first groove and the second groove, the conductive layer of the first groove, and the organic film layer.
  • a plasma-enhanced chemical vapor deposition (PECVD) method may be used in the space between the first groove 22 and the second groove 24, the conductive layer 37 of the first groove 22 and The thickness deposited on the organic film layer 36 is about
  • the passivation layer 38 wherein the material of the passivation layer 38 may be oxide, nitride or oxynitride, the passivation layer 38 may be a single layer, double layer or multilayer structure. Specifically, the passivation layer 38 may be SiNx, SiOx or Si(ON)x.
  • a method for manufacturing a light-emitting device 100 provided by the present application provides a plurality of light-emitting diodes 20 and a plurality of The two grooves 24 correspond to each other, so that each of the light emitting diodes 20 can be connected to the conductive layer at the corresponding one of the second grooves 24 at the same time, and a large amount of the light emitting diodes 20 can be transferred to the light emitting device 200 , Improve production efficiency and reduce production costs.
  • FIG. 4 another embodiment of the present application also provides the manufacturing method of the light-emitting device 100 described above. It should be noted that the above explanation of the embodiment of the light-emitting device 100 is also applicable to the light-emitting device 100 of this embodiment. In order to avoid redundancy, the preparation method will not be detailed here.
  • the manufacturing method of the light emitting device 100 includes:
  • Step S41 providing a plurality of thin film transistors, each adjacent two of the thin film transistors are set at a preset distance.
  • Step S42 forming an organic film layer on the plurality of thin film transistors.
  • Step S43 pattern the organic film layer to form a first groove and a second groove, a plurality of the first grooves correspond to a plurality of the thin film transistors, and each of the first grooves A groove is opened above a corresponding drain electrode of the thin film transistor, and the first groove exposes the drain electrode of the thin film transistor, and the first groove and the second groove are separated by a preset distance .
  • Step S44 forming a conductive layer on the first groove, the second groove, and the space between the first groove and the second groove.
  • Step S45 Provide a light-emitting diode chip.
  • the light-emitting diode chip includes a substrate and a plurality of light-emitting diodes disposed on the substrate.
  • the substrate 28 is a sapphire substrate, and a plurality of the light emitting diodes 20 are disposed on the substrate 28 at a predetermined distance.
  • the step S55 further includes: forming a metal layer on the plurality of light emitting diodes.
  • a metal layer is coated on the side of the light-emitting diode chip on which the light-emitting diodes 20 are provided by a spin coating method, and the metal layer is an indium metal layer.
  • Step S46 One-to-one correspondence between the plurality of light-emitting diodes on the light-emitting diode chip and the plurality of second grooves, and connecting the light-emitting diodes to the conductive layer at the second groove .
  • a plurality of the light-emitting diodes 20 on the light-emitting diode chip are simultaneously in one-to-one correspondence with the plurality of second grooves within a temperature range of 50°C to 200°C.
  • the welding is fixed on the conductive layers 37 of the plurality of second grooves 24. The above welding technique can reduce the influence on the electrical performance of the thin film transistor 10 device.
  • Step S47 Separate the substrate from the plurality of light-emitting diodes at the same time.
  • the substrate 28 is separated from the plurality of light emitting diodes 20 by a laser lift-off process.
  • step S47 further includes: forming a light-blocking layer between the substrate 28 and the plurality of light-emitting diodes, the light-blocking layer can block the laser light irradiated from the side of the substrate when the laser is peeled off, avoiding the laser light on the film
  • the transistor causes damage, thereby avoiding the threshold voltage drift of the thin-film transistor and the failure of the characteristics of the thin-film transistor, thereby avoiding the problem that the display effect of the light-emitting device after laser stripping is degraded or cannot work normally.
  • step S47 further includes: forming a reflective layer between the substrate 28 and the plurality of light emitting diodes, the reflective layer can reflect the laser light irradiated from the flexible substrate side when the laser is peeled off, on the one hand, avoiding the laser to cause the thin film transistor Damage, on the other hand, can also transfer the heat generated by the laser to other parts, thereby effectively preventing the generation of local high temperature, and further avoiding the damage of the thin film transistor or the light emitting device caused by the heat generated by the laser.
  • step S47 further includes: forming a heat insulation layer between the substrate 28 and the plurality of light emitting diodes, the heat insulation layer can isolate the heat generated by the laser when the laser is peeled off, thereby effectively avoiding the heat generated by the laser
  • the thin film transistor and the light emitting device cause damage, which further avoids the problem that the display effect of the flexible display substrate is reduced or even cannot be displayed normally after the laser is peeled off.
  • the method further includes: forming a passivation layer on the first groove and the second groove spaced region, the conductive layer of the first groove, and the organic film layer.
  • a method for manufacturing a light-emitting device 100 provided by the present application provides a plurality of light-emitting diodes on the light-emitting diode chip by opening a second groove 24 in the organic film layer 36 20 corresponds to the plurality of second grooves 24 at the same time, so that each of the light emitting diodes 20 is simultaneously connected to the conductive layer 37 at the corresponding one of the second grooves 24, which can realize the light emitting diode
  • the huge amount of 20 is transferred to the light emitting device 200, which improves the production efficiency and reduces the production cost.
  • another embodiment of the present application further provides a display device 200 including a substrate 30, a driving layer 40, a display panel 50 and a protective layer 60.
  • the driving layer 40 is used to drive the display panel 50.
  • the substrate 30 may use a flexible substrate, such as a thin glass, a metal foil, or a plastic substrate, etc. having a flexible material, for example, the plastic substrate has two surfaces coated on the base film Flexible structure, the base film includes such as polyimide (PI), polycarbonate (PC), polyethylene glycol terephthalate (PES), polyethersulfone (PES), polyethylene film (PEN), fiber Reinforced plastic (FRP) and other resins.
  • PI polyimide
  • PC polycarbonate
  • PES polyethylene glycol terephthalate
  • PES polyethersulfone
  • PEN polyethylene film
  • FRP fiber Reinforced plastic
  • the driving layer 40 includes a scanning circuit and a switching circuit, the scanning circuit is connected to the switching circuit, and the switching circuit is connected to the display panel 50.
  • the scanning circuit scans and selects the corresponding pixel unit through the switch circuit, and applies a driving voltage to the pixel unit to make the pixel unit emit light, thereby displaying an image.
  • the driving layer 40 may use different driving methods to drive the display panel 50.
  • the driving methods include a passive driving method (Passive MaSrix, PMOLED) and an active driving method (AcSive MaSrix, AMOLED).
  • PMOLED Passive MaSrix
  • AMOLED Active MaSrix
  • the switching circuit can select a thin-film transistor 10 (Shin-film SransisSor, SFS) as a switching tube, and realizes static driving or dynamic driving through the function of the scanning circuit.
  • the switching circuit can select a low-temperature polysilicon thin film transistor (Low SemperaSure Poly-Si Shin Film SransisSor, LSP-Si SFS), amorphous silicon SFS, polysilicon SFS, oxide semiconductor SFS or organic SFS, etc. are used as switch tubes.
  • a low-temperature polysilicon thin film transistor Low SemperaSure Poly-Si Shin Film SransisSor, LSP-Si SFS
  • amorphous silicon SFS amorphous silicon SFS
  • polysilicon SFS oxide semiconductor SFS or organic SFS, etc.
  • the display panel 50 includes the light emitting device 100 in any of the above embodiments.
  • the protective layer 60 is used to protect the display panel 50, wherein the protective layer 60 may include substances such as ZrO, CeO 2 , ShO 2 and the like.
  • the protective layer 60 may form a transparent film to cover the entire surface of the display panel 40.
  • the display device 200 provided by the embodiment of the present application is flexible by being made of a flexible material and becomes bendable.
  • the display device 200 is not only bendable, but also transparent.
  • the material of the display device 200 is a flexible transparent element
  • the substrate 30 is composed of a polymer such as transparent plastic.
  • the driving layer 40 uses a transparent transistor, and the light-emitting device 100 in the display panel 50 uses a transparent material. Therefore, the display device 200 can become flexible and transparent.
  • the transparent transistor is an SFS transistor made of opaque silicon by replacing an SFS transistor made of a transparent substance such as zinc oxide or titanium dioxide.
  • the transparent electrode may be composed of materials such as indium tin oxide (ISO) or graphene.
  • ISO indium tin oxide
  • Graphene has a honeycomb lattice structure composed of carbon atoms, and has transparency.
  • the display device 200 can implement the execution of various application functions by setting bending parameters such as a bending sensor and using bending parameters detected by the bending sensor, thereby greatly enhancing the user's experience.

Landscapes

  • Electroluminescent Light Sources (AREA)

Abstract

La présente invention concerne un dispositif électroluminescent (100) et son procédé de fabrication, un panneau d'affichage (50) et un dispositif d'affichage (200), le procédé de fabrication du dispositif électroluminescent (100) comprenant : une couche de film organique (36) est formée sur une pluralité de transistors à couches minces (10) ; une pluralité de secondes rainures (24) sont ouvertes dans la couche de film organique (36) ; chaque diode électroluminescente (20) est connectée à une couche conductrice (37) à la position de la seconde rainure correspondante (24). En ouvrant des secondes rainures (24) dans la couche de film organique (36) et en faisant correspondre la pluralité de diodes électroluminescentes (20) une à une avec la pluralité de secondes rainures (24), les diodes électroluminescentes (20) sont ainsi activés pour être simultanément connectées à la couche conductrice (37) aux positions de la pluralité de secondes rainures (24), facilitant le transfert de masse des diodes électroluminescentes (20) sur le dispositif électroluminescent (100), améliorant l'efficacité de production, et réduisant les coûts de production.
PCT/CN2018/123569 2018-12-25 2018-12-25 Dispositif électroluminescent et son procédé de fabrication, panneau d'affichage et dispositif d'affichage Ceased WO2020132882A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201880095889.2A CN112640118A (zh) 2018-12-25 2018-12-25 发光装置及其制造方法、显示面板及显示装置
PCT/CN2018/123569 WO2020132882A1 (fr) 2018-12-25 2018-12-25 Dispositif électroluminescent et son procédé de fabrication, panneau d'affichage et dispositif d'affichage

Applications Claiming Priority (1)

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PCT/CN2018/123569 WO2020132882A1 (fr) 2018-12-25 2018-12-25 Dispositif électroluminescent et son procédé de fabrication, panneau d'affichage et dispositif d'affichage

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