WO2020173033A1 - Circuit d'attaque de pixel et panneau d'affichage - Google Patents

Circuit d'attaque de pixel et panneau d'affichage Download PDF

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Publication number
WO2020173033A1
WO2020173033A1 PCT/CN2019/094990 CN2019094990W WO2020173033A1 WO 2020173033 A1 WO2020173033 A1 WO 2020173033A1 CN 2019094990 W CN2019094990 W CN 2019094990W WO 2020173033 A1 WO2020173033 A1 WO 2020173033A1
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WIPO (PCT)
Prior art keywords
transistor
electrically connected
control signal
node
light emitting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2019/094990
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English (en)
Chinese (zh)
Inventor
蔡玉莹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Publication of WO2020173033A1 publication Critical patent/WO2020173033A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

Definitions

  • This application relates to the field of display technology, in particular to a pixel drive circuit and a display panel.
  • OLED(Organic Light Emitting Diode (Organic Light Emitting Diode) display panels have the advantages of high brightness, wide viewing angle, fast response speed, low power consumption, etc., and have been widely used in the field of high-performance displays.
  • the pixels are arranged in a matrix with multiple rows and multiple columns.
  • Each pixel is usually composed of two transistors and one capacitor, commonly known as 2T1C circuit.
  • the transistor has the problem of threshold voltage drift.
  • OLED pixel drive circuit needs corresponding compensation structure.
  • the compensation structure of the OLED pixel driving circuit is relatively complicated, which occupies a large area when designing a layout, which is not conducive to the design of a high PPI (Pixels Per Inch, pixel density) display panel.
  • the purpose of the embodiments of the present application is to provide a pixel driving circuit and a display panel, which can solve the technical problem that the compensation structure of the existing pixel driving circuit is relatively complicated and a large area is occupied when designing the layout.
  • An embodiment of the application provides a pixel driving circuit, including: a first transistor, a second transistor, a third transistor, a fourth transistor, a capacitor, and a light emitting device;
  • the gate of the first transistor is electrically connected to a first node, the source of the first transistor is electrically connected to a second node, and the drain of the first transistor is electrically connected to a second power supply voltage;
  • the gate of the second transistor is electrically connected to the second control signal, the source of the second transistor is electrically connected to the data signal, and the drain of the second transistor is electrically connected to the second control signal of the capacitor. end;
  • the gate of the third transistor is electrically connected to the first control signal, the source of the third transistor is electrically connected to a current source for outputting a preset current value, and the drain of the third transistor is electrically connected sexually connected to the first node;
  • the gate of the fourth transistor is electrically connected to the first control signal, the source of the fourth transistor is electrically connected to the current source, and the drain of the fourth transistor is electrically connected to the Second node
  • the first end of the capacitor is electrically connected to the first node
  • the anode terminal of the light emitting device is electrically connected to a first power supply voltage, and the cathode terminal of the light emitting device is electrically connected to the second node;
  • the current flowing through the light emitting device is independent of the threshold voltage of the first transistor; the light emitting device is an organic light emitting diode.
  • the combination of the first control signal, the second control signal, and the data signal sequentially corresponds to a threshold voltage acquisition phase, a data voltage acquisition phase, and a light-emitting phase; the data
  • the signal includes a reference high potential and a display low potential.
  • the first control signal in the threshold voltage acquisition phase, is a high potential, the second control signal is a high potential, and the data signal is the reference high potential.
  • the first control signal in the data voltage acquisition phase, is at a low potential, the second control signal is at a high potential, and the data signal is jumped from the reference high potential Change to the display low potential.
  • the first control signal in the light-emitting phase, is a low potential, the second control signal is a low potential, and the data signal is the reference high potential.
  • the first transistor, the second transistor, the third transistor, and the fourth transistor are all low-temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon Thin film transistors.
  • the voltage value of the first power supply voltage is greater than the voltage value of the second power supply voltage.
  • An embodiment of the present application also provides a pixel driving circuit, including: a first transistor, a second transistor, a third transistor, a fourth transistor, a capacitor, and a light emitting device;
  • the gate of the first transistor is electrically connected to a first node, the source of the first transistor is electrically connected to a second node, and the drain of the first transistor is electrically connected to a second power supply voltage;
  • the gate of the second transistor is electrically connected to the second control signal, the source of the second transistor is electrically connected to the data signal, and the drain of the second transistor is electrically connected to the second control signal of the capacitor. end;
  • the gate of the third transistor is electrically connected to the first control signal, the source of the third transistor is electrically connected to a current source for outputting a preset current value, and the drain of the third transistor is electrically connected sexually connected to the first node;
  • the gate of the fourth transistor is electrically connected to the first control signal, the source of the fourth transistor is electrically connected to the current source, and the drain of the fourth transistor is electrically connected to the Second node
  • the first end of the capacitor is electrically connected to the first node
  • the anode terminal of the light emitting device is electrically connected to a first power supply voltage, and the cathode terminal of the light emitting device is electrically connected to the second node.
  • the combination of the first control signal, the second control signal, and the data signal sequentially corresponds to a threshold voltage acquisition phase, a data voltage acquisition phase, and a light-emitting phase; the data
  • the signal includes a reference high potential and a display low potential.
  • the first control signal in the threshold voltage acquisition phase, is a high potential, the second control signal is a high potential, and the data signal is the reference high potential.
  • the first control signal in the data voltage acquisition phase, is at a low potential, the second control signal is at a high potential, and the data signal is jumped from the reference high potential Change to the display low potential.
  • the first control signal in the light-emitting phase, is a low potential, the second control signal is a low potential, and the data signal is the reference high potential.
  • the first transistor, the second transistor, the third transistor, and the fourth transistor are all low-temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon Thin film transistors.
  • the current flowing through the light emitting device is independent of the threshold voltage of the first transistor.
  • the voltage value of the first power supply voltage is greater than the voltage value of the second power supply voltage.
  • the light-emitting device is an organic light-emitting diode.
  • An embodiment of the present application also provides a display panel, which includes a pixel drive circuit, and the pixel drive circuit includes: a first transistor, a second transistor, a third transistor, a fourth transistor, a capacitor, and a light emitting device;
  • the gate of the first transistor is electrically connected to a first node, the source of the first transistor is electrically connected to a second node, and the drain of the first transistor is electrically connected to a second power supply voltage;
  • the gate of the second transistor is electrically connected to the second control signal, the source of the second transistor is electrically connected to the data signal, and the drain of the second transistor is electrically connected to the second control signal of the capacitor. end;
  • the gate of the third transistor is electrically connected to the first control signal, the source of the third transistor is electrically connected to a current source for outputting a preset current value, and the drain of the third transistor is electrically connected sexually connected to the first node;
  • the gate of the fourth transistor is electrically connected to the first control signal, the source of the fourth transistor is electrically connected to the current source, and the drain of the fourth transistor is electrically connected to the Second node
  • the first end of the capacitor is electrically connected to the first node
  • the anode terminal of the light emitting device is electrically connected to a first power supply voltage, and the cathode terminal of the light emitting device is electrically connected to the second node.
  • the combination of the first control signal, the second control signal, and the data signal sequentially corresponds to a threshold voltage acquisition phase, a data voltage acquisition phase, and a light-emitting phase; the data signal Including reference high potential and display low potential.
  • the current flowing through the light emitting device is independent of the threshold voltage of the first transistor.
  • the light emitting device is an organic light emitting diode.
  • the pixel drive circuit and the display panel provided by the embodiments of the present application use a pixel drive circuit with a 4T1C structure to effectively compensate the threshold voltage of the drive transistor in each pixel.
  • the compensation structure of the pixel drive circuit is relatively simple, so that the design is not No need to take up a lot of area.
  • FIG. 1 is a schematic structural diagram of a pixel driving circuit provided by an embodiment of the application
  • FIG. 2 is a timing diagram of a pixel driving circuit provided by an embodiment of the application.
  • FIG. 3 is a schematic diagram of the path of the pixel driving circuit provided by the application embodiment in the threshold voltage acquisition phase under the driving timing shown in FIG. 2;
  • FIG. 4 is a schematic diagram of a path of the pixel driving circuit provided by the application embodiment in the data voltage acquisition phase under the driving timing shown in FIG. 2;
  • FIG. 5 is a schematic diagram of the path of the pixel driving circuit provided in the embodiment of the application in the light-emitting phase under the driving timing shown in FIG. 2.
  • the transistors used in all the embodiments of this application can be thin film transistors or field effect transistors or other devices with the same characteristics. Since the source and drain of the transistor used here are symmetrical, the source and drain can be interchanged of. In the embodiments of the present application, in order to distinguish the two poles of the transistor except the gate, one of the poles is called the source and the other is called the drain. According to the form in the figure, it is stipulated that the middle end of the switching transistor is the gate, the signal input end is the source, and the output end is the drain.
  • the transistors used in the embodiments of the present application may include P-type transistors and/or N-type transistors. The P-type transistor is turned on when the gate is at a low level, and turned off when the gate is at a high level. The gate is turned on when the gate is high, and it is turned off when the gate is low.
  • FIG. 1 is a schematic structural diagram of a pixel driving circuit provided by an embodiment of the application.
  • the pixel driving circuit provided by the embodiment of the present application includes: a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a capacitor C, and a light emitting device OLED.
  • the light emitting device OLED may be an organic light emitting diode. That is, the embodiment of the present application adopts a pixel driving circuit with a 4T1C structure to effectively compensate the threshold voltage of the driving transistor in each pixel, and uses fewer components, has a simple and stable structure, and saves costs.
  • the first transistor T1 in the pixel driving circuit is a driving transistor.
  • the gate of the first transistor T1 is electrically connected to the first node g, the source of the first transistor T1 is electrically connected to the second node s, and the drain of the first transistor T1 is electrically connected to the second power voltage VSS .
  • the gate of the second transistor T2 is electrically connected to the second control signal Vs2, the source of the second transistor T2 is electrically connected to the data signal D, and the drain of the second transistor T2 is electrically connected to the second end of the capacitor C.
  • the gate of the third transistor T3 is electrically connected to the first control signal Vs1, the source of the third transistor T3 is electrically connected to a current source A for outputting a preset current value, and the drain of the third transistor T3 is electrically connected Connected to the first node g.
  • the gate of the fourth transistor T4 is electrically connected to the first control signal Vs1, the source of the fourth transistor T4 is electrically connected to the current source A, and the drain of the fourth transistor T4 is electrically connected to the second node s.
  • the first end of the capacitor C is electrically connected to the first node g.
  • the anode terminal of the light emitting device OLED is electrically connected to the first power supply voltage Vdd, and the cathode terminal of the light emitting device OLED is electrically connected to the second node s.
  • both the first power supply voltage Vdd and the second power supply voltage VSS are used to output a predetermined voltage value.
  • the output voltage value of the first power supply voltage Vdd is greater than the output voltage value of the second power supply voltage VSS.
  • the first transistor T1, the second transistor T2, the third transistor T3, and the fourth transistor T4 are all low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
  • the transistors in the pixel driving circuit provided by the embodiments of the present application are the same type of transistors, so as to avoid the influence of the difference between different types of transistors on the pixel driving circuit.
  • FIG. 2 is a timing diagram of the pixel driving circuit provided by an embodiment of the application.
  • the combination of the first control signal Vs1, the second control signal Vs2, and the data signal D corresponds to the threshold voltage acquisition stage t1, the data voltage acquisition stage t2, and the light-emitting stage t3.
  • the data signal D includes a reference high potential Vref and a display low potential Vdata. It can be understood that the potential value of the reference high potential Vref is greater than the potential value of the display low potential Vdata.
  • the first control signal Vs1 is at a high potential
  • the second control signal Vs2 is at a high potential
  • the data signal D is a reference high potential Vref.
  • the first control signal Vs1 is at a low level
  • the second control signal Vs2 is at a high level
  • the data signal D jumps from the reference high level Vref to the display low level Vdata.
  • the first control signal Vs1 is at a low potential
  • the second control signal Vs2 is at a low potential
  • the data signal D is a reference high potential Vref.
  • FIG. 3 is a schematic diagram of the path of the pixel driving circuit provided by the application embodiment in the threshold voltage acquisition phase in the driving sequence shown in FIG. 2.
  • the first control signal Vs1 is high
  • the third transistor T3 and the fourth transistor T4 are turned on
  • the current source A outputs a preset current.
  • the transistor T3 is output to the first node g, and is output to the second node s through the fourth transistor T4.
  • the preset current output by the current source A causes the light-emitting device OLED to be turned off at this time, and the preset current flows through the first transistor T1, that is, the first transistor T1 is turned on at this time.
  • the second control signal Vs2 is at a high potential
  • the second transistor T2 is turned on
  • the data signal D is at the reference high potential Vref at this time. That is, at this time, the reference high potential Vref of the data signal D is output to the second end of the capacitor C through the second transistor T2.
  • the drain of the first transistor T1 is electrically connected to the second power supply voltage VSS, at this time, the potential of the drain terminal of the first transistor T1 is equal to the potential of the second power supply voltage VSS.
  • the carrier mobility of W and L are the width and length of the channel of the first transistor T1, respectively, and Iref is the current value output by the current source A.
  • FIG. 4 is a schematic diagram of the data voltage acquisition phase of the pixel driving circuit provided by the application embodiment in the driving sequence shown in FIG. 2.
  • the second control signal Vs2 is at a high potential
  • the second transistor T2 is turned on
  • the data signal D jumps from the reference high potential Vref to the display low potential Vdata at this time. That is, at this time, the potential of the second terminal of the capacitor C also jumps from the reference high potential Vref to the display low potential Vdata.
  • the first control signal Vs1 is at a low level, and the third transistor T3 and the fourth transistor T4 are turned off, that is, at this time, the preset current output by the current source A fails to be output to the first node g and the second node s.
  • the potential of the first node g is first equal to the potential during the threshold voltage acquisition phase t1.
  • the second terminal of the capacitor C jumps from the reference high potential Vref to the display low potential Vdata during the data voltage acquisition phase t2. Therefore, in the data voltage acquisition phase t2, the potential change amount of the first node g may be approximately equal to the voltage difference between the reference high potential Vref and the display low potential Vdata.
  • FIG. 5 is a schematic diagram of the light-emitting phase of the pixel driving circuit provided by the application embodiment in the driving sequence shown in FIG. 2.
  • the first control signal is at a low potential
  • the second control signal Vs2 is at a low potential
  • the data signal D is at the reference high potential Vref
  • the second transistor T2 the third transistor T3, and the The fourth transistor T4 is turned off. Due to the storage effect of the capacitor C, the potential of the first node g remains unchanged. That is, the potential of the first node g is equal to the potential of the first node g in the data voltage acquisition phase t2.
  • the drain of the first transistor T1 is electrically connected to the second power supply voltage VSS at this time, the potential of the drain of the first transistor T1 is equal to the potential of the second power supply voltage VSS.
  • I OLED 1/2Cox( ⁇ W/L)(Vg1s-Vth) 2 , where I OLED is the current flowing through the light-emitting device OLED, ⁇ is the carrier mobility of the first transistor T1, W and L are the first The width and length of the channel of the transistor T1, Vg1s is the voltage difference between the gate and the drain of the first transistor T1T, and Vth is the threshold voltage of the first transistor T1. In the embodiment of the present application, the voltage difference between the gate and the drain of the first transistor T1 is equal to the voltage difference between the potential of the first node g and the potential of the second node s.
  • I OLED 1/2Cox( ⁇ W/L)(2Iref/ ⁇ Cox(W/L)+Vth+Vdata-Vref-Vth) 2
  • the current of the light-emitting device OLED has nothing to do with the threshold voltage of the first transistor T1, and the compensation function is realized.
  • the light emitting device OLED emits light, and the current flowing through the light emitting device OLED has nothing to do with the threshold voltage of the first transistor T1.
  • the embodiment of the application itself also provides a display panel, which includes the above-mentioned pixel driving circuit.
  • a display panel which includes the above-mentioned pixel driving circuit.
  • the pixel driving circuit please refer to the above description of the pixel driving circuit, which will not be repeated here.
  • the pixel drive circuit and the display panel provided by the embodiments of the present application use a pixel drive circuit with a 4T1C structure to effectively compensate the threshold voltage of the drive transistor in each pixel.
  • the compensation structure of the pixel drive circuit is relatively simple, so that the design is not No need to take up a lot of area.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

Des modes de réalisation de la présente invention concernent un circuit d'attaque de pixel et un panneau d'affichage, un circuit d'attaque de pixel qui utilise une structure 4T1C réalisant une compensation efficace de la tension de seuil d'un transistor d'attaque dans chaque pixel. La structure de compensation du circuit d'attaque de pixel est relativement simple, et une grande surface n'a donc pas besoin d'être occupée pendant la conception.
PCT/CN2019/094990 2019-02-25 2019-07-08 Circuit d'attaque de pixel et panneau d'affichage Ceased WO2020173033A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201910137719.2 2019-02-25
CN201910137719.2A CN109671391A (zh) 2019-02-25 2019-02-25 像素驱动电路及显示面板

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WO2020173033A1 true WO2020173033A1 (fr) 2020-09-03

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Families Citing this family (1)

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Publication number Priority date Publication date Assignee Title
CN109671391A (zh) * 2019-02-25 2019-04-23 深圳市华星光电半导体显示技术有限公司 像素驱动电路及显示面板

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101079233A (zh) * 2006-05-26 2007-11-28 Lg.菲利浦Lcd株式会社 有机发光二极管显示器及其驱动方法
WO2010035672A1 (fr) * 2008-09-26 2010-04-01 株式会社 東芝 Dispositif d’affichage et procédé pour commander ce dispositif d’affichage
CN102890910A (zh) * 2012-10-15 2013-01-23 北京大学 同异步双栅tft-oled像素驱动电路及其驱动方法
CN107068058A (zh) * 2017-04-28 2017-08-18 深圳市华星光电技术有限公司 像素驱动电路、显示面板及像素驱动方法
CN109671391A (zh) * 2019-02-25 2019-04-23 深圳市华星光电半导体显示技术有限公司 像素驱动电路及显示面板

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101079233A (zh) * 2006-05-26 2007-11-28 Lg.菲利浦Lcd株式会社 有机发光二极管显示器及其驱动方法
WO2010035672A1 (fr) * 2008-09-26 2010-04-01 株式会社 東芝 Dispositif d’affichage et procédé pour commander ce dispositif d’affichage
CN102890910A (zh) * 2012-10-15 2013-01-23 北京大学 同异步双栅tft-oled像素驱动电路及其驱动方法
CN107068058A (zh) * 2017-04-28 2017-08-18 深圳市华星光电技术有限公司 像素驱动电路、显示面板及像素驱动方法
CN109671391A (zh) * 2019-02-25 2019-04-23 深圳市华星光电半导体显示技术有限公司 像素驱动电路及显示面板

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