WO2022057504A1 - 电子器件和电子设备 - Google Patents

电子器件和电子设备 Download PDF

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Publication number
WO2022057504A1
WO2022057504A1 PCT/CN2021/111022 CN2021111022W WO2022057504A1 WO 2022057504 A1 WO2022057504 A1 WO 2022057504A1 CN 2021111022 W CN2021111022 W CN 2021111022W WO 2022057504 A1 WO2022057504 A1 WO 2022057504A1
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WIPO (PCT)
Prior art keywords
electronic device
pad
buffer
buffer structure
opening
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Ceased
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PCT/CN2021/111022
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English (en)
French (fr)
Inventor
史洪宾
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Publication date
Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Priority to EP21868332.4A priority Critical patent/EP4210077A4/en
Priority to US18/245,633 priority patent/US20230337362A1/en
Publication of WO2022057504A1 publication Critical patent/WO2022057504A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G2/00—Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
    • H01G2/02—Mountings
    • H01G2/06—Mountings specially adapted for mounting on a printed-circuit support
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/224—Housing; Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/228—Terminals
    • H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/40—Structural combinations of fixed capacitors with other electric elements, the structure mainly consisting of a capacitor, e.g. RC combinations
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452—Solder masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G2/00—Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
    • H01G2/02—Mountings
    • H01G2/06—Mountings specially adapted for mounting on a printed-circuit support
    • H01G2/065—Mountings specially adapted for mounting on a printed-circuit support for surface mounting, e.g. chip capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/018—Dielectrics
    • H01G4/06—Solid dielectrics
    • H01G4/08—Inorganic dielectrics
    • H01G4/12—Ceramic dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/30—Stacked capacitors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09663—Divided layout, i.e. conductors divided in two or more parts
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/099—Coating over pads, e.g. solder resist partly over pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10015—Non-printed capacitor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10984—Component carrying a connection agent, e.g. solder, adhesive

Definitions

  • the embodiments of the present application relate to the technical field of capacitors, and in particular, to an electronic device and an electronic device.
  • Multi-layer Ceramic Capacitors are widely used in electronic products.
  • the electronic device is usually arranged on a printed circuit board (Printed Circuit Board, PCB), and is connected to the PCB by soldering.
  • PCB printed Circuit Board
  • the embodiments of the present application provide an electronic device and an electronic device, which solve the problem of poor reliability of the electronic device.
  • an electronic device is provided, the electronic device is arranged on a PCB, and the electronic device includes: an electronic device body, the electronic device body It is connected to the PCB by welding through a connecting part, wherein at least one buffer structure is provided on the connecting part. Therefore, by arranging at least one buffer structure on the connecting part, when the electronic device is subjected to mechanical stress, the stress can be released at the position of the buffer structure, reducing the stress on the body of the electronic device and preventing the body of the electronic device from breaking under the action of stress , improve the reliability of electronic devices.
  • the buffer structure is a rectangle, a circle or an irregular shape, and the buffer structure and the connecting part form a "return"-shaped structure. Thereby, stress can be relieved at the buffer structure.
  • the shape of the buffer structure includes any one of the following: a linear shape, a curved shape, and a broken line shape. Thereby, the shape of the buffer structure is more flexible.
  • the buffer structure is one, the connection part includes: first and second opposite sides, and the buffer structure passes through the first side and the second side of the connection part side. Therefore, the buffer structure can separate the force-bearing surface of the connecting member into two independent parts, so that the stress cannot be continuously transmitted to the electronic device body, thereby improving the reliability of the electronic device.
  • the two buffer structures are arranged in a cross shape, and the two buffer structures pass through two opposite sides of the connecting member respectively. Therefore, the buffer structure can further separate the force-bearing surface of the connecting member into four independent parts, so that the stress cannot be continuously transmitted to the electronic device body, thereby improving the reliability of the electronic device.
  • connection component includes: a pad on which at least one buffer structure is disposed. Therefore, the structure of the connecting member is simple and easy to assemble.
  • connection component includes a pad and a connection material
  • connection material is located between the pad and the electronic device body, wherein the connection material is provided with at least one of the buffer structure. Therefore, by setting the connection material, the stability of the connection is improved, and at the same time, the operation is simpler without changing the original mechanism of the pad.
  • connection material includes at least one of solder and conductive glue.
  • the electronic device further includes: terminal electrodes covering both ends of the electronic device body, and the terminal electrodes are connected to the circuit board by welding through a connecting material.
  • the electronic device body can be more stably connected to the PCB.
  • the electronic device body is connected to the terminal electrode through conductive resin or conductive glue. Therefore, the elastic conductive material can better absorb the mechanical stress received by the electronic device body, prevent the electronic device body from breaking under the action of stress, and improve the reliability of the electronic device.
  • the buffer structure includes at least one of the following: an opening provided on the connection member, and a buffer member provided between the connection member and the electronic device body. Therefore, the stress can be released through the opening or the buffer, reducing the stress on the electronic device body, preventing the electronic device body from breaking under the action of stress, and improving the reliability of the electronic device.
  • the buffer is a solder resist layer. Therefore, by providing the solder resist layer, the connection between the electronic device body and the PCB can be disconnected at the position of the solder resist layer, so that the force-bearing surfaces are separated, so that the stress cannot be continuously transmitted to the electronic device body, and the electronic device is improved. reliability.
  • an electronic device in a second aspect of the present application, the electronic device includes: a PCB, and the electronic device as described above, where the electronic device is disposed on the PCB. Therefore, the above-mentioned electronic device has the same technical effect as the electronic device provided by the foregoing embodiments, which will not be repeated here.
  • Figure 1a is a schematic structural diagram of a multilayer chip ceramic capacitor
  • Fig. 1b is a top view of the connecting member in Fig. 1a;
  • FIG. 2 is a cross-sectional view of a multilayer chip ceramic capacitor provided by an embodiment of the present application
  • Fig. 2a is a top view of a connecting component provided by an embodiment of the application.
  • Fig. 2b is a top view of a connecting component provided by an embodiment of the application.
  • Fig. 2c is a top view of a connecting component provided by an embodiment of the present application.
  • FIG. 2d is a top view of a connecting component provided by an embodiment of the application.
  • FIG. 3 is a schematic structural diagram of another multilayer chip ceramic capacitor provided by an embodiment of the present application.
  • Fig. 3a is a top view of a connecting component provided by an embodiment of the present application.
  • FIG. 3b is a top view of a connecting component provided by an embodiment of the application.
  • Fig. 3c is a top view of a connecting component provided by an embodiment of the present application.
  • FIG. 3d is a top view of a connecting component provided by an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of another multilayer chip ceramic capacitor provided by an embodiment of the present application.
  • Fig. 4a is a top view of a connecting component provided by an embodiment of the application.
  • Fig. 4b is a top view of a connecting component provided by an embodiment of the application.
  • FIG. 4c is a top view of a connection component provided by an embodiment of the present application.
  • FIG. 4d is a top view of a connecting component provided by an embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of a multilayer chip ceramic capacitor of a control group provided by an embodiment of the present application.
  • Example 5a is a schematic structural diagram of a multilayer chip ceramic capacitor in Example 1;
  • 5b is a schematic structural diagram of a multilayer chip ceramic capacitor in Example 2.
  • 5c is a schematic structural diagram of a multilayer chip ceramic capacitor in Example 3.
  • 5d is a schematic structural diagram of a multilayer chip ceramic capacitor in Example 4.
  • FIG. 6 is a comparison diagram of the drop stress of the capacitor body of the multilayer chip ceramic capacitors in the control group, the first example, the second example, the third example and the fourth example;
  • Figure 7 is a comparison diagram of the drop strain of the capacitor body of the multilayer chip ceramic capacitors in the control group, the first example, the second example, the third example and the fourth example;
  • Figure 8 is a comparison diagram of drop stress at the solder joints of the multilayer chip ceramic capacitors in the control group, the first example, the second example, the third example and the fourth example;
  • 9 is a comparison diagram of the drop stress, strain and drop stress at the solder joints of the multilayer chip ceramic capacitors in the control group, the first example, the second example, the third example and the fourth example.
  • orientation terms such as “upper” and “lower” are defined relative to the orientation in which the components in the drawings are schematically placed. It should be understood that these directional terms are relative concepts, and they are used for relative In the description and clarification of the drawings, it may change correspondingly according to the change of the orientation in which the components are placed in the drawings.
  • Embodiments of the present application provide an electronic device, and the electronic device includes, for example, a mobile phone, a tablet computer, a vehicle-mounted computer, a smart wearable product, the Internet of Things (IOT), and the like.
  • the electronic device includes, for example, a mobile phone, a tablet computer, a vehicle-mounted computer, a smart wearable product, the Internet of Things (IOT), and the like.
  • IOT Internet of Things
  • the embodiments of the present application do not specifically limit the specific form of the above electronic device.
  • the electronic device includes a PCB, and electronic devices arranged on the PCB.
  • the electronic device includes, for example, a multi-layer ceramic capacitor (MLCC), an inductor, a wafer level package (WLP) and other electronic devices that are prone to body fracture failure.
  • MLCC multi-layer ceramic capacitor
  • WLP wafer level package
  • the following description will be given by taking the electronic device as a multilayer chip ceramic capacitor MLCC as an example.
  • FIG. 1a is a schematic structural diagram of a multilayer chip ceramic capacitor.
  • the multilayer chip ceramic capacitor is arranged on the printed circuit board PCB10.
  • the multilayer chip ceramic capacitor 001 includes: a capacitor body 20, and the capacitor body 20 is composed of, for example, multilayer ceramic chips with electrodes.
  • the capacitor body 20 is connected to the PCB 10 by, for example, connecting components.
  • the connection member may be a pad.
  • Fig. 1b is a top view of the connecting member of Fig. 1a.
  • the capacitor body 20 is connected to the bonding pad 30 by welding, for example, through a connecting material 50 , and the bonding pad 30 is connected to the PCB 10 by welding.
  • the multilayer chip ceramic capacitor 001 further includes a terminal electrode, and the terminal electrode is connected to the circuit board by welding through the connection material 50 .
  • the connection material 50 may be a conductive material such as solder, conductive glue, or the like.
  • the solder includes, for example, a tin-Sn alloy, a silver-Ag alloy, a copper-Cu alloy, and the like.
  • the terminal electrode is in the shape of "]".
  • the connecting material 50 is partially attached to the outside of the part of the terminal electrode close to the circuit board, and the part is located between the capacitor body 20 and the pad 30.
  • the two end points of the material 50 are connected at the positions where the end electrodes are attached to form a roughly triangle on the capacitor body 20 .
  • connection material may not only be a triangle, but also a part of a trapezoid, a rectangle, or a circle. Generally speaking, the larger the area covered by the connection part, the better the effect of preventing short circuits.
  • a solder resist layer 101 is provided on the surface of the PCB 10 , an opening is provided on the solder resist layer 101 , the pad 30 is arranged at the opening of the solder resist layer 101 , and the pad 30 is connected to the opening of the solder resist layer 101 .
  • a gap 1001 is provided between the solder mask layers 101 , and there is no solder mask layer 101 on the surface of the pad 30 .
  • This design is a non-solder mask defined (NSMD) pad.
  • a solder resist layer 101 is provided on the surface of the PCB 10 , an opening is provided on the solder resist layer 101 , the pad 30 is provided at the opening of the solder resist layer 101 , and a solder resist layer is provided around the pad 30 101, this design is a Solder Mask Defined pad.
  • some pads 30 are provided with a solder resist layer 101 on the surface, and some pads 30 have no solder resist layer 101 on the surface.
  • This design is a NSMD/SMD hybrid pad, which belongs to the scope of protection of this application.
  • the PCB 10 when the PCB 10 is subjected to an external force, it will bend, and the PCB 10 will transmit the stress to the capacitor body 20 through the pads 30 , so that the capacitor body 20 is fractured under the action of the stress, resulting in the failure of the multilayer chip ceramic capacitor 001 .
  • the embodiment of the present application provides an improved multilayer chip ceramic capacitor 001 .
  • the multilayer chip ceramic capacitor 001 includes: a capacitor body 20 , and the capacitor body 20 is connected to the printed circuit board PCB 10 by welding through a connecting member 100 , wherein the connecting member 100 is provided with At least one buffer structure.
  • the surface of the printed circuit board PCB10 is provided with, for example, a solder resist layer 101, wherein the material of the solder resist layer can be resin, which can play the role of moisture resistance, insulation, solder resistance and high temperature resistance.
  • the solder resist layer 101 is provided with an opening, and the connection member 100 is provided at the opening.
  • the buffer structure includes a first opening 301 provided on the connecting member 100 .
  • the buffer structure includes: a buffer member 102 disposed between the connection member 100 and the capacitor body 20 .
  • the buffer 102 may be an elastic member or a solder mask.
  • the stress can be released at the position of the buffer structure, which reduces the The stress on the capacitor body 20 prevents the capacitor body 20 from breaking under the action of the stress, and improves the reliability of the multilayer chip ceramic capacitor 001 .
  • the buffer structure can be arranged at a position where the multilayer chip ceramic capacitor 001 is prone to breakage. In some embodiments of the present application, the middle position of the multilayer chip ceramic capacitor 001 is prone to breakage. Therefore, the buffer structure can be arranged at the middle position of the capacitor body 20 .
  • the connection component 100 includes: a pad 30 .
  • the pad 30 is a three-layer structure, including a capacitor body pad, a connecting material and a PCB pad that are stacked in layers.
  • One surface of the capacitor body 20 is connected to the pad 30 by welding through a connecting material 50 , and the pad 30 is connected to the PCB 10 by welding.
  • the shape of the connection material 50 between the capacitor body 20 and the pad 30 matches the shape of the pad 30 .
  • the pad 30 is provided with a first opening 301 as a buffer structure.
  • the embodiment of the present application does not limit the shape of the buffer structure.
  • the shape of the buffer structure includes any one of the following: a straight line, a curve, and a broken line. For example: “one" shape, "U” shape, “V shape”, “W” shape, "S” shape.
  • the connecting component 100 includes: a pad 30, and two buffer structures are arranged on the pad 30: the first The openings 301 and the second openings 302, and the first openings 301 and the second openings 302 are arranged in a cross shape.
  • the first opening 301 is, for example, arranged laterally parallel to the X-axis direction, and extends from the first side of the pad 30 to the second side. Extend to the fourth side.
  • first opening 301 and the second opening 302 divide the pad 30 into four pieces.
  • the connecting member 100 includes, for example, opposite first sides and second sides, and the buffer structure passes through the first side. and the second side.
  • the pad 30 is provided with a first opening 301 parallel to the Y-axis direction, the pad 30 is divided into two pieces along the Y-axis direction by the first opening 301, and the width of the first opening 301 is, for example, One third of the length of the third and fourth sides.
  • the pad 30 is provided with a second opening 302 parallel to the X-axis direction, the pad 30 is divided into two pieces along the X-axis direction by the second opening 302, and the width of the second opening 302 is the first side and one-third of the length of the second side.
  • the buffer structure is rectangular, circular or irregular, and is disposed at the center of the capacitor body 20 .
  • a third opening 303 is provided in the middle of the capacitor body 20 , and the cross-section of the capacitor body 20 is “back” shape.
  • the multilayer chip ceramic capacitor 001 provided by the embodiment of the present application, by setting the opening on the pad 30, the effectiveness of the traditional fully welded pad 30 design for transferring the deformation of the PCB 10 to the fragile capacitor body 20 is reduced, thereby reducing the The stress and strain of the capacitor body 20 are reduced, thereby reducing the ceramic fracture risk of the capacitor body 20 and improving the reliability of the multi-layer chip ceramic capacitor 001 for board-level applications.
  • a buffer member 102 is provided between the pad 30 and the capacitor body 20 .
  • An opening is formed on the connecting material 50 between the pad 30 and the capacitor body 20 , the buffer 102 is located in the opening, and the height of the connecting material 50 between the pad 30 and the capacitor body 20 is higher than that of the buffer 102 the height of.
  • the connecting component 100 includes: a pad 30 , and two buffer structures are provided on the pad 30 : a first buffer member 1021 and a second buffer member 1022 , the first buffer member 1021 and the second buffer member 1022 are arranged in a cross shape.
  • the first buffer member 1021 is, for example, arranged laterally parallel to the X-axis direction and extends from the first side of the pad 30 to the second side.
  • the three sides extend to the fourth side.
  • first buffer member 1021 and the second buffer member 1022 divide the pad 30 into four pieces.
  • the embodiments of the present application do not limit the number of the buffer structures.
  • there is one buffer structure and the connecting component 100 is, for example, Including opposite first and second sides, the buffer structure passes through the first and second sides.
  • the pad 30 is provided with a first buffer member 1021 parallel to the Y-axis direction, and the pad 30 is divided into two pieces by the first buffer member 1021 along the Y-axis direction.
  • the width is, for example, one third of the length of the third and fourth sides.
  • a second buffer member 1022 parallel to the X-axis direction is disposed on the pad 30, the pad 30 is divided into two pieces along the X-axis direction by the second buffer member 1022, and the width of the second buffer member 1022 is One third of the length of the first and second sides.
  • the buffer structure is a rectangle, a circle or an irregular shape, and is disposed at the center of the capacitor body 20 .
  • a third buffer member 1023 is provided in the middle position of the capacitor body 20 , and the top view of the capacitor body 20 is in a “back” shape.
  • the multilayer chip ceramic capacitor 001 provided by the embodiment of the present application reduces the effectiveness of the traditional fully welded pad 30 design in transferring the deformation of the PCB 10 to the fragile capacitor body 20 by partially setting the buffer layer 102 design, thereby reducing the capacitance
  • the stress and strain of the body 20 further reduce the risk of ceramic fracture of the capacitor body 20, and improve the board-level application reliability of the multilayer chip ceramic capacitor 001.
  • connection component 100 includes: a pad 30 and a connection material 50 , and the connection material 50 is partially located between the pad 30 and the capacitor body 20 , wherein the connection At least one of the buffer structures is provided on the material 50 .
  • connection material 50 between the capacitor body 20 and the pad 30 is provided with an opening as a buffer structure.
  • two buffer structures are provided on the connecting material 50 : a first opening 301 and a second opening 302 , and the first opening 301 and the second opening 302 are arranged in a cross shape.
  • the first opening 301 is, for example, arranged laterally parallel to the X-axis direction, and extends from the first side of the connecting material 50 to the second side
  • the second opening 302 is, for example, arranged longitudinally parallel to the Y-axis direction, and is formed by the third side of the connecting material 50 . Extend to the fourth side.
  • first opening 301 and the second opening 302 divide the connecting material 50 into four pieces.
  • the embodiments of the present application do not limit the number of the buffer structures.
  • there is one buffer structure and the connecting component 100 is, for example, Including opposite first and second sides, the buffer structure passes through the first and second sides.
  • the connecting material 50 is provided with a first opening 301 parallel to the Y-axis direction, the connecting material 50 is divided into two pieces along the Y-axis direction by the first opening 301, and the width of the first opening 301 is, for example, One third of the length of the third and fourth sides.
  • the connecting material 50 is provided with a second opening 302 parallel to the X-axis direction, the connecting material 50 is divided into two pieces along the X-axis direction by the second opening 302, and the width of the second opening 302 is the first side and one-third of the length of the second side.
  • the buffer structure is a rectangle, a circle or an irregular shape, and is disposed at the center of the capacitor body 20 .
  • a third opening 303 is provided in the middle of the capacitor body 20 , and the cross-section of the capacitor body 20 is a “back” shape.
  • the multilayer chip ceramic capacitor 001 provided by the embodiment of the present application reduces the effectiveness of the traditional fully welded pad 30 design in transferring the deformation of the PCB 10 to the fragile capacitor body 20 by setting the opening design in the connecting material 50 locally, thereby reducing the The stress and strain of the capacitor body 20 are reduced, thereby reducing the ceramic fracture risk of the capacitor body 20 and improving the reliability of the multi-layer chip ceramic capacitor 001 for board-level applications.
  • a buffer member 102 is provided between the connection material 50 and the capacitor body 20 as a buffer structure (not shown in the figure).
  • the following is a drop simulation test of the multilayer chip ceramic capacitors 001 with different buffer structure shapes.
  • 0805 type multilayer chip ceramic capacitor 001 as an example, where 0805 represents the size of the capacitor, which is expressed in inches, 08 means the length is 0.08 inches, corresponding to 2.0mm, 05 means the width is 0.05 inches, corresponding to 1.27mm.
  • the multilayer chip ceramic capacitor 001 includes: a capacitor body 20, a connecting part 100 and a printed circuit board 10, wherein the capacitor body 20 is connected by the connecting part and the printed circuit board 10. printed circuit board connections.
  • connection components include: pads 30 and connection materials 50 .
  • the cross-sectional shape and size of the pad 30 are the same as the cross-sectional shape and size of the capacitor body 20 .
  • the pad 30 is provided with an opening as a buffer structure.
  • FIG. 5 is a comparison group. As shown in FIG. 5 , the multi-layer chip ceramic capacitor 001 of the comparison group is not provided with a buffer structure.
  • Example 1 as shown in FIG. 5a, the pad 30 is provided with two openings: a first opening and a second opening, and the first opening and the second opening are arranged in a cross shape.
  • the first opening is parallel to the X-axis direction and extends from the first side to the second side of the pad 30
  • the second opening is parallel to the Y-axis direction and extends from the third side to the fourth side of the pad 30 .
  • the first opening and the second opening divide the pad 30 into 4 pieces, the width of the first opening is a quarter of the length of the first side and the second side, and the width of the second opening is the length of the third side and the fourth side. a quarter of .
  • Example 2 as shown in FIG. 5b, the pad 30 is provided with a first opening parallel to the Y-axis direction, the pad 30 is divided into two pieces along the Y-axis direction by the first opening, and the width of the first opening is, for example, the third One-third of the length of the side and fourth side.
  • Example 3 as shown in FIG. 5c, the pad 30 is provided with a second first opening parallel to the X-axis direction, the pad 30 is divided into two pieces by the second opening along the X-axis direction, and the width of the second opening is the first opening. One third of the length of one side and the second side.
  • Example 4 as shown in FIG. 5d , a third opening is provided at the center of the pad 30 , the third opening is, for example, a rectangle, and the cross-section of the pad 30 is a “return” shape.
  • the lengths of the horizontal and vertical sides of the third opening 303 are respectively a quarter of the lengths of the horizontal and vertical sides of the corresponding pads 30 .
  • the above-mentioned multilayer chip ceramic capacitor is, for example, arranged on the PCB 10, wherein the thickness of the PCB 10 is 0.65 mm.
  • the impact acceleration is, for example, 1500G/1ms.
  • Figure 6 shows the simulation results of the drop test.
  • the drop stress of the capacitor body 20 of the comparative multilayer chip ceramic capacitor 001 is 138.2MPa
  • the drop stress of the capacitor body 20 of Example 1 is 86.9MPa
  • the drop stress of the capacitor body 20 of Example 2 The drop stress of the capacitor body 20 of Example 3 is 116.2 MPa
  • the drop stress of the capacitor body 20 of Example 4 is 126.7 MPa.
  • the drop stress of the capacitor body 20 of Example 1 is the smallest.
  • the drop strain of the multilayer chip ceramic capacitor 001 of the comparative group is 1247ue
  • the drop strain of the multilayer chip ceramic capacitor 001 of Example 1 is 628ue
  • the drop strain of the multilayer chip ceramic capacitor 001 of Example 2 The strain is 724.7ue
  • the drop strain of the multilayer chip ceramic capacitor 001 of Example 3 is 884ue
  • the drop strain of the multilayer chip ceramic capacitor 001 of Example 4 is 1033ue.
  • the drop strain of the multilayer chip ceramic capacitor 001 of Example 1 is the smallest.
  • the drop stress of the solder joints of the multilayer chip ceramic capacitor 001 of the comparative group is 138.3MPa
  • the drop stress of the solder joints of the multilayer chip ceramic capacitor 001 of Example 1 is 93.06MPa
  • the multilayer chip of Example 2 is 93.06MPa.
  • the drop stress at the solder joint of the 001 type ceramic capacitor is 97.68MPa
  • the drop stress at the solder joint of the example three multi-layer chip ceramic capacitor 001 is 126.7MPa
  • the drop stress at the solder joint of the example four multi-layer chip ceramic capacitor 001 is 128.9 MPa.
  • the drop stress at the solder joints of the example 1 multilayer chip ceramic capacitor 001 is the smallest.
  • FIG. 9 shows the improvement of the drop stress of the capacitor body 20 , the drop stress of the capacitor body 20 and the drop stress of the solder joint of each multilayer chip ceramic capacitor 001 compared with the conventional design, respectively.
  • Example 1 the drop stress of the capacitor body 20 decreased by 37% compared with the control group, and the drop stress of the capacitor body 20 decreased by 33% compared with the control group.
  • the solder joints of the multilayer chip ceramic capacitor 001 The drop stress decreased by 50% compared with the control group.
  • Example 2 the drop stress of the capacitor body 20 is reduced by 29% compared with the control group, the drop stress of the capacitor body 20 is reduced by 29% compared with the control group, and the drop stress of the solder joints of the multilayer chip ceramic capacitor 001 is lower than that of the control group. That's down 42%.
  • Example 3 the drop stress of the capacitor body 20 decreased by 16% compared with the control group, the drop stress of the capacitor body 20 decreased by 8% compared with the control group, and the drop stress of the solder joints of the multilayer chip ceramic capacitor 001 was lower than that of the control group. compared to a decrease of 29%.
  • Example 4 the drop stress of the capacitor body 20 decreased by 8% compared with the control group, and the drop stress of the capacitor body 20 decreased by 7% compared with the control group. That's down 17%.
  • the cross-shaped buffer structure can reduce the stress and strain of the capacitor body 20 when it is dropped to the greatest extent, and the drop stress at the position of the solder joint.
  • the capacitor body 20 may be connected to the terminal electrodes through an elastic conductive material such as conductive resin or conductive glue.
  • the elastic conductive material can better absorb the mechanical stress on the capacitor body 20 , prevent the capacitor body 20 from breaking under the stress, and improve the reliability of the multilayer ceramic capacitor 001 .

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Abstract

本申请实施例公开了一种电子器件和电子设备，该电子器件设置在印刷电路板PCB上，该电子器件包括：电子器件本体，该电子器件本体通过连接部件与该PCB焊接连接，其中，该连接部件上设有至少一个缓冲结构。由此，通过在连接部件上设置至少一个缓冲结构，电子器件受到机械应力时，可以在缓冲结构位置处释放应力，减小了电子器件本体受到的应力，避免电子器件本体在应力作用下发生断裂，提高了电子器件的可靠性。

Description

电子器件和电子设备
本申请要求于2020年9月18日提交到国家知识产权局、申请号为202022071522.4，发明名称为“电子器件和电子设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请实施例涉及电容器技术领域，尤其涉及一种电子器件和电子设备。
背景技术
随着世界电子行业的飞速发展，作为电子行业的基础元件，多层片式陶瓷电容(Multi-layer Ceramic Capacitors，MLCC)，被广泛用于电子产品中。
其中，电子器件通常设置在印制电路板(Printed Circuit Board，PCB)上，并与PCB焊接连接。
然而，PCB受到应力时会发生弯曲，该电子器件包括陶瓷介质，受到应力时，发生断裂，导致电子产品的内部电路短路或断路，影响电子产品的灵敏性或造成电子产品失效。
实用新型内容
本申请实施例提供一种电子器件和电子设备，解决了电子器件可靠性差的问题。
为达到上述目的，本申请实施例采用如下技术方案：本申请实施例的第一方面，提供一种电子器件，该电子器件设置在PCB上，该电子器件包括：电子器件本体，该电子器件本体通过连接部件与该PCB焊接连接，其中，该连接部件上设有至少一个缓冲结构。由此，通过在连接部件上设置至少一个缓冲结构，电子器件受到机械应力时，可以在缓冲结构位置处释放应力，减小了电子器件本体受到的应力，避免电子器件本体在应力作用下发生断裂，提高了电子器件的可靠性。
根据第一方面，在一种可能的设计中，该缓冲结构为矩形、圆形或不规则形状，该缓冲结构与该连接部件组成“回”形结构。由此，可以在缓冲结构处释放应力。
根据第一方面，在一种可能的设计中，该缓冲结构的形状包括以下中的任一种：直线形、曲线形、折线形。由此，缓冲结构的形状更加灵活。
根据第一方面，在一种可能的设计中，该缓冲结构为1个，该连接部件包括：相对的第一边和第二边，该缓冲结构穿过该连接部件的第一边和第二边。由此，该缓冲结构可以将连接部件受力面分隔成独立的两部分，使得应力无法连续传递至电子器件本体，提高了电子器件的可靠性。
根据第一方面，在一种可能的设计中，该缓冲结构为2个，2个该缓冲结构呈十字形交叉设置，2个该缓冲结构分别穿过该连接部件相对的两条对边。由此，该缓冲结构可以进一步将连接部件受力面分隔成独立的四部分，使得应力无法连续传递至电子器件本体，提高了电子器件的可靠性。
根据第一方面，在一种可能的设计中，该连接部件包括：焊盘，该焊盘上设有至少一个缓冲结构。由此，连接部件结构简单，便于组装。
根据第一方面，在一种可能的设计中，该连接部件包括：焊盘、连接材料，该连接材料位于该焊盘和该电子器件本体之间，其中，该连接材料上设有至少一个该缓冲结构。由 此，通过设置连接材料，提高了连接的稳定性，同时，无需改变焊盘的原机构，操作更简单。
根据第一方面，在一种可能的设计中，连接材料包括：焊料、导电胶中的至少一种。
根据第一方面，在一种可能的设计中，该电子器件还包括：覆盖于电子器件本体两端的端电极，该端电极通过连接材料与该电路板焊接连接。由此，可以将电子器件本体更稳定的连接在PCB上。
根据第一方面，在一种可能的设计中，该电子器件本体通过导电树脂或导电胶和该端电极连接。由此，该弹性导电材料可以更好的吸收电子器件本体受到的机械应力，避免电子器件本体在应力作用下发生断裂，提高了电子器件的可靠性。
根据第一方面，在一种可能的设计中，该缓冲结构包括以下中的至少一种：设置在该连接部件上的开口、设置在该连接部件与该电子器件本体之间的缓冲件。由此，可以通过开口或缓冲件释放应力，减小了电子器件本体受到的应力，避免电子器件本体在应力作用下发生断裂，提高了电子器件的可靠性。
根据第一方面，在一种可能的设计中，该缓冲件为阻焊层。由此，通过设置阻焊层，可以在阻焊层位置处将电子器件本体和PCB的连接断开，使得受力面被分隔开，使得应力无法连续传递至电子器件本体，提高了电子器件的可靠性。
本申请的第二方面，提供一种电子设备，该电子设备包括：PCB，以及如上所述的电子器件，该电子器件设置在该PCB上。由此，上述电子器件具有与前述实施例提供的电子器件相同的技术效果，此处不再赘述。
附图说明
图1a为一种多层片式陶瓷电容的结构示意图；
图1b为图1a中连接部件的俯视图；
图2为本申请实施例提供的一种多层片式陶瓷电容的剖面图；
图2a为本申请实施例提供的一种连接部件的俯视图；
图2b为本申请实施例提供的一种连接部件的俯视图；
图2c为本申请实施例提供的一种连接部件的俯视图；
图2d为本申请实施例提供的一种连接部件的俯视图；
图3为本申请实施例提供的另一种多层片式陶瓷电容的结构示意图；
图3a为本申请实施例提供的一种连接部件的俯视图；
图3b为本申请实施例提供的一种连接部件的俯视图；
图3c为本申请实施例提供的一种连接部件的俯视图；
图3d为本申请实施例提供的一种连接部件的俯视图；
图4为本申请实施例提供的另一种多层片式陶瓷电容的结构示意图；
图4a为本申请实施例提供的一种连接部件的俯视图；
图4b为本申请实施例提供的一种连接部件的俯视图；
图4c为本申请实施例提供的一种连接部件的俯视图；
图4d为本申请实施例提供的一种连接部件的俯视图；
图5为本申请实施例提供的对照组的多层片式陶瓷电容的结构示意图；
图5a为示例一中多层片式陶瓷电容的结构示意图；
图5b为示例二中多层片式陶瓷电容的结构示意图；
图5c为示例三中多层片式陶瓷电容的结构示意图；
图5d为示例四中多层片式陶瓷电容的结构示意图；
图6为对照组、示例一、示例二、示例三和示例四中多层片式陶瓷电容的电容本体跌落应力对比图；
图7为对照组、示例一、示例二、示例三和示例四中多层片式陶瓷电容的电容本体跌落应变对比图；
图8为对照组、示例一、示例二、示例三和示例四中多层片式陶瓷电容的焊点处跌落应力对比图；
图9为对照组、示例一、示例二、示例三和示例四中多层片式陶瓷电容的电容本体跌落应力、应变及焊点处跌落应力的对比图。
具体实施方式
为了使本申请的目的、技术方案和优点更加清楚，下面将结合附图对本申请作进一步地详细描述。
以下，术语“第一”、“第二”等仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”等的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请的描述中，除非另有说明，“多个”的含义是两个或两个以上。
此外，本申请中，“上”、“下”等方位术语是相对于附图中的部件示意置放的方位来定义的，应当理解到，这些方向性术语是相对的概念，它们用于相对于的描述和澄清，其可以根据附图中部件所放置的方位的变化而相应地发生变化。
本申请实施例提供一种电子设备，电子设备包括例如手机、平板电脑、车载电脑、智能穿戴产品、物联网(internet of things，IOT)等。本申请实施例对上述电子设备的具体形式不做特殊限制。
所述电子设备包括PCB，以及设置在所述PCB上的电子器件。该电子器件包括例如多层片式陶瓷电容(Multi-layer Ceramic Capacitors，MLCC)、电感、晶圆级封装(Wafer Level Package,WLP)等易本体断裂失效的电子器件。下面以电子器件为多层片式陶瓷电容MLCC为例进行说明。
图1a为一种多层片式陶瓷电容的结构示意图。如图1a所示，所述多层片式陶瓷电容设置在印刷电路板PCB10上。其中，所述多层片式陶瓷电容001包括：电容本体20，该电容本体20例如由多层带电极的陶瓷片组成。其中，该电容本体20例如通过连接部件与该PCB10连接。在一些实施例中，该连接部件可以是焊盘。
图1b为图1a中连接部件的俯视图。如图1a、图1b所示，该电容本体20例如通过连接材料50和焊盘30焊接连接，且焊盘30与PCB10焊接连接。
在本申请的一些实施例中，多层片式陶瓷电容001还包括端电极，所述端电极通过连接材料50与所述电路板焊接连接。所述连接材料50材质可以是焊料、导电胶等导电材料。焊料例如包括锡Sn合金、银Ag合金、铜Cu合金等。
端电极例如呈“]”形，当电容通过连接部与电路板相焊接时，连接材料50部分附着在端电极靠近电路板的部分的外侧，部分位于电容本体20和焊盘30之间，连接材料50在 端电极附着的位置的两个端点连接起来，在电容本体20上大致形成一个三角形。
连接材料的形状也可以不仅仅是三角形，还可以是梯形、或矩形、或者圆形的一部分，一般来说，连接部覆盖的面积越大，预防短路的效果就越好。
在一些实施例中，如图1b所示，PCB10的表面上设有阻焊层101，阻焊层101上设有开口，焊盘30设置于阻焊层101的开口处，且焊盘30与阻焊层101之间设有间隙1001，焊盘30表面上没有阻焊层101，这种设计为无阻焊定义(Non-Solder Mask Definied，NSMD)焊盘。
在另一些实施例中，PCB10的表面上设有阻焊层101，阻焊层101上设有开口，焊盘30设置于阻焊层101的开口处，焊盘30的四周设有阻焊层101，这种设计为阻焊定义(Solder Mask Definied)焊盘。
当然，在另一些实施例中，一些焊盘30的表面上设有阻焊层101，一些焊盘30的表面上没有阻焊层101，这种设计为NSMD/SMD混合焊盘，这些均属于本申请的保护范围。
然而，当PCB10受到外力时会发生弯曲，PCB10会通过焊盘30将应力传递给电容本体20，使得电容本体20在应力作用下断裂，造成多层片式陶瓷电容001失效。
为此，本申请实施例提供一种改进的多层片式陶瓷电容001。
如图2所示，所述多层片式陶瓷电容001包括：电容本体20，所述电容本体20通过连接部件100与所述印刷电路板PCB10焊接连接，其中，所述连接部件100上设有至少一个缓冲结构。
其中，印刷电路板PCB10的表面上例如设有阻焊层101，其中，阻焊层材质可以是树脂，可以起到防潮、绝缘、防焊、耐高温的作用。阻焊层101上例如设有开口，连接部件100设置在开口处。
本申请实施例对该缓冲结构不做限制。在本申请一些实施例中，如图2所示，所述缓冲结构包括设置在所述连接部件100上的第一开口301。
在本申请另一些实施例中，该缓冲结构包括：设置在所述连接部件100与所述电容本体20之间的缓冲件102。该缓冲件102可以是弹性部件或阻焊层。
本申请实施例提供的多层片式陶瓷电容001，通过在连接部件100上设置至少一个缓冲结构，多层片式陶瓷电容001受到机械应力时，可以在缓冲结构位置处释放应力，减小了电容本体20受到的应力，避免电容本体20在应力作用下发生断裂，提高了多层片式陶瓷电容001的可靠性。
本申请实施例对该缓冲结构的位置不做限制。可以将缓冲结构设置在多层片式陶瓷电容001容易发生断裂的位置。在本申请一些实施例中，多层片式陶瓷电容001的中间位置容易发生断裂，因此，可以将缓冲结构设置在电容本体20的中间位置。
本申请实施例对该连接部件100的具体结构不做限制。在本申请一些实施例中，如图2所示，所述连接部件100包括：焊盘30。该焊盘30为三层结构，包括层叠设置的电容本体焊盘、连接材料和PCB焊盘。
所述电容本体20的一个表面通过连接材料50与所述焊盘30焊接连接，焊盘30与所述PCB10焊接连接。电容本体20和焊盘30之间的连接材料50的形状与焊盘30的形状相匹配。
在一些实施例中，如图2所示，焊盘30上设有第一开口301作为缓冲结构。
本申请实施例对缓冲结构的形状不做限制。所述缓冲结构的形状包括以下中的任一种：直线形、曲线形、折线形。例如：“一”形、“U”形、“V形”、“W”形、“S”形。
本申请实施例对该缓冲结构的数量不做限制，在本申请一些实施例中，如图2a所示，连接部件100包括：焊盘30，焊盘30上设有2个缓冲结构：第一开口301和第二开口302，第一开口301和第二开口302呈十字形交叉设置。
第一开口301例如平行于X轴方向横向设置，并由焊盘30的第一边向第二边延伸，第二开口302例如平行于Y轴方向纵向设置，并由焊盘30的第三边向第四边延伸。
且第一开口301和第二开口302将焊盘30分成4块。
在本申请另一些实施例中，如图2b、图2c所示，缓冲结构为1个，连接部件100例如包括相对的第一边和第二边，所述缓冲结构穿过所述第一边和所述第二边。
其中，如图2b所示，焊盘30上设有一个平行于Y轴方向的第一开口301，焊盘30被第一开口301沿Y轴方向分成2块，第一开口301的宽度例如为第三边和第四边长度的三分之一。
如图2c所示，焊盘30上设有一个平行于X轴方向的第二开口302，焊盘30被第二开口302沿X轴方向分成2块，第二开口302的宽度为第一边和第二边长度的三分之一。
在本申请另一些实施例中，缓冲结构为矩形、圆形或不规则形状，设置在电容本体20的中心位置。如图2d所示，电容本体20的中间设有第三开口303，电容本体20的横截面为“回”形。
其中，本申请实施例提供的多层片式陶瓷电容001，通过在焊盘30上设置开口，降低了传统完全焊接焊盘30设计将PCB10变形向脆弱的电容本体20传递的有效性，从而降低了电容本体20的应力和应变，进而降低了电容本体20陶瓷断裂风险，改善了多层片式陶瓷电容001板级应用可靠性。
在另一些实施例中，如图3所示，所述焊盘30与所述电容本体20之间设有缓冲件102。焊盘30与所述电容本体20之间的连接材料50上设有开口，缓冲件102位于开口中，且焊盘30与所述电容本体20之间的连接材料50的高度高于缓冲件102的高度。
在本申请一些实施例中，如图3a所示，连接部件100包括：焊盘30，焊盘30上设有2个缓冲结构：第一缓冲件1021和第二缓冲件1022，第一缓冲件1021和第二缓冲件1022呈十字形交叉设置。
第一缓冲件1021例如平行于X轴方向横向设置，并由焊盘30的第一边向第二边延伸，第二缓冲件1022例如平行于Y轴方向纵向设置，并由焊盘30的第三边向第四边延伸。
且第一缓冲件1021和第二缓冲件1022将焊盘30分成4块。
在本申请另一些实施例中，本申请实施例对该缓冲结构的数量不做限制，在本申请一些实施例中，如图3b、图3c所示，缓冲结构为1个，连接部件100例如包括相对的第一边和第二边，所述缓冲结构穿过所述第一边和所述第二边。
其中，如图3b所示，焊盘30上设有一个平行于Y轴方向的第一缓冲件1021，焊盘30被第一缓冲件1021沿Y轴方向分成2块，第一缓冲件1021的宽度例如为第三边和第四边长度的三分之一。
如图3c所示，焊盘30上设有一个平行于X轴方向的第二缓冲件1022，焊盘30被第 二缓冲件1022沿X轴方向分成2块，第二缓冲件1022的宽度为第一边和第二边长度的三分之一。
在本申请一些实施例中，缓冲结构为矩形、圆形或不规则形状，设置在电容本体20的中心位置。如图3d所示，电容本体20的中间位置设有第三缓冲件1023，电容本体20的俯视图为“回”形。
其中，本申请实施例提供的多层片式陶瓷电容001，通过局部设置缓冲层102设计降低了传统完全焊接焊盘30设计将PCB10变形向脆弱的电容本体20传递的有效性，从而降低了电容本体20的应力和应变，进而降低了电容本体20陶瓷断裂风险，改善了多层片式陶瓷电容001板级应用可靠性。
在本申请另一些实施例中，所述连接部件100包括：焊盘30、连接材料50，所述连接材料50部分位于所述焊盘30和所述电容本体20之间，其中，所述连接材料50上设有至少一个所述缓冲结构。
在一些实施例中，如图4所示，电容本体20和焊盘30之间的连接材料50上设有开口作为缓冲结构。
在本申请一些实施例中，如图4a所示，连接材料50上设有2个缓冲结构：第一开口301和第二开口302，第一开口301和第二开口302呈十字形交叉设置。
第一开口301例如平行于X轴方向横向设置，并由连接材料50的第一边向第二边延伸，第二开口302例如平行于Y轴方向纵向设置，并由连接材料50的第三边向第四边延伸。
且第一开口301和第二开口302将连接材料50分成4块。
在本申请另一些实施例中，本申请实施例对该缓冲结构的数量不做限制，在本申请一些实施例中，如图4b、图4c所示，缓冲结构为1个，连接部件100例如包括相对的第一边和第二边，所述缓冲结构穿过所述第一边和所述第二边。
其中，如图4b所示，连接材料50上设有一个平行于Y轴方向的第一开口301，连接材料50被第一开口301沿Y轴方向分成2块，第一开口301的宽度例如为第三边和第四边长度的三分之一。
如图4c所示，连接材料50上设有一个平行于X轴方向的第二开口302，连接材料50被第二开口302沿X轴方向分成2块，第二开口302的宽度为第一边和第二边长度的三分之一。
在本申请一些实施例中，缓冲结构为矩形、圆形或不规则形状，设置在电容本体20的中心位置。如图4d所示，电容本体20的中间设有第三开口303，电容本体20的横截面为“回”形。
其中，本申请实施例提供的多层片式陶瓷电容001，通过在连接材料50局部设置开口设计降低了传统完全焊接焊盘30设计将PCB10变形向脆弱的电容本体20传递的有效性，从而降低了电容本体20的应力和应变，进而降低了电容本体20陶瓷断裂风险，改善了多层片式陶瓷电容001板级应用可靠性。
在另一些实施例中，所述连接材料50与所述电容本体20之间设有缓冲件102作为缓冲结构(图中未示出)。
下面分别对缓冲结构形状不同的多层片式陶瓷电容001进行跌落仿真测试。
其中，以0805型多层片式陶瓷电容001为例，其中，0805代表电容的尺寸规格，是用英寸来表示的，08表示长度是0.08英寸，对应2.0mm，05表示宽度为0.05英寸，对应1.27mm。
如图5、图5a、图5b、图5c、图5d所示，该多层片式陶瓷电容001包括：电容本体20、连接部件100和印刷电路板10，其中，电容本体20通过连接部件和印刷电路板连接。
连接部件包括：焊盘30和连接材料50。焊盘30的截面形状和尺寸与该电容本体20的截面形状和尺寸相同，焊盘30上例如设有开口作为缓冲结构。
图5为对比组，如图5所示，对比组的多层片式陶瓷电容001未设置缓冲结构。
示例一，如图5a所示，焊盘30上设有2个开口：第一开口和第二开口，第一开口和第二开口呈十字形交叉设置。
第一开口例如平行于X轴方向，并由焊盘30的第一边向第二边延伸，第二开口例如平行于Y轴方向，并由焊盘30的第三边向第四边延伸。
且第一开口和第二开口将焊盘30分成4块，第一开口的宽度为第一边和第二边长度的四分之一，第二开口的宽度为第三边和第四边长度的四分之一。
示例二，如图5b所示，焊盘30上设有一个平行于Y轴方向的第一开口，焊盘30被第一开口沿Y轴方向分成2块，第一开口的宽度例如为第三边和第四边长度的三分之一。
示例三，如图5c所示，焊盘30上设有一个平行于X轴方向的第二第一开口，焊盘30被第二开口沿X轴方向分成2块，第二开口的宽度为第一边和第二边长度的三分之一。
示例四，如图5d所示，焊盘30的中心位置设有一个第三开口，第三开口例如为矩形，焊盘30的横截面为“回”形。第三开口303的横边和纵边长度分别为对应焊盘30的横边和纵边长度的四分之一。
上述多层片式陶瓷电容例如设置在PCB10上，其中，PCB10的厚度为0.65mm。
进行跌落仿真测试时，冲击加速度例如为1500G/1ms。
图6为跌落测试的仿真结果。其中，如图6所示，对比组多层片式陶瓷电容001的电容本体20的跌落应力为138.2MPa，示例一的电容本体20的跌落应力为86.9MPa，示例二的电容本体20的跌落应力为97.68MPa，示例三的电容本体20的跌落应力为116.2MPa，示例四的电容本体20的跌落应力为126.7MPa。其中，示例一的电容本体20的跌落应力最小。
如图7所示，对比组的多层片式陶瓷电容001的跌落应变为1247ue，示例一的多层片式陶瓷电容001的跌落应变为628ue，示例二的多层片式陶瓷电容001的跌落应变为724.7ue，示例三的多层片式陶瓷电容001的跌落应变为884ue，示例四的多层片式陶瓷电容001的跌落应变为1033ue。其中，示例一的多层片式陶瓷电容001的跌落应变最小。
如图8所示，对比组多层片式陶瓷电容001的焊点的跌落应力为138.3MPa，示例一的多层片式陶瓷电容001焊点处的跌落应力为93.06MPa，示例二多层片式陶瓷电容001焊点处的跌落应力为97.68MPa，示例三多层片式陶瓷电容001焊点处的跌落应力为126.7MPa，示例四多层片式陶瓷电容001焊点处的跌落应力为128.9MPa。其中，示例一多层片式陶瓷电容001焊点处的跌落应力最小。
图9为各多层片式陶瓷电容001的电容本体20跌落应力、电容本体20跌落应变和和焊点跌落应力分别相对传统设计的改善情况。
如图9所示，示例一中，电容本体20跌落应力与对照组相比下降了37％，电容本体20跌落应变与对照组相比下降了33％，多层片式陶瓷电容001的焊点的跌落应力与对照组相比下降了50％。
示例二中，电容本体20跌落应力与对照组相比下降了29％，电容本体20跌落应变与对照组相比下降了29％，多层片式陶瓷电容001的焊点的跌落应力与对照组相比下降了42％。
示例三中，电容本体20跌落应力与对照组相比下降了16％，电容本体20跌落应变与对照组相比下降了8％，多层片式陶瓷电容001的焊点的跌落应力与对照组相比下降了29％。
示例四中，电容本体20跌落应力与对照组相比下降了8％，电容本体20跌落应变与对照组相比下降了7％，多层片式陶瓷电容001的焊点的跌落应力与对照组相比下降了17％。
综上，通过在焊盘30上设置开口，可以减小电容本体20在跌落时的应力、应变，以及电容本体20的焊点位置处的跌落应力。其中，十字形的缓冲结构可以最大程度降低电容本体20在跌落时的应力、应变，以及焊点位置处的跌落应力。
在本申请一些实施例中，所述电容本体20可以通过导电树脂或导电胶等弹性导电材料和所述端电极连接。
其中，该弹性导电材料可以更好的吸收电容本体20受到的机械应力，避免电容本体20在应力作用下发生断裂，提高了多层片式陶瓷电容001的可靠性。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何在本申请揭露的技术范围内的变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (13)

  1. 一种电子器件，其特征在于，所述电子器件设置在印制电路板PCB上，所述电子器件包括：电子器件本体，所述电子器件本体通过连接部件与所述PCB焊接连接，其中，所述连接部件上设有至少一个缓冲结构。
  2. 根据权利要求1所述的电子器件，其特征在于，所述缓冲结构包括以下中的至少一种：设置在所述连接部件上的开口、设置在所述连接部件与所述电子器件本体之间的缓冲件。
  3. 根据权利要求1或2所述的电子器件，其特征在于，所述缓冲结构的形状包括以下中的任一种：直线形、曲线形、折线形或不规则形状。
  4. 根据权利要求3所述的电子器件，其特征在于，所述缓冲结构为1个，所述连接部件包括：相对的第一边和第二边，所述缓冲结构穿过所述连接部件的第一边和第二边。
  5. 根据权利要求3所述的电子器件，其特征在于，所述缓冲结构设置于所述连接部件的中间位置，并与所述连接部件组成回形结构。
  6. 根据权利要求3所述的电子器件，其特征在于，所述缓冲结构为2个，2个所述缓冲结构呈十字形交叉设置，2个所述缓冲结构分别穿过所述连接部件相对的两条对边。
  7. 根据权利要求1-2、4-6任一项所述的电子器件，其特征在于，所述连接部件包括：焊盘，所述焊盘上设有至少一个缓冲结构。
  8. 根据权利要求1-2、4-6任一项所述的电子器件，其特征在于，所述连接部件包括：焊盘、连接材料，所述连接材料位于所述焊盘和所述电子器件本体之间，其中，所述连接材料上设有至少一个所述缓冲结构。
  9. 根据权利要求8所述的电子器件，其特征在于，所述连接材料包括：焊料、导电胶中的至少一种。
  10. 根据权利要求1-2、4-6、9任一项所述的电子器件，其特征在于，所述电子器件还包括：覆盖于电子器件本体两端的端电极，所述端电极通过连接材料与所述电路板焊接连接。
  11. 根据权利要求10所述的电子器件，其特征在于，所述电子器件本体通过导电树脂或导电胶和所述端电极连接。
  12. 根据权利要求2所述的电子器件，其特征在于，所述缓冲件为阻焊层。
  13. 一种电子设备，其特征在于，所述电子设备包括：PCB，以及如权利要求1-12任一项所述的电子器件，所述电子器件设置在所述PCB上。
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CN214505273U (zh) 2021-10-26
EP4210077A1 (en) 2023-07-12

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