WO2024256788A1 - Procede de mesure de la resistance et de la capacitance de films minces en cours de depot - Google Patents
Procede de mesure de la resistance et de la capacitance de films minces en cours de depot Download PDFInfo
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- WO2024256788A1 WO2024256788A1 PCT/FR2024/050784 FR2024050784W WO2024256788A1 WO 2024256788 A1 WO2024256788 A1 WO 2024256788A1 FR 2024050784 W FR2024050784 W FR 2024050784W WO 2024256788 A1 WO2024256788 A1 WO 2024256788A1
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- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
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- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
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- C23C14/54—Controlling or regulating the coating process
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/02—Pretreatment of the material to be coated
- C23C16/0272—Deposition of sub-layers, e.g. to promote the adhesion of the main coating
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/04—Coating on selected surface areas, e.g. using masks
- C23C16/042—Coating on selected surface areas, e.g. using masks using masks
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/56—After-treatment
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
- H10P74/207—Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics
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- H—ELECTRICITY
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- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
- H10P74/27—Structural arrangements therefor
- H10P74/277—Circuits for electrically characterising or monitoring manufacturing processes, e.g. circuits in tested chips or circuits in testing wafers
Definitions
- the invention relates to the field of measuring resistance and/or capacitance and/or inductance during deposition or during oxidation of thin layers, for example with a thickness greater than approximately 1 nm to 3 nm (or even greater thickness, for example up to 200 nm), metallic, in the presence or absence of reactive gases (for example oxygen and/or nitrogen) semiconducting or even insulating.
- reactive gases for example oxygen and/or nitrogen
- the invention allows adjustment of the properties, for example of electrical conduction, of these thin layers, and to resolve the reproducibility problems relating to this type of deposition, in particular when precise characteristics of conductivity or resistance and/or superconducting inductance (which can be adjusted via the resistance of the film at room temperature) and/or capacitance are required for electronic devices.
- the main in-situ measurement methods are optical methods (interferometry, ellipsometry), which are unreliable for determining resistance, very expensive, and require specific deposition equipment with optical access; in addition, such equipment is not compatible with certain existing machines.
- Known techniques lack reproducibility with regard to the measurement of the electrical conduction of films obtained by deposition of thin layers, in particular in the presence of oxygen and/or nitrogen and/or hydrogen. This is the case, in particular, for granular aluminum (comprising aluminum grains in an A Os matrix) and tunnel junctions, for example AI-AIO X -AI.
- the contact pads are generally quite thick on this type of PCB, the film being deposited cannot therefore cover these pads since their thickness is very low (of the order of a few nm for example),
- the PCB holding block is thick, shadows the material flow during deposition, and cannot be fixed in a position close to the sample of interest, nor at the same temperature as the latter, which makes it unlikely that the measured PCB has exactly the same resistance per square as the sample of interest; note that the temperature of the plate plays a role in the growth of the films.
- a problem that therefore arises is the lack of reproducibility of the electrical conduction of films obtained by thin-layer deposition, particularly in the presence of oxygen (or another reactive gas).
- This concerns for example, granular aluminum (comprising aluminum grains in an AhCh matrix) and Al-Al0x-Al tunnel junctions.
- metal deposits e.g. titanium or chromium
- Niobium-silicon or Yttrium-silicon, or Nickel - Chromium deposits
- co-pulverization for example Niobium-silicon, or Yttrium-silicon, or Nickel - Chromium deposits
- SUBSTITUTE SHEET (RULE 26) Another problem is the lack of reproducibility of the oxidation rate of tunnel junctions formed by deposition of a metal layer, followed by oxidation, immediately followed by a 2nd deposition of a metal layer, for example when forming AI-AIO X -AI tunnel junctions, or when forming Nb-AI-AIOx-AI-Nb junctions.
- Another problem that arises is the lack of reproducibility of the etching of an oxide layer by ion beam, for example for the resumption of contact on pre-deposited film oxidizing in air (Al, N b).
- the invention aims to solve all or part of these problems.
- It first relates to a method for producing a support, or a chip, for depositing films, in particular of the thin film type, comprising: a) - the formation, on a substrate made of an insulating or semi-conducting material, of a plurality of measuring electrodes, each electrode having a central part, inclined edges or with a slope towards the surface of the substrate; b) - the formation of a non-conductive deposition mask, defining a deposition window, this mask comprising notches in the vicinity of the substrate and of said deposition window.
- a deposition support, or chip according to the invention makes it possible, for example, to control the production of a film, in particular a thin film, by measuring in real time and using the electrodes the evolution of an electrical quantity, for example the conductivity or the electrical resistance of the film being formed, by connecting means for measuring this quantity to the contact pads.
- the window can be positioned above a plurality of electrodes, preferably above all the measuring electrodes, to allow a deposited film to cover them all on a part and electrically connect them together through a track of well-defined geometry;
- each electrode has a contact pad at one of its ends
- the electrodes are, at least in the deposition window, parallel to each other;
- the electrodes may have edges, forming gentle lateral slopes, with an angle with the surface of the substrate of less than 80°, for example between 15° and 60° (or 50°);
- the electrodes are made of a non-oxidizing material to allow electrical contact with the thin film deposited above;
- the measuring electrodes can be for example made of Ti/Au.
- the edge of the insulating mask is suspended by the notches to avoid continuity of the material deposition between the bottom (the deposition made on the substrate and the electrodes) and the top of the mask, which would distort any measurement made with the electrodes.
- the invention makes it possible to control the formation of Josephson junctions in situ for quantum technologies, by measuring in real time the resistance of an aluminum film already deposited, to determine the oxidized proportion of the film (no longer conducting electric current), to monitor the growth of the oxide and to stop the oxidation on a resistance setpoint.
- the invention makes it possible to control the reproducibility of the surface resistance of granular aluminum films (aluminum evaporated in the presence of oxygen at a partial pressure of some 10 -6 mbars). This can be done either by stopping the evaporation on a resistance setpoint measured in real time, or by comparing the resistance curve as a function of the thickness to a reference curve, and by adjusting in real time the oxygen flow or the aluminum evaporation rate to follow this reference curve.
- a method according to the invention may further comprise a step of producing a resistor or electrode, called a protective resistor, between the mask and the substrate, preferably
- SUBSTITUTE SHEET (RULE 26) of high resistance value (greater than 1 MQ, for example between 1 and 10 MQ), for example in chrome.
- a chip or a deposition substrate (described below) according to the invention may comprise such a resistor or electrode, called a protective resistor, preferably of high resistance value (greater than 1 MQ, for example between
- This resistance - if present - can be electrically connected in parallel with the film to be deposited. In particular, it allows the presence and good contact of the in-situ measurement substrate to be checked before deposition is started (it may happen that this substrate is poorly positioned and that the deposit is therefore not measurable during growth if this could not be ensured beforehand). It also allows the current flowing through the film being deposited to be limited (it is progressively polarized into current as it grows) and to avoid passing a strong current through the thin film that has just been deposited, which, in the case of certain materials, heats them and modifies their properties. For example, this resistance has a thickness of between 3 and 100 nm, for example 10 nm. Preferably, this resistance is not located in the deposition window.
- the substrate is for example made of silicon or quartz or sapphire.
- It preferably has a surface, on which a deposit is to be made, with a roughness RA of, for example, between 0.01 nm and 1 nm.
- a roughness RA of, for example, between 0.01 nm and 1 nm.
- Such roughness ensures the continuity of the film between the measuring electrodes and thus allows a current to flow there from the first atomic layers.
- the measuring electrodes can be made of Ti/Au, for example.
- a method according to the invention may further comprise a step of producing a protective layer for the substrate, advantageously a protective layer on each of the 2 faces of said substrate. This protection may be implemented before cutting the substrate into individual/individual single-use deposition chips or supports.
- a method according to the invention may further comprise a prior step of planarizing the surface of the substrate.
- the deposition window has a transverse orientation, for example perpendicular, to that of at least part of the measuring electrodes.
- the electrodes are made by evaporation at an angle, for example variable or fixed (with planetary rotation).
- the electrodes have edges, forming gentle lateral slopes, with an angle with the surface of the substrate less than 80°, for example between 15° and 60° (or 50°).
- the invention also relates to a support, or a chip, for thin film deposition, comprising: a) a substrate made of insulating or semiconducting material, b) a plurality of measuring electrodes produced on said substrate, each electrode having a central part and inclined edges and/or with a slope towards the surface of the substrate; c) a non-conductive deposition mask defining a deposition window, this mask comprising notches in the vicinity of the substrate and said window.
- This substrate has the advantages set out above in relation to the production process.
- Such a deposit chip may further comprise a protective resistor, preferably with a resistance greater than 1 M ⁇ .
- This resistor is, for example, made of chrome. It may have a thickness of, for example, between 3 nm and 10 nm or even 100 nm.
- the substrate is for example silicon or chrome or sapphire.
- the measuring electrodes are for example made of Ti/Au.
- a deposition chip according to the invention may further comprise a film or a layer, for example made of plastic, for protection, in particular against scratches and dust.
- a film deposition support according to the invention as described above and/or in the remainder of the present application and/or according to a preferred embodiment of a support, or a chip, for deposition of films
- the deposition window may have an orientation transverse to a plurality of measuring electrodes, for example an orientation perpendicular to that of at least part of the measuring electrodes.
- the electrodes may have edges, forming lateral slopes with an angle with the surface of the substrate less than 80°, for example between 15° and 60° (or 50°).
- the invention also relates to a method for depositing a layer, for example a thin layer, for example with a thickness of between 1 nm and 100 nm or even 200 nm.
- a method for depositing a layer for example a thin layer, for example with a thickness of between 1 nm and 100 nm or even 200 nm.
- Such a method comprises a step of depositing a layer in the deposition window of a support or a deposition chip according to the invention, and a measurement, preferably during said deposition, of at least one electrical quantity, for example the conductivity and/or the electrical resistance at zero frequency (or in direct current or in DC), or more generally the electrical impedance at finite frequency (or in alternating current or in AC) which gives simultaneous access to the resistance and/or the capacitance and/or the inductance at the terminals of at least 2 measuring electrodes.
- the conductivity and/or the electrical resistance at zero frequency or in direct current or in DC
- the electrical impedance at finite frequency
- An insulating film can be deposited to create a capacitance, for example, in which case its impedance is measured at a finite frequency.
- a deposit can thus be made, partly on the substrate, partly on the electrodes, the latter making it possible to measure said electrical quantity, for example the electrical resistance and/or the capacitance and/or the inductance of the deposit or of the deposited layer.
- the deposition of the layer can for example be obtained by sputtering, or by chemical vapor deposition technique or by electron gun evaporation or by co-evaporation or by co-sputtering.
- a deposition process according to the invention makes it possible to produce:
- a metallic layer formed from an element chosen for example from gold, silver, copper, platinum, iridium, titanium, vanadium, niobium, tantalum, chromium, etc.
- SUBSTITUTE SHEET (RULE 26) - or a metallic layer comprising a metallic element in the presence of a reactive gas (oxygen, and/or nitrogen and/or hydrogen), such as for example granular aluminium (Al + O2), or aluminium nitrides, or titanium or niobium or silicon hydrides;
- a reactive gas oxygen, and/or nitrogen and/or hydrogen
- Niobium-silicon alloy or Yttrium-silicon, or Nickel - Chromium
- a tunnel junction consisting of two metal deposits separated by an insulating barrier, for example a Josephson junction in AI-AIO X -AI, or in Nb-AI-AIO x -AI-Nb;
- an insulating or semiconducting layer such as Si, or Si-O, or Si-H, or Ge; in this case a simultaneous measurement of the capacitance and resistance of the layer can be used.
- the invention also relates to a method of etching a layer produced in the deposition window of a substrate or a deposition chip according to the invention, comprising a step of etching this layer, and of measuring at least one electrical quantity at the terminals of at least 2 measuring electrodes.
- Such a process makes it possible, for example, to etch an oxide layer on a layer of material, for example to be able to reestablish electrical contact.
- Etching is carried out, for example, by ion beam or reactive plasma.
- the measurement of at least one electrical quantity can be carried out using a micro-connector, for example a micro-USB connector.
- the deposition or etching of the layer can be stopped when said electrical quantity reaches a target value.
- the conditions thereof for example pressure and/or temperature
- the conditions thereof can be adjusted based on the results of the measurement carried out in real time by the invention.
- the invention also relates to the production of a film or a thin layer, while simultaneously carrying out a deposition on a chip according to the invention and/or according to a method according to the invention.
- the invention therefore makes it possible to replicate, for the chip and/or the method according to the invention, the conditions implemented
- SUBSTITUTE SHEET (RULE 26) for the deposit of interest, which is carried out in parallel, and thus to control the evolution of the latter, in particular from the point of view of the conductivity of the deposited film.
- the layer deposited in a method according to the invention or on a chip according to the invention has, for example, a thickness of between 1 nm and 200 nm.
- - Figures 1A-1B represent steps in carrying out a method according to the invention
- - Figure IC represents a deposit obtained by a method according to the invention
- - Figure 1E represents a deposit made on a chip obtained by the process variant according to the invention.
- Figures 2A - 2C represent a deposition substrate (Figure 2A), produced in accordance with the invention, a deposited film (Figure 2B), and an enlargement thereof (Figure 2C);
- FIG. 3 represents a plurality of chips according to the invention produced on a “wafer”
- FIG. 4A is a view of an individual chip made in accordance with the invention.
- FIG. 4B is a view of an example of use of the device according to the invention, comprising the chip inserted into a micro USB connector and connected to a measuring instrument, placed next to 3 other samples of interest, on which the thin-layer film is deposited simultaneously;
- FIG. 5A - 5D represent various measurements carried out using in particular a device according to the invention (figures 5A, B, D).
- Electrodes 2 (figure IA, which is a view in a YZ plane), for example in Ti/Au, are produced on a substrate 4, for example in silicon covered with a layer of SiO2 (for example 500 nm thick). At least 2 of these electrodes are produced, but preferably (for reasons of precision) a higher number are produced, for example 4 electrodes.
- each of these electrodes has edges 2i, 22 (figure 1A), forming gentle lateral slopes, with an angle a: this angle is measured in the plane (yOz), at the edge of the electrodes, between the lower face of the electrode 2 (interface with the substrate 4) and its upper face (interface with the air), for example between 15° and 50°.
- the thickness of each electrode gradually decreases from the top thereof to the surface of the substrate 4. To achieve this inclination, it is possible to carry out evaporation under angle with a variable angle, or a fixed angle and a planetary rotation.
- This inclination makes it possible, in particular for very thin films 20, for example with a thickness of less than 50 nm or 60 nm, to subsequently produce a continuous deposit 20 (see FIG. IC), both on the surface of the substrate 4 and of the electrodes 2, to form, from the first nanometers deposited, an electrical continuity between all the electrodes 2, thus allowing in-situ measurement.
- This inclination is particularly important for very thin films 20, for example with a thickness of less than 50 nm or 60 nm, or as a general rule with a thickness of less than approximately 2 times the thickness of the electrodes 2, specifically if these are not deposited by ALD (“Atomic Layer Deposition”) technique.
- these electrodes 2 have for example a thickness of a few tens of nm, for example still between 10 nm and 50 nm, for example.
- SUBSTITUTE SHEET (RULE 26) example still around 40 nm, more generally of thickness less than 100 nm or
- the ends of these electrodes opposite the deposition window form contact pads 2c for connection to power supply and/or measurement means (see FIGS. 2A).
- a resin mask 6 is deposited in order to define a deposition window 8.
- This mask has notches 10 in the part close to the substrate and the zone 8 in which the deposition will be carried out.
- the notches 10 are protected from deposition by an overhang 61 of the resin mask 6.
- the deposition of material will be interrupted at the notches 10 and the measured film will have a geometry defined by the window 8; the material deposited on the mask 6 will not be electrically connected to the material deposited on the substrate; such lateral deposits would interfere with and distort the measurement of the resistance.
- Figure IC represents a deposit 20 made on the chip of figure IB, in a sectional view along the YOZ plane (figure IB). It will be noted that the sectional view of figure IC is independent of the variant (with or without protective resistance).
- a region 8 is defined for a future deposition, above the electrodes 2 and on the surface of the substrate 4, between the edges of the resin mask 6. It is this deposit whose resistance will be measured, for example during an evaporation process, and using the electrodes 2.
- the geometry of this deposit is thus defined precisely, in particular thanks to the notches 10, which allows a very good measurement of the resistivity of the evaporated film.
- a particularly advantageous embodiment is that of a deposition region
- SUBSTITUTE SHEET (RULE 26) which extends along an X axis, perpendicular to the Y direction along which the electrodes 2 extend in the measurement region.
- Window 8 can be positioned above all the measuring electrodes to allow a deposited film to cover them all on one part and electrically connect them together through a track of well-defined geometry.
- one or more resistors 12 called protection resistors are produced, preferably with a high value, for example greater than 1 MOhm, possibly less than 100 MOhms.
- This resistor is for example made of Cr. Its thickness can be of the order of a few nm, for example between 4 nm and 10 nm, or even greater (for example up to 100 nm).
- This resistor is deposited on the electrodes 2, across and above the latter, and it will be electrically connected in parallel with a deposited film.
- Figure 1E shows a deposit 20 made on the chip of Figure 1D, in a sectional view along the same plane XOZ as Figure 1D.
- the deposit 20 has a geometry defined by the shape of the mask 8.
- a deposition chip 40 has thus been formed.
- This chip comprises the substrate 4, the electrodes 2, optionally the resistor(s) 12, and the deposition window 8, delimited by the mask 6.
- the mask 6 has dimensions of 3.5 mm x 7 mm x 350 pm, allowing it to be inserted into a female micro USB type connector, the internal dimensions of which are approximately 3.6 mm wide, 3.6 mm long and 3.6 mm wide.
- a deposition can be made on this chip, for example by electron gun evaporation, or by sputtering, or by co-evaporation or by co-sputtering or chemical vapor deposition.
- the surface of the substrate 4 may be subjected to a process in order to reduce its roughness, for example in order to obtain a roughness RA of between 0.01 nm and 1 nm.
- This step contributes to good continuity of the thin films, such as the film 20, which have a nanometric thickness, for example of between 5 nm and 50 nm, and which will be produced on the chip.
- This roughness control ensures the continuity of the film between the measuring electrodes and thus allows a current to flow there, from the first atomic layers. It is indeed very difficult to produce (in particular by evaporation or sputtering) a very thin film (for example with a thickness between 1 nm and 50 nm), which is electrically continuous, if the substrate is not atomically flat.
- Figure 2A shows a chip 40 according to the invention, ready to receive a deposit in the window 8.
- the section along the plane I corresponds to figures 1A and 1C (respectively before and after deposition of the film 20), the section along the plane II corresponds to figure 1E (after deposition of the film 20), the section along the plane III corresponds to figures 1B and 1D (before deposition of the film 20).
- the outermost electrodes 2 can be connected, by the contact pads 2c, to a current source 14 and a voltage can be measured with a voltage measuring device 16 connected to the other two electrodes; alternatively, one of the two electrodes located on the same side of the deposition support (relative to the middle of the support in the y direction) can be connected to a positive terminal of a current source, the other electrode on the same side to the positive terminal of a voltmeter.
- SUBSTITUTE SHEET (RULE 26) electrodes located on the other side of the support will be connected to the negative terminal of the current source and the voltmeter; alternatively, for a measurement using only two electrodes, the contact pads 2c can be connected to a voltage source and a current can be measured with a device such as an ammeter. If a protective resistor 12 has been made as explained above in connection with FIGS. IC and 1D, it can be used to test the presence and positioning of the chip in a measurement device, even before the sample is deposited.
- the ends 2e 2c of the electrodes 2 to be connected to a current source 14 and to the voltage measurement device 16 are wider to facilitate the contacts.
- the invention therefore makes it possible to produce a deposition and measurement chip 40, which comprises electrodes 2 which will make it possible to measure the thin layer of interest deposited subsequently; thus, a very precise value of the conductivity (or for example of the resistance) of this thin layer is obtained.
- Figures 2B and 2C represent successive enlargements of a deposition chip 40 (or chip) according to the invention, on which the deposition zone 8 and the mask 6 or parts thereof are recognized, in particular in Figure 2C where the notch 10 is visible.
- the region between electrodes 2 and mask 6 in deposition window 8 designates the portion of the film whose resistance is measured during evaporation. As seen in Figure 2B, in this example, a wire with an aspect ratio of 5 squares is deposited.
- Such chips are preferably made collectively.
- a plurality of individual chips 40 (up to several dozen, for example about 50) can be made on a wafer 32 with a diameter of for example 2 inches.
- Each chip is preferably single-use.
- the substrate 32 thus produced comprising a plurality of chips 40, may be protected by a protective layer 30 (FIG. 3), for example a layer of adhesive of the type used in a clean room, preferably on both sides; FIG. 3 does not show the layer 30 on the top surface to allow the individual chips 40 to be seen.
- a protective layer 30 for example a layer of adhesive of the type used in a clean room, preferably on both sides; FIG. 3 does not show the layer 30 on the top surface to allow the individual chips 40 to be seen.
- This substrate can then be cut, for example with a diamond saw, into single-use chips 40.
- a chip is visible in FIG. 4A. It is thus possible to obtain up to several dozen, for example approximately 50, of such individual chips on a “wafer” 32, for example 2 inches.
- the footprint of each chip is preferably the dimensions of a micro-USB connector 42, as understood in FIG. 4B and the dimensions which have already been indicated above. This very reduced size makes it possible to mechanically fix the measurement support, including the chip, the connector and its cable, as close as possible to the sample to be deposited, avoiding problems of shading and spatial inhomogeneity.
- USB offers excellent compactness for a system that combines the functions of holding and electrical connection.
- Such a connector and its wires can be integrated into a housing without disturbing the deposit.
- the user removes the possible protective layer 30 from one of the chips, and slides it into the connector (as in figure 4B). In less than a minute the device is installed and ready to measure. The user can check that the chip is correctly inserted thanks to the protective resistor 12, if present.
- the measurement can be carried out simply for example using an RLC bridge (not shown in the figures), which can be of commercial type, easily interfaced on the deposition equipment, to stop the deposition when a resistance setpoint is reached.
- RLC bridge not shown in the figures
- a silicon substrate 4 was given above, but a substrate of another material having a crystalline structure, for example quartz or
- SUBSTITUTE SHEET (RULE 26) sapphire.
- the nucleation of thin films on a crystalline substrate, as well as the resistivity of the thin films obtained, depends on the lattice parameters of the substrate and those of the deposited material; a crystalline substrate with a lattice parameter adapted to the deposition to be carried out is therefore chosen. Choosing the same substrate for the deposition and for the in-situ measurement allows the result to be reproduced most faithfully.
- a protective resistor 12 is produced, for example in Cr.
- This resistor makes it possible, on the one hand, to limit the current in the layer being grown and thus to avoid heating (and annealing) of this layer, linked to its electrical measurement and, on the other hand, to ensure the presence and proper functioning of the measurement substrate before the start of deposition.
- it being connected in parallel with the layer that will be deposited, it imposes an upper limit on the measurable value of the resistance of the deposited film, typically of the same order of magnitude as the resistor 12. It will be possible to use a substrate without a protective resistor 12 in cases where it is desired to measure very high surface resistance values, and if necessary to use more precise measurement equipment, with integrated current limitation and/or amplifier.
- Figures 5A - 5D represent different measurements of different characteristics, carried out in particular using a deposition support according to the invention, during evaporation of an aluminum layer at a speed of 1 nm/s, under a partial oxygen pressure of 2.10 -5 mbar on a Si / SiOz substrate:
- FIG. 5A shows the resistance measurement, performed with a LCR819 type bridge and divided by the number of squares (here 5, see for example Figure 2B), thus providing the resistance per square Rc of the deposited layer as a function of time t.
- the first points of the acquisition (before 3.5s) are beyond the measurement range of the device, and/or before the film is electrically continuous;
- FIG. 5B represents the deposited thickness e, measured with a quartz balance, as a function of time; it can be seen that a deposit according to the invention can be produced for a thickness of between a few nm, for example between 5 nm and 30 nm or 40 nm;
- FIG. 5C represents the resistance per square Rc as a function of the deposited thickness e (two quantities recorded simultaneously during deposition). The electrical measurement is
- SUBSTITUTE SHEET (RULE 26) possible from a thickness of 3.5nm.
- the first measured point corresponds to a resistance of 20MQ, at the upper limit of the measurement range of the device used for this experiment.
- FIG. 5D represents the resistivity of the film as a function of its thickness e, this resistivity being calculated as the product of Rc and t.
- the film deposition is stopped when the target value of 260 Q of the resistance per square is obtained, target value represented by the curve 44 in broken lines in Figures 5A, 5C and 5D.
- a chip according to the invention can be connected, for example by a connector as mentioned in this description, to a measuring device itself interfaced on a computer or microcomputer which makes it possible to collect and/or process and/or store measured data, in particular conductivity data (therefore including capacitance and/or inductance data) or resistance and/or thickness data and possibly to display them on visualization means such as a screen.
- a measuring device itself interfaced on a computer or microcomputer which makes it possible to collect and/or process and/or store measured data, in particular conductivity data (therefore including capacitance and/or inductance data) or resistance and/or thickness data and possibly to display them on visualization means such as a screen.
- conductivity data therefore including capacitance and/or inductance data
- resistance and/or thickness data possibly to display them on visualization means such as a screen.
- the thickness that can be deposited is mainly limited by the height of the notches 10 (as illustrated in FIG. 1B).
- the accuracy of the final characteristics of the device will depend on the resistivity of the layers and the accuracy of the measuring device. For example, if a LOL2000 type resin 6 is used in which the notches 10 can be up to 200 nm high, a deposit of a thickness of approximately 200 nm will be limited to not making electrical contact on the edges of the mask.
- films with a thickness in the entire range of thicknesses commonly used in quantum circuit applications can be deposited.
- SUBSTITUTE SHEET (RULE 26) Care is taken, depending on the materials constituting the elements present on the chip, not to heat above a limit temperature so as not to deform these elements. For example, for Au electrodes, as well as for the S1813 resin used for mask 6, it is preferable not to heat the measurement box above a limit temperature, here around 150°C.
- the invention makes it possible, for example, to control in situ the manufacture of a film, by carrying out, simultaneously with the deposition of this film, a deposition on a chip according to the invention and/or according to a method according to the invention.
- the invention makes it possible to replicate, for the chip and/or the method according to the invention, the conditions implemented for the deposition of interest, which is carried out in parallel, simultaneously, and thus to control the evolution of the latter, in particular from the point of view of the conductivity of the deposited film.
- one or more steps of depositing one or more films (or samples) that one wishes to manufacture can be carried out and, in parallel, a measurement can be carried out using a chip and/or a method according to the invention.
- a method of manufacturing a sample can comprise numerous steps of depositing films, and at each of them, this deposition is capable of being controlled independently using a chip or a method according to the invention.
- the deposit is homogeneous and will be the same for the deposit measured using a chip and/or a method according to the invention and for the sample being manufactured.
- Production of a 2nd deposit (more generally of order n+1), for example on the 1st deposit (more generally on the deposit of order n), of the sample to be produced and, simultaneously, on the chip and/or according to a method according to the invention.
- SUBSTITUTE SHEET (RULE 26) The invention therefore applies to the production of an nth deposit, of the sample to be produced and, simultaneously, on the chip and/or according to a method according to the invention.
- the invention allows for example to control in situ the manufacture of Josephson junctions for quantum circuits, by measuring in real time the surface oxidation rate of an aluminum film already deposited and by stopping the oxidation on a resistance setpoint.
- Another application is the control of the reproducibility of the surface resistance of granular aluminum films (Aluminum evaporated in the presence of oxygen at a partial pressure of some 10 -6 mbar). This can be done either by stopping the evaporation on a resistance setpoint measured in real time, or by comparing the resistance curve as a function of the thickness to a reference curve, and by adjusting in real time the oxygen flow or the aluminum evaporation rate to follow this reference curve.
- the invention has been described above in the case of a deposit.
- Another application of the invention is the monitoring of the resistance of a layer during etching, for example by an ion beam or a reactive plasma.
- the invention makes it possible, for example, to stop the etching when the surface oxide layer is eliminated or, more generally, when the desired conduction properties are achieved; the etched layer is formed by a method according to the invention, i.e. by controlling its resistance during its formation. This allows, for example, good contact recovery on a layer previously manufactured and having undergone lithography steps, aging and/or air oxidation.
- the chip preferably has the same manufacturing history as the sample of interest.
- One field of application of the invention concerns quantum circuits integrating superconductors, Josephson junctions, or more generally thin films (deposited for example by electron gun), of which we wish to control the surface resistance, the capacitance value, or the inductance value with a precision better than 1%, than 0.1% or than 0.01%.
- SUBSTITUTE SHEET (RULE 26)
- the invention can also be applied to any type of thin film deposition (for example by sputtering, or by chemical vapor deposition) for which such precision is required.
- deposition methods are compatible with a resistance measurement and with the introduction into the deposition machine of cables and connectors allowing a measurement according to the invention.
- FIG. 6A represents the evolution of a measured resistance (curve le) as a function of time, divided by the number of squares (there are 5 in this example) of the deposition window.
- Curve Ile represents the evolution of the thickness, measured simultaneously with a quartz balance.
- Figure 6B shows the evolution of this same resistance as a function of thickness, particularly in the last decade of the resistance scale (corresponding to a thickness substantially between 3 nm and 15 nm).
- the deposition is stopped at a resistance value of 57 Q, which corresponds to a thickness of 15 nm.
- SUBSTITUTE SHEET (RULE 26) increases (the 5 M ⁇ shunt resistance no longer plays a role, since the resistance of the film is very low compared to that of the shunt).
- the initial evolution of the curve, in the form of staircase steps, is attributed to a change in the measuring range of the device and to an instrumental limitation that can be overcome with better quality equipment.
- FIG. 7A and 7B Another example (figures 7A and 7B) concerns an application to the monitoring of the evolution of a chromium layer under oxidation (after deposition) and to the efficiency of an encapsulation layer.
- Figure 7A shows the evolution of the square resistance, as a function of time, of a thin 15 nm thick chromium layer, uncoated and when exposed to air, just after deposition.
- the resistance evolves slowly as a function of time (only the first 120 seconds after opening the deposition chamber are shown here) and continues to evolve over the following days and months.
- Figure 7B shows the evolution of the square resistance, as a function of time, of a thin 10 nm chromium layer, covered with 20 nm of Al I2O3 when exposed to air, just after deposition. The oxidation of the film is stopped thanks to the layer which covers it.
- Figures 8A - 8C concerns an application to the in situ monitoring of the etching of a 30 nm thick, non-oxidized evaporated aluminum layer during etching with an argon beam.
- Figure 8A shows the evaporation step (curve Is: evolution of the resistance as a function of time, curve Ils: evolution of the thickness), Figure 8B the etching step, and Figure 8C the evolution over time of the calculated thickness Ise and of the etching rate or speed ls v , also calculated.
- In situ measurement allows to characterize the rate or speed of etching in a given device.
- An etching step can be used for example to ensure a good
- SUBSTITUTE SHEET (RULE 26) contact between 2 metals, during a manufacturing step, or to remove a protective layer, or to finely adjust the resistance of a deposited layer.
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- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Engineering & Computer Science (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Measurement Of Resistance Or Impedance (AREA)
Abstract
Description
Claims
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202480039998.8A CN121311617A (zh) | 2023-06-16 | 2024-06-14 | 用于在沉积期间测量薄膜的电阻和电容的方法 |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR2306180A FR3150039A1 (fr) | 2023-06-16 | 2023-06-16 | Procede de mesure de la resistance et de la capacitance de films minces en cours de depot domaine technique et état de la technique antérieure |
| FRFR2306180 | 2023-06-16 |
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| WO2024256788A1 true WO2024256788A1 (fr) | 2024-12-19 |
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| PCT/FR2024/050784 Pending WO2024256788A1 (fr) | 2023-06-16 | 2024-06-14 | Procede de mesure de la resistance et de la capacitance de films minces en cours de depot |
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| Country | Link |
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| CN (1) | CN121311617A (fr) |
| FR (1) | FR3150039A1 (fr) |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6820028B2 (en) * | 2002-11-04 | 2004-11-16 | Brion Technologies, Inc. | Method and apparatus for monitoring integrated circuit fabrication |
| US9121754B2 (en) * | 2011-07-28 | 2015-09-01 | Sensanna Incorporated | Surface acoustic wave monitor for deposition and analysis of ultra-thin films |
| US10763420B2 (en) * | 2016-06-13 | 2020-09-01 | Intel Corporation | Josephson Junction damascene fabrication |
| US10990017B2 (en) * | 2016-12-30 | 2021-04-27 | Google Llc | Compensating deposition non-uniformities in circuit elements |
| US20210287949A1 (en) * | 2020-03-10 | 2021-09-16 | Northwestern University | In Situ Monitoring of Field-Effect Transistors During Atomic Layer Deposition |
| US20230187284A1 (en) * | 2021-12-15 | 2023-06-15 | International Business Machines Corporation | In-situ feedback for localized compensation |
-
2023
- 2023-06-16 FR FR2306180A patent/FR3150039A1/fr active Pending
-
2024
- 2024-06-14 CN CN202480039998.8A patent/CN121311617A/zh active Pending
- 2024-06-14 WO PCT/FR2024/050784 patent/WO2024256788A1/fr active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6820028B2 (en) * | 2002-11-04 | 2004-11-16 | Brion Technologies, Inc. | Method and apparatus for monitoring integrated circuit fabrication |
| US9121754B2 (en) * | 2011-07-28 | 2015-09-01 | Sensanna Incorporated | Surface acoustic wave monitor for deposition and analysis of ultra-thin films |
| US10763420B2 (en) * | 2016-06-13 | 2020-09-01 | Intel Corporation | Josephson Junction damascene fabrication |
| US10990017B2 (en) * | 2016-12-30 | 2021-04-27 | Google Llc | Compensating deposition non-uniformities in circuit elements |
| US20210287949A1 (en) * | 2020-03-10 | 2021-09-16 | Northwestern University | In Situ Monitoring of Field-Effect Transistors During Atomic Layer Deposition |
| US20230187284A1 (en) * | 2021-12-15 | 2023-06-15 | International Business Machines Corporation | In-situ feedback for localized compensation |
Non-Patent Citations (1)
| Title |
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| GRÜNHAUPT LUKAS ET AL: "Granular aluminium as a superconducting material for high-impedance quantum circuits", NATURE MATERIALS, NATURE PUBLISHING GROUP UK, LONDON, vol. 18, no. 8, 29 April 2019 (2019-04-29), pages 816 - 819, XP036840718, ISSN: 1476-1122, [retrieved on 20190429], DOI: 10.1038/S41563-019-0350-3 * |
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| FR3150039A1 (fr) | 2024-12-20 |
| CN121311617A (zh) | 2026-01-09 |
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