WO2024259835A1 - 数据传输方法及装置、芯片、电子设备和存储介质 - Google Patents

数据传输方法及装置、芯片、电子设备和存储介质 Download PDF

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Publication number
WO2024259835A1
WO2024259835A1 PCT/CN2023/125405 CN2023125405W WO2024259835A1 WO 2024259835 A1 WO2024259835 A1 WO 2024259835A1 CN 2023125405 W CN2023125405 W CN 2023125405W WO 2024259835 A1 WO2024259835 A1 WO 2024259835A1
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Prior art keywords
data
check code
display data
display
transmission
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PCT/CN2023/125405
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English (en)
French (fr)
Inventor
林致颖
陈彦勋
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Chipone Technology Beijing Co Ltd
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Chipone Technology Beijing Co Ltd
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Priority to KR1020257004947A priority Critical patent/KR20250038730A/ko
Priority to EP23942102.7A priority patent/EP4734500A1/en
Publication of WO2024259835A1 publication Critical patent/WO2024259835A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/24—Systems for the transmission of television signals using pulse code modulation
    • H04N7/52—Systems for transmission of a pulse code modulated video signal with one or more other pulse code modulated signals, e.g. an audio signal or a synchronizing signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/76—Television signal recording
    • H04N5/765—Interface circuits between an apparatus for recording and another apparatus
    • H04N5/775—Interface circuits between an apparatus for recording and another apparatus between a recording apparatus and a television receiver

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a data transmission method and device, a chip, an electronic device and a storage medium.
  • the blanking time of DE signal is necessary.
  • the gate in panel also called gate circuit, which is integrated on the display panel
  • touch detection also need to occupy the blanking time.
  • LVDS sends an empty signal, which will waste the transmission bandwidth.
  • abnormal interference when abnormal interference occurs, it may cause transmission bit errors. If data is lost, it will cause display abnormality.
  • the traditional method is to transmit one data at a time through a transmission line, and use an error correction code (ECC) to check the correctness of the data. If the check is correct, the next data is transmitted. Otherwise, the correct data is required to be retransmitted. After the check is correct, the next data is transmitted.
  • ECC error correction code
  • the present disclosure provides a data transmission method and device, a chip, an electronic device and a storage medium, which can correct data while identifying erroneous data, improve the data transmission rate, ensure the accuracy and reliability of display data transmission, and thus improve the performance of the display system.
  • the present disclosure provides a data transmission method, wherein a display unit reads display data for screen display under the control of a strobe signal, wherein the data transmission method comprises:
  • the transmission data is the display data or the check code, and after the check code is determined, the display data is checked and corrected using the check code.
  • the step before the step of transmitting the display data in the first time period of the strobe signal and transmitting the check code in the second time period of the strobe signal, the step includes:
  • the check code is generated according to the display data, and the check code is encoded into the header and/or the tail of the display data.
  • the selection signal is a continuous periodic pulse signal in the first time period, and the selection signal is a continuous low-level signal in the second time period.
  • the step of determining whether the transmission data is the display data or the check code according to the time period of the strobe signal includes:
  • the transmission data is determined to be the inspection code; when the horizontal synchronization signal is detected and the first period of the strobe signal is detected, the transmission data is determined to be the display data.
  • the check code is generated in a manner selected from any one of ECC, CRC and checksum.
  • the step of generating the check code according to the display data during data encoding further includes:
  • the step of determining whether the transmission data is the display data or the check code according to the time period of the strobe signal further includes:
  • the transmission data is determined to be the inspection code; when the horizontal synchronization signal is detected and the first period of the strobe signal is detected, the transmission data is determined to be the display data.
  • the step of using the check code to check and correct the display data includes:
  • the check code is used to check the display data transmitted subsequently. If there is an error, the check code is used to perform a corresponding algorithm correction on the erroneous data bit, and the erroneous data is recorded and stored.
  • the present disclosure further provides a data transmission device, the data transmission device is connected to a display unit, the display unit reads display data for screen display under the control of a strobe signal, wherein the data transmission device comprises:
  • a transmission module used for transmitting the display data in a first period of the strobe signal, and transmitting a check code in a second period of the strobe signal, wherein the check code is used for performing an error correction check on the display data and correcting the detected erroneous data bits;
  • the correction module is connected to the transmission module and is used to determine whether the transmission data is the display data or the check code according to the time period of the selection signal, and after determining the check code, use the check code to check and correct the display data.
  • the data transmission device further includes:
  • the calculation module is used to generate the check code according to the display data in the data encoding stage, and encode the check code into the header and/or tail of the display data.
  • the present disclosure further provides a display chip, which includes: the data transmission device as mentioned above.
  • the present disclosure further provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, wherein the processor implements the steps of the data transmission method as described above when executing the computer program.
  • the present disclosure further provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program implements the steps of the data transmission method as described above when executed by a processor.
  • the data transmission method includes: transmitting display data in the first time period of the strobe signal, and transmitting the check code in the second time period of the strobe signal; judging whether the transmission data is the aforementioned display data or the aforementioned check code according to the time period of the strobe signal, and after determining that it is the check code, using the check code to check and correct the display data.
  • the data transmission method includes: transmitting display data in the first time period of the strobe signal, and transmitting the check code in the second time period of the strobe signal; judging whether the transmission data is the aforementioned display data or the aforementioned check code according to the time period of the strobe signal, and after determining that it is the check code, using the check code to check and correct the display data.
  • the check code generated based on the display data to be transmitted is included in the transmission data (LVDS signal, the same below), and the blanking interval (i.e., the second time period) of the strobe signal during LVDS signal transmission is used to transmit the check code, and then the check code is used to check and correct the display data transmitted in the first time period of the strobe signal to eliminate the influence of abnormal interference during the transmission process.
  • the transmission data LVDS signal, the same below
  • the blanking interval i.e., the second time period
  • the check code is used to check and correct the display data transmitted in the first time period of the strobe signal to eliminate the influence of abnormal interference during the transmission process. In this way, data correction can be performed while identifying erroneous data, thereby improving the data transmission rate, ensuring the accuracy and reliability of display data transmission, and thus improving the display effect.
  • FIG1 shows a conventional timing signal diagram of display data during transmission
  • FIG2 is a schematic diagram showing a flow chart of a data transmission method provided by an embodiment of the present disclosure
  • FIG3 is a schematic diagram showing a model of the data transmission method shown in FIG2 in a specific implementation mode
  • FIG4 is a schematic diagram showing the transmission of conventional display data within the effective time of a strobe signal
  • FIG5 is a timing diagram showing the data transmission method shown in FIG2 in an application scenario
  • FIG. 6a and FIG. 6b respectively show the effect diagrams of the prior art and the technical solution of the present application in data transmission with noise interference
  • FIG7 is a schematic diagram of a data transmission device provided by an embodiment of the present disclosure.
  • FIG8 is a schematic diagram showing the structure of an electronic device provided by an embodiment of the present disclosure.
  • LVDS Low Voltage Differential Signaling
  • LVDS Low Voltage Differential Signaling
  • LVDS technology can support high-speed data transmission and is most suitable for communication structure applications such as base stations, switches, add/subtract multiplexers, consumer product applications such as set-top boxes and home/enterprise video links, and medical ultrasonic imaging equipment and digital copiers, ensuring that system partition operations can be more flexible.
  • System design engineers can use LVDS technology to set analog and digital signal processing sections on different circuit boards, and then use cables or bottom boards to transmit the digital data output by the A/D converter to ensure that the structural design can be more flexible.
  • all kinds of high-speed AD converters basically choose to use LVDS signals as the output format of sampled data, and their output forms are mostly parallel output.
  • the role of the line synchronization signal (HS or Hsync) is to select the effective line signal interval on the liquid crystal panel
  • the role of the field synchronization signal (VS or Vsync) is to select the effective field signal interval on the liquid crystal panel.
  • the joint role of the line and field synchronization signals can select the effective video signal interval on the liquid crystal panel.
  • the signals included mainly include RGB data signals, pixel clock signals DCLK, line synchronization signals Hsync, field synchronization signals Vsync and effective display data selection signals DE (hereinafter referred to as selection signals).
  • All liquid crystal panels need to input RGB data and pixel clock DCLK, but the way they use synchronization signals is different.
  • the existing technology recorded in the present disclosure and the embodiments provided by the corresponding technical problems to be solved are applied to liquid crystal panels that use DE/Hsync/Vsync synchronization signals at the same time.
  • Such liquid crystal panels need to input selection signals DE, line synchronization signals Hsync, and field synchronization signals Vsync at the same time to work normally.
  • LVDS signal As mentioned above, traditional display data (i.e., LVDS signal, the same below) is transmitted during the continuous pulse interval of the selection signal (i.e., the second period), and no data is transmitted during the blanking interval (i.e., the first period), as shown in Figures 1 and 4.
  • the display data itself has no inspection mechanism. If it is disturbed during the transmission process, the picture quality will be affected.
  • a data transmission method in an embodiment of the present disclosure is proposed, which is to use this part of the transmission bandwidth in the blanking interval to transmit a check code generated based on the display data, and use the check code to identify erroneous data in the display data transmission and correct the data at the same time, thereby improving the data transmission rate and the utilization rate of the data transmission bandwidth, while ensuring the accuracy of data transmission, thereby improving the display effect.
  • FIG2 is a flow chart of a data transmission method provided in an embodiment of the present disclosure
  • FIG3 is a model chart of the data transmission method shown in FIG2 in a specific implementation manner
  • FIG5 is a timing chart of the data transmission method shown in FIG2 in an application scenario.
  • the embodiment of the present disclosure provides a data transmission method, which is applied to a liquid crystal panel that uses DE/Hsync/Vsync synchronization signals at the same time.
  • This liquid crystal panel needs to input a selection signal DE, a line synchronization signal Hsync, and a field synchronization signal Vsync at the same time to work normally.
  • the display unit reads the display data under the control of the selection signal DE to display the picture.
  • the data transmission method includes:
  • S110 transmitting the display data in a first period of the strobe signal, and transmitting a check code in a second period of the strobe signal.
  • S120 determining whether the transmission data is the display data or the check code according to the time period of the strobe signal, and after determining the check code, checking and correcting the display data using the check code.
  • the check code is used to perform error correction check on the display data and correct the detected erroneous data bits.
  • the check code is generated in a manner selected from any one of ECC, CRC and checksum.
  • the data transmission method includes:
  • the check code is generated according to the display data, and the check code is encoded into the header and/or tail of the display data.
  • the check data (check code) generated by encoding is encoded into the header and tail of the display data (RGB[23:0]).
  • the check code can be independently encoded into the header or tail of the display data. In this way, the specific implementation of other steps can be flexibly adjusted. If the check code is only encoded into the header of the display data, the check code is received first and then the display data is received, and the check code can be used to check and correct the display data during the transmission process after the check code is determined.
  • the selection signal DE is a continuous periodic pulse signal in the first period, and the selection signal DE is a continuous low level signal in the second period, as shown in FIG. 5 .
  • the step of determining whether the transmission data is the display data or the check code according to the time period of the strobe signal in step S120 includes:
  • the transmission data Data[23:0] is determined to be the check code; when the horizontal synchronization signal Hsync is detected and the first period of the selection signal DE is detected, the transmission data Data[23:0] is determined to be the display data RGB[23:0].
  • the step of generating the check code according to the display data during data encoding further includes:
  • a data block header Head is generated based on the encoding of the transmitted display data RGB[23:0], and the data block header Head sequentially concatenates the check code and the display data RGB[23:0] as the transmission data Data[23:0].
  • a part of the check data (check code) is incorporated into the head of the display data RGB[23:0], and the other part is incorporated into the tail of the display data RGB[23:0].
  • the detection, judgment and error correction of the display data RGB[23:0] will be more beneficial, avoiding the identification error when the transmission data is too long, further improving the accuracy of the display data transmission, and also improving the efficiency of the transmission data.
  • the step of determining whether the transmission data is the display data or the check code according to the time period of the strobe signal further includes:
  • the transmission data Data[23:0] is determined to be the display data RGB[23:0], and the normal transmission data is not subjected to additional processing;
  • the transmission data Data[23:0] is determined to be the check code
  • the check code is used to check and correct the subsequently transmitted display data RGB[23:0].
  • the data block header mentioned above can be a specific character
  • the preset conditions mentioned above include bits, bytes and any combination of data associated with the transmission data of the current sequence, which are used to compare the judgment of the data transmission channel from "no data" to "data", thereby avoiding the system's misjudgment of noise.
  • the way to determine whether the preset conditions are met is to confirm whether the information in the data block header is consistent through comparison. If it is consistent, it means that the preset conditions are met, and if it is inconsistent, it means that the preset conditions are not met, and the corresponding steps mentioned above are executed.
  • the step of using the check code to check and correct the display data may include:
  • the check code is used to check the display data RGB[23:0] transmitted subsequently. If there is an error, the check code is used to perform a corresponding algorithm correction on the erroneous data bit, and the error information is recorded and stored.
  • the error information is, for example, the position of the erroneous data, the number of times the data at the position is wrong, the field address of the currently transmitted data, etc.
  • the data transmission method provided by the present embodiment does not need to change the existing hardware routing of data transmission under the LVDS technology, and the underlying transmission mode of the existing LVDS technology is also unchanged. Only the encoding of the transmission data is changed, and the check code generated based on the display data to be transmitted is included in the transmission data (LVDS signal, the same below).
  • the check code is transmitted during the blanking interval (i.e., the second period) of the selection signal DE during the LVDS signal transmission, and the display data transmitted in the first period of the selection signal DE is checked and corrected by the check code to eliminate the influence caused by abnormal interference during the transmission process, thereby ensuring the accuracy of the transmission data.
  • the effect is shown in Figure 6a and Figure 6b.
  • the former is the display effect caused by the noise interference without the transmission of the check code, which causes the display data to be wrong
  • the latter is the display effect after the check code is included and the display data is corrected. In this way, the data can be corrected while the erroneous data is identified, the data transmission rate is improved, the accuracy and reliability of the display data transmission are ensured, and the display effect is improved.
  • FIG. 7 shows a schematic diagram of a data transmission device provided by an embodiment of the present disclosure.
  • an embodiment of the present disclosure further provides a data transmission device 100, which is connected to a display unit (not shown).
  • the display unit reads display data for screen display under the control of a selection signal DE.
  • the data transmission device 100 includes: a transmission module 110, a correction module 120 and a calculation module 130.
  • the transmission module 110 is used to transmit the display data in the first period of the strobe signal DE, and to transmit the check code in the second period of the strobe signal DE, wherein the check code is used to perform error correction check on the display data and correct the detected erroneous data bits;
  • the correction module 120 is connected to the transmission module 110, and is used to determine whether the transmission data is the display data or the check code according to the time period of the selection signal DE, and after determining the check code, use the check code to check and correct the display data;
  • the calculation module 130 is used to generate the check code according to the display data in the data encoding stage, and encode the check code into the header and/or the tail of the display data.
  • the embodiment of the present disclosure further provides a display chip, which includes the data transmission device 100 as described above.
  • the display chip is connected to a display unit, and the display unit reads display data to display a picture under the control of a selection signal DE.
  • the data transmission method in the embodiment of the present disclosure described in conjunction with FIG. 2 may be implemented by an electronic device.
  • the processor 210 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits or modules of the embodiments of the present application.
  • CPU central processing unit
  • ASIC application specific integrated circuit
  • the memory 220 may include a large capacity memory for data or instructions.
  • the memory 220 may include a hard disk drive (HDD), a floppy disk drive, a solid state drive (SSD), a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive or a combination of two or more of these.
  • the memory 220 may include a removable or non-removable (or fixed) medium.
  • the memory 220 may be inside or outside the data processing device.
  • the memory 220 is a non-volatile memory.
  • the memory 220 includes a read-only memory (ROM) and a random access memory (RAM).
  • the ROM may be a mask-programmed ROM, a programmable ROM (Programmable Read-Only Memory, PROM for short), an erasable PROM (Erasable Programmable Read-Only Memory, EPROM for short), an electrically erasable PROM (Electrically Erasable Programmable Read-Only Memory, EEPROM for short), an electrically alterable ROM (Electrically Alterable Read-Only Memory, EAROM for short) or a flash memory (FLASH) or a combination of two or more of these.
  • the RAM can be a static random access memory (SRAM) or a dynamic random access memory (DRAM), wherein the DRAM can be a fast page mode dynamic random access memory (FPMDRAM), an extended data output dynamic random access memory (EDODRAM), a synchronous dynamic random access memory (SDRAM), etc.
  • SRAM static random access memory
  • DRAM dynamic random access memory
  • FPMDRAM fast page mode dynamic random access memory
  • EDODRAM extended data output dynamic random access memory
  • SDRAM synchronous dynamic random access memory
  • the electronic device 200 can execute the data transmission method described in FIG. 2 in the embodiment of the present application based on the acquired instructions.
  • the embodiment of the present application may provide a computer-readable storage medium for implementation.
  • the computer-readable storage medium stores computer program instructions; when the computer program instructions are executed by the processor, any one of the data transmission methods in the above embodiment is implemented.
  • a person of ordinary skill in the art can understand that all or part of the processes in the above embodiment method can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium.
  • the computer program When the computer program is executed, it may include the processes of the embodiments of the above methods.
  • any reference to memory, storage, database or other media used in the embodiments provided in the present application may include non-volatile and/or volatile memory.
  • Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory.
  • Volatile memory may include random access memory (RAM) or external cache memory.
  • RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

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Abstract

本公开提供了一种数据传输方法及装置、芯片、电子设备和存储介质，其中，该数据传输方法包括：在选通信号的第一时段内传输显示数据，以及在选通信号的第二时段内传输检查码；依据选通信号的所处时段，来判断传输数据为前述的显示数据或前述的检查码，以及在确定为检查码后，利用该检查码对显示数据进行检查校正。通过利用LVDS信号传输时选通信号的消隐区间（即第二时段）传输检查码，再利用检查码对选通信号第一时段内传输的显示数据进行检查校正，来消除传输过程中的异常干扰带来的影响，由此可以在识别出错误数据的同时进行数据的修正，提高了数据传输速率，保证了显示数据传输的准确性和可靠性，进而改善了显示效果。

Description

数据传输方法及装置、芯片、电子设备和存储介质
本申请要求了申请日为2023年06月20日、申请号为2023107310915、名称为“数据传输方法及装置、芯片、电子设备和存储介质”的中国发明申请的优先权，并且通过参照上述中国发明申请的全部说明书、权利要求、附图和摘要的方式，将其引用于本申请。
技术领域
本公开涉及显示技术领域，具体涉及一种数据传输方法及装置、芯片、电子设备和存储介质。
 背景技术
通常，前端系统(Host)和显示模块之间进行信息传输时，通过将文字、数字、符号等信息转换为二进制数据进行数据传输。传统的低电压差分信号(Low Voltage Differential Signal，LVDS)传输中，数据（Data）会在有效显示数据选通信号DE的选通时间内有效输入，而在其消隐时间（blanking time）内无任何Data输入，如图1所示。data本身并没有检查机制，若在传输过程中受到噪音等的干扰，画面质量便会受到影响。
在影像传输过程中，DE信号的消隐时间是必须有的，除了考虑IC本身处理讯号所需预留的时间，像屏内栅极(Gate in Panel，GIP，也叫栅极电路，其集成于显示面板上)及触摸(touch)侦测，都需占用到消隐时间，此时LVDS是送空讯号，会浪费掉传输带宽。并且，当异常干扰发生时，此时有可能造成传输位元错误，若丢失数据，将造成显示异常。
要克服这个不足，传统的方法是通过一条传输线，每次传送一个数据，采用纠错码(Error Correcting Code，ECC)的方式对数据的正确性进行检查，若检查无误，再传送下一个数据，否则，要求重新传送正确的数据，待检查无误后，再传送下一数据，这种方式每次只传送一个数据，且无法在识别出错误数据的同时进行数据的修正，导致数据传输速度慢，不能满足计算机系统对其数据传输速率越来越高的需求。
 发明内容
为了解决上述技术问题，本公开提供了一种数据传输方法及装置、芯片、电子设备和存储介质，可以在识别出错误数据的同时进行数据的修正，提高数据传输速率，保证显示数据传输的准确性和可靠性，进而改善显示系统的性能。
一方面本公开提供了一种数据传输方法，显示单元在选通信号的控制下读取显示数据进行画面显示，其中，所述数据传输方法包括：
在所述选通信号的第一时段内传输所述显示数据，以及在所述选通信号的第二时段内传输检查码，所述检查码用于对所述显示数据进行纠错检查，并对检查出的错误数据位进行校正；
依据所述选通信号的所处时段，来判断传输数据为所述显示数据或所述检查码，以及在确定所述检查码后，利用所述检查码对所述显示数据进行检查校正。
可选地，在所述选通信号的第一时段内传输所述显示数据，以及在所述选通信号的第二时段传输检查码的步骤前包括：
数据编码阶段，根据所述显示数据生成所述检查码，并将所述检查码编入所述显示数据的头部和/或尾部。
可选地，所述选通信号在所述第一时段内为连续的周期脉冲信号，以及所述选通信号在所述第二时段内为连续的低电平信号。
可选地，所述依据所述选通信号的所处时段，来判断传输数据为所述显示数据或所述检查码的步骤中包括：
当侦测到行同步信号且没有侦测到所述选通信号的第二时段时，判定传输数据为所述检查码，当侦测到所述行同步信号且侦测到所述选通信号的第一时段时，判定传输数据为所述显示数据。
可选地，所述检查码的生成方式为选自ECC、CRC和校验和中的任意一种。
可选地，所述数据编码时根据所述显示数据生成所述检查码的步骤中还包括：
基于传输的所述显示数据编码生成数据块头，所述数据块头依次拼接所述检查码和所述显示数据作为传输数据，
并且，所述依据所述选通信号的所处时段，来判断传输数据为所述显示数据或所述检查码的步骤中还包括：
确定所述传输数据中的数据块头是否符合预设条件，并在确定符合所述预设条件后将当前传输数据的数据块头作为起始位置；
当侦测到所述行同步信号且没有侦测到所述选通信号的第一时段时，判定传输数据为所述检查码，当侦测到行同步信号且侦测到所述选通信号的第一时段时，判定传输数据为所述显示数据。
可选地，所述在确定所述检查码后，利用所述检查码对所述显示数据进行检查校正的步骤中包括：
利用所述检查码对后续传输的所述显示数据进行检查，若有错误，利用所述检查码对错误数据位进行相应的算法校正，以及对错误数据进行记录存储。
另一方面本公开还提供了一种数据传输装置，所述数据传输装置与显示单元连接，所述显示单元在选通信号的控制下读取显示数据进行画面显示，其中，所述数据传输装置包括：
传输模块，用于在所述选通信号的第一时段内传输所述显示数据，以及在所述选通信号的第二时段传输检查码，所述检查码用于对所述显示数据进行纠错检查，并对检查出的错误数据位进行校正；
校正模块，与所述传输模块连接，用于依据所述选通信号的所处时段，来判断传输数据为所述显示数据或所述检查码，以及在确定所述检查码后，利用所述检查码对所述显示数据进行检查校正。
可选地，所述数据传输装置还包括：
计算模块，用于在数据编码阶段根据所述显示数据生成所述检查码，并将所述检查码编入所述显示数据的头部和/或尾部。
另一方面本公开还提供了一种显示芯片，其中，包括：如前所述的数据传输装置。
另一方面本公开还提供了一种电子设备，包括存储器和处理器，所述存储器存储有计算机程序，其中，所述处理器执行所述计算机程序时实现如前所述的数据传输方法的步骤。
另一方面本公开还提供了一种计算机可读存储介质，其上存储有计算机程序，其中，所述计算机程序被处理器执行时实现如前所述的数据传输方法的步骤。
本公开的有益效果是：根据本公开提供的数据传输方法及装置、芯片、电子设备和存储介质，其中，该数据传输方法包括：在选通信号的第一时段内传输显示数据，以及在选通信号的第二时段内传输检查码；依据选通信号的所处时段，来判断传输数据为前述的显示数据或前述的检查码，以及在确定为检查码后，利用该检查码对显示数据进行检查校正。使用该方法，不用改动LVDS技术下数据传输的硬件走线，且LVDS技术的底层传输模式也未变，只更改传输数据的编码，将基于待传输的显示数据生成的检查码编入传输数据（LVDS信号，下同）中即可，利用LVDS信号传输时的选通信号的消隐区间（即第二时段）传输该检查码，再利用检查码对选通信号第一时段内传输的显示数据进行检查校正，来消除传输过程中的异常干扰带来的影响。以此可以在识别出错误数据的同时进行数据的修正，提高了数据传输速率，保证了显示数据传输的准确性和可靠性，进而改善了显示效果。
 附图说明
通过以下参照附图对本公开实施例的描述，本公开的上述以及其他目的、特征和优点将更为清楚。
图1示出传统的显示数据在传输时的时序信号图；
图2示出本公开实施例提供的数据传输方法的流程示意图；
图3示出图2所示数据传输方法在一具体实施方式中模型示意图；
图4示出传统的显示数据在选通信号的有效时间内的传输示意图；
图5示出图2所示数据传输方法在一应用场景中的时序示意图；
图6a和图6b分别示出在有噪声干扰的数据传输中现有技术和本申请技术方案的实施效果图；
图7示出本公开实施例提供的数据传输装置的示意图；
图8示出本公开实施例提供的电子设备的结构示意图。
 具体实施方式
为了便于理解本公开，下面将参照相关附图对本公开进行更全面的描述。附图中给出了本公开的较佳实施例。但是，本公开可以通过不同的形式来实现，并不限于本文所描述的实施例。相反的，提供这些实施例的目的是使对本公开内容的理解更加透彻全面。
除非另有定义，本文所使用的所有的技术和科学术语与属于本公开的技术领域的技术人员通常理解的含义相同。在本公开的说明书中所使用的术语只是为了描述具体的实施例的目的，不是旨在于限制本公开。
可知的，LVDS（Low Voltage Differential Signaling）是一种低振幅差分信号技术。它使用幅度非常低的信号（约350mV）通过一对差分PCB走线或平衡电缆传输数据。它能以高达数千Mbps的速度传送串行数据。由于电压信号幅度较低，而且采用恒流源模式驱动，故只产生极低的噪声，消耗非常小的功率，甚至不论频率高低功耗都几乎不变。此外，由于LVDS以差分方式传送数据，所以不易受共模噪音影响。
在民用方面的应用，LVDS技术技术可支持高速数据传送，最适用于基站、交换器、加/减多路转换器等通信结构应用方案，机顶盒和家庭/企业视频链路等消费产品应用方案以及医疗用超声波影像设备与数字影印机等，确保系统分区操作可以发挥更大的灵活性。系统设计工程师可以利用LVDS技术将模拟及数字信号处理区段设于不同的电路板，然后利用电缆或底板传送A/D转换器输出的数字数据，以确保结构设计可以发挥更大的灵活性。目前，各类高速AD转换器基本上都选择使用LVDS信号作为采样数据的输出格式，其输出形式多为并行输出。
在液晶显示领域，行同步信号（HS或Hsync）的作用是选择出液晶面板上有效行信号区间，场同步信号（VS或Vsync）的作用是选择出液晶面板上有效场信号区间，行场同步信号的共同作用，可将选择出液晶面板上的有效视频信号区间。在液晶面板的TTL和LVDS接口中，包括的信号主要有RGB数据信号、像素时钟信号DCLK、行同步信号Hsync、场同步信号Vsync及有效显示数据选通信号DE(以下简称为选通信号)。所有液晶面板都需要输入RGB数据和像素时钟DCLK，但其使用同步信号的方式却不同，本公开文本记载的现有技术和对应解决的技术问题所提供的各实施例是应用在同时使用DE／Hsync／Vsync同步信号的液晶面板中的，这种液晶面板需要同时输入选通信号DE、行同步信号Hsync、场同步信号Vsync才能正常工作。
如前文所述，传统的显示数据（即LVDS信号，下同）传输是在选通信号的连续脉冲区间（即第二时段）内，消隐区间（即第一时段）内是无任何资料传输的，如图1和图4所示，而显示数据本身并没有检查机制，若在传输过程中受到干扰，画面质量便会受到影响。
基于此，提出了本公开实施例中的数据传输方法，就是利用消隐区间的这部分传输带宽传输基于显示数据生成的检查码，并利用检查码在显示数据传输中识别出错误数据的同时进行数据的修正，提高数据传输速率和数据传输带宽的利用率，同时保证数据传输的准确性，进而提高显示效果。
下面，参照附图对本公开进行详细说明。
图2示出本公开实施例提供的数据传输方法的流程示意图，图3示出图2所示数据传输方法在一具体实施方式中模型示意图，图5示出图2所示数据传输方法在一应用场景中的时序示意图。
本公开实施例提供了一种数据传输方法，该数据传输方法是应用在同时使用DE／Hsync／Vsync同步信号的液晶面板中的，这种液晶面板需要同时输入选通信号DE、行同步信号Hsync、场同步信号Vsync才能正常工作。前端系统(Host)传输LVDS信号给显示单元后，显示单元在选通信号DE的控制下读取显示数据进行画面显示的，参考图2，所述数据传输方法包括：
S110：在所述选通信号的第一时段内传输所述显示数据，以及在所述选通信号的第二时段传输检查码。
S120：依据所述选通信号的所处时段，来判断传输数据为所述显示数据或所述检查码，以及在确定所述检查码后，利用所述检查码对所述显示数据进行检查校正。
在一些实施例中，所述检查码是用于对所述显示数据进行纠错检查，并对检查出的错误数据位进行校正。
在一些实施例中，所述检查码的生成方式为选自ECC、CRC和校验和中的任意一种。
在步骤S110所述选通信号的第一时段内传输所述显示数据，以及在所述选通信号的第二时段传输检查码的步骤前，所述数据传输方法包括：
数据编码阶段，根据所述显示数据生成所述检查码，并将所述检查码编入所述显示数据的头部和/或尾部。在本实施例中，如图5所示，编码生成的检查数据（检查码）是编入到显示数据（RGB[23:0]）的头部以及尾部，当然在其他可替代的实施例中，可将检查码独立编入到显示数据的头部或者尾部也是可以的，这样对应在其他步骤的具体实施上，可灵活调整，如若检查码只编入到显示数据的头部，则是先接受检查码再接收显示数据，并可在确定检查码后的传输过程中利用该检查码对显示数据进行检查校正，这样不仅提高传输效率，还能保证传输的显示数据的准确性，如若检查码只编入到显示数据的尾部，则是先接受显示数据再接收检查码，并可在确定检查码后的对完成接收的显示数据进行检查校正，其他实施方案可类比进行操作，在此不做详述。
在一些实施例中，所述选通信号DE在所述第一时段内为连续的周期脉冲信号，以及所述选通信号DE在所述第二时段内为连续的低电平信号，如图5所示。
在一些实施例中，步骤S120中所述依据所述选通信号的所处时段，来判断传输数据为所述显示数据或所述检查码的步骤包括：
当侦测到所述行同步信号Hsync且没有侦测到所述选通信号DE的第一时段，即所述选通信号DE处于第二时段内时，判定传输数据Data[23:0]为所述检查码，当侦测到行同步信号Hsync且侦测到所述选通信号DE的第一时段时，判定传输数据Data[23:0]为所述显示数据RGB[23:0]。
在一些实施例中，所述数据编码时根据所述显示数据生成所述检查码的步骤中还包括：
基于传输的所述显示数据RGB[23:0]编码生成数据块头Head，所述数据块头Head依次拼接所述检查码和所述显示数据RGB[23:0]作为传输数据Data[23:0]。在本实施例中，检查数据（检查码）一部分编入到显示数据RGB[23:0]的头部，另一部分编入到了显示数据RGB[23:0]的尾部，这样针对显示数据RGB[23:0]的侦测判断和纠错校正会更为有利，避免传输数据过长时的甄别错误，进一步提高了显示数据传输的准确性，也提高了传输数据的效率。
在图3所示的应用模型中，所述依据所述选通信号的所处时段，来判断传输数据为所述显示数据或所述检查码的步骤中还包括：
确定所述传输数据Data[23:0]中的数据块头Head是否符合预设条件，并在确定符合预设条件后将当前传输数据Data[23:0]的数据块头Head作为起始位置；否则正常传输数据不对其进行附加处理；
当侦测到行同步信号Hsync且侦测到所述选通信号DE的第一时段时，判定传输数据Data[23:0]为所述显示数据RGB[23:0]，正常传输数据不对其进行附加处理；
当侦测到所述行同步信号Hsync且没有侦测到所述选通信号DE的第一时段时，判定传输数据Data[23:0]为所述检查码；
确定传输数据Data[23:0]为检查码后，利用检查码对后续传输的显示数据RGB[23:0]进行检查校正。
在本实施例中，上述中的数据块头可以为特定字符，上述的预设条件包括关联当前序列的传输数据的位（bit）、字节（byte)及任意数据的组合，用以比对数据传输通道从“无数据”到“有数据”的判断，由此可避免系统对噪声的误判断。确定符合预设条件的方式是通过比对确认数据块头中信息是否一致，一致时表示符合预设条件，不一致时表示不符合预设条件，执行上述的相应步骤。
在一些实施例中，所述在确定所述检查码后，利用所述检查码对所述显示数据进行检查校正的步骤中可以包括：
利用所述检查码对后续传输的所述显示数据RGB[23:0]进行检查，若有错误，利用所述检查码对错误数据位进行相应的算法校正，以及对错误信息进行记录存储，该错误信息例如为错误数据的位置、该位置数据错误的次数、当前传输数据的字段地址等等。
综上，使用本实施例提供的数据传输方法，不用改动LVDS技术下数据传输的现有硬件走线，且现有的LVDS技术的底层传输模式也未变，只更改传输数据的编码，将基于待传输的显示数据生成的检查码编入传输数据（LVDS信号，下同）中即可，利用LVDS信号传输时的选通信号DE的消隐区间（即第二时段）传输该检查码，再利用检查码对选通信号DE第一时段内传输的显示数据进行检查校正，来消除传输过程中的异常干扰带来的影响，保证了传输数据的准确性，其效果如图6a和图6b所示，前者为未传输检查码的噪声干扰导致显示数据出错造成的显示效果，后者为带有检查码并对显示数据进行校正后的显示效果。由此可以在识别出错误数据的同时进行数据的修正，提高了数据传输速率，保证了显示数据传输的准确性和可靠性，进而改善了显示效果。
图7示出本公开实施例提供的数据传输装置的示意图。
参考图7，另一方面本公开实施例还提供了一种数据传输装置100，所述数据传输装置100与显示单元（未示出）连接，所述显示单元在和选通信号DE的控制下读取显示数据进行画面显示的，结合图7和前述实施例进行理解，所述数据传输装置100包括：传输模块110、校正模块120和计算模块130。
其中，传输模块110用于在所述选通信号DE的第一时段内传输所述显示数据，以及在所述选通信号DE的第二时段传输检查码，所述检查码用于对所述显示数据进行纠错检查，并对检查出的错误数据位进行校正；
校正模块120与传输模块110连接，用于依据所述选通信号DE的所处时段，来判断传输数据为所述显示数据或所述检查码，以及在确定所述检查码后，利用所述检查码对所述显示数据进行检查校正；
计算模块130用于在数据编码阶段根据所述显示数据生成所述检查码，并将所述检查码编入所述显示数据的头部和/或尾部。
另一方面本公开实施例还提供了一种显示芯片，其中，包括如前所述的数据传输装置100，显示芯片连接显示单元，显示单元在选通信号DE的控制下读取显示数据进行画面显示。
另外，结合图2描述的本公开实施例中数据传输方法，可以由电子设备来实现。
图8为本公开实施例提供的电子设备的结构示意图。
另一方面本公开实施例提供的电子设备200可以包括处理器210以及存储有计算机程序指令的存储器220。
具体地，上述处理器210可以包括中央处理器(CPU)，或者特定集成电路(Application Specific Integrated Circuit，简称为ASIC)，或者可以被配置成实施本申请实施例的一个或多个集成电路或模块。
其中，存储器220可以包括用于数据或指令的大容量存储器。举例来说而非限制，存储器220可包括硬盘驱动器(Hard Disk Drive，简称为HDD)、软盘驱动器、固态驱动器(Solid State Drive，简称为SSD)、闪存、光盘、磁光盘、磁带或通用串行总线(Universal Serial Bus，简称为USB)驱动器或者两个或更多个以上这些的组合。在合适的情况下，存储器220可包括可移除或不可移除(或固定)的介质。在合适的情况下，存储器220可在数据处理装置的内部或外部。在特定实施例中，存储器220是非易失性(Non-Volatile)存储器。在特定实施例中，存储器220包括只读存储器(Read-Only Memory，简称为ROM)和随机存取存储器(Random Access Memory，简称为RAM)。在合适的情况下，该ROM可以是掩模编程的ROM、可编程ROM(Programmable Read-Only Memory，简称为PROM)、可擦除PROM(Erasable Programmable Read-Only Memory，简称为EPROM)、电可擦除PROM(Electrically Erasable Programmable Read-Only Memory，简称为EEPROM)、电可改写ROM(Electrically Alterable Read-Only Memory，简称为EAROM)或闪存(FLASH)或者两个或更多个以上这些的组合。在合适的情况下，该RAM可以是静态随机存取存储器(Static Random-Access Memory，简称为SRAM)或动态随机存取存储器(Dynamic Random Access Memory，简称为DRAM)，其中，DRAM可以是快速页模式动态随机存取存储器(Fast Page Mode Dynamic Random Access Memory，简称为FPMDRAM)、扩展数据输出动态随机存取存储器(Extended Date Out Dynamic Random Access Memory，简称为EDODRAM)、同步动态随机存取内存(Synchronous Dynamic Random-Access Memory，简称SDRAM)等。
存储器220可以用来存储或者缓存需要处理和/或通信使用的各种数据文件，以及处理器210所执行的可能的计算机程序指令。
处理器210通过读取并执行存储器220中存储的计算机程序指令，以实现上述实施例中的任意一种数据传输方法。
在其中一些实施例中，电子设备200还可包括通信接口230和总线201。其中，如图8所示，处理器210、存储器220、通信接口230通过总线201连接并完成相互间的通信。
通信接口230用于实现本申请实施例中各模块、装置、单元和/或设备之间的通信。通信接口230还可以实现与其他部件例如：外接设备、图像/数据采集设备、数据库、外部存储以及图像/数据处理工作站等之间进行数据通信。
总线201包括硬件、软件或两者，将电子设备200的部件彼此耦接在一起。总线201包括但不限于以下至少之一：数据总线(Data Bus)、地址总线(Address Bus)、控制总线(Control Bus)、扩展总线(Expansion Bus)、局部总线(Local Bus)。举例来说而非限制，总线201可包括图形加速接口(Accelerated Graphics Port，简称为AGP)或其他图形总线、增强工业标准架构(Extended Industry Standard Architecture，简称为EISA)总线、前端总线(Front Side Bus，简称为FSB)、超传输(Hyper Transport，简称为HT)互连、工业标准架构(Industry Standard Architecture，简称为ISA)总线、无线带宽(InfiniBand)互连、低引脚数(Low Pin Count，简称为LPC)总线、存储器总线、微信道架构(Micro Channel Architecture，简称为MCA)总线、外围组件互连(Peripheral Component Interconnect，简称为PCI)总线、PCI-Express(PCI-X)总线、串行高级技术附件(Serial Advanced Technology Attachment，简称为SATA)总线、视频电子标准协会局部(Video Electronics Standards Association Local Bus，简称为VLB)总线或其他合适的总线或者两个或更多个以上这些的组合。在合适的情况下，总线201可包括一个或多个总线。尽管本申请实施例描述和示出了特定的总线，但本申请考虑任何合适的总线或互连。
该电子设备200可以基于获取到的指令，执行本申请实施例中图2描述的数据传输方法。
另外，结合上述实施例中的数据传输方法，本申请实施例可提供一种计算机可读存储介质来实现。该计算机可读存储介质上存储有计算机程序指令；该计算机程序指令被处理器执行时实现上述实施例中的任意一种数据传输方法。本领域普通技术人员可以理解实现上述实施例方法中的全部或部分流程，是可以通过计算机程序来指令相关的硬件来完成，所述的计算机程序可存储于一非易失性计算机可读取存储介质中，该计算机程序在执行时，可包括如上述各方法的实施例的流程。其中，本申请所提供的各实施例中所使用的对存储器、存储、数据库或其它介质的任何引用，均可包括非易失性和/或易失性存储器。非易失性存储器可包括只读存储器(ROM)、可编程ROM(PROM)、电可编程ROM(EPROM)、电可擦除可编程ROM(EEPROM)或闪存。易失性存储器可包括随机存取存储器(RAM)或者外部高速缓冲存储器。作为说明而非局限，RAM以多种形式可得，诸如静态RAM(SRAM)、动态RAM(DRAM)、同步DRAM(SDRAM)、双数据率SDRAM(DDRSDRAM)、增强型SDRAM(ESDRAM)、同步链路(Synchlink)DRAM(SLDRAM)、存储器总线(Rambus)直接RAM(RDRAM)、直接存储器总线动态RAM(DRDRAM)、以及存储器总线动态RAM(RDRAM)等。
应当说明的是，以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
此外，在本文中，所含术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、物品或者设备中还存在另外的相同要素。
最后应说明的是：显然，上述实施例仅仅是为清楚地说明本公开所作的举例，而并非对实施方式的限定。对于所属领域的普通技术人员来说，在上述说明的基础上还可以做出其它不同形式的变化或变动。这里无需也无法对所有的实施方式予以穷举。而由此所引申出的显而易见的变化或变动仍处于本公开的保护范围之中。

Claims (12)

  1. 一种数据传输方法，显示单元在选通信号的控制下读取显示数据进行画面显示，其中，所述数据传输方法包括：
    在所述选通信号的第一时段内传输所述显示数据，以及在所述选通信号的第二时段内传输检查码，所述检查码用于对所述显示数据进行纠错检查，并对检查出的错误数据位进行校正；
    依据所述选通信号的所处时段，来判断传输数据为所述显示数据或所述检查码，以及在确定所述检查码后，利用所述检查码对所述显示数据进行检查校正。
  2. 根据权利要求1所述的数据传输方法，其中，在所述选通信号的第一时段内传输所述显示数据，以及在所述选通信号的第二时段传输检查码的步骤前包括：
    数据编码阶段，根据所述显示数据生成所述检查码，并将所述检查码编入所述显示数据的头部和/或尾部。
  3. 根据权利要求2所述的数据传输方法，其中，所述选通信号在所述第一时段内为连续的周期脉冲信号，以及所述选通信号在所述第二时段内为连续的低电平信号。
  4. 根据权利要求3所述的数据传输方法，其中，所述依据所述选通信号的所处时段，来判断传输数据为所述显示数据或所述检查码的步骤中包括：
    当侦测到行同步信号且没有侦测到所述选通信号的第一时段时，判定传输数据为所述检查码，当侦测到所述行同步信号且侦测到所述选通信号的第一时段时，判定传输数据为所述显示数据。
  5. 根据权利要求1所述的数据传输方法，其中，所述检查码的生成方式为选自ECC、CRC和校验和中的任意一种。
  6. 根据权利要求4所述的数据传输方法，其中，所述数据编码时根据所述显示数据生成所述检查码的步骤中还包括：
    基于传输的所述显示数据编码生成数据块头，所述数据块头依次拼接所述检查码和所述显示数据作为传输数据，
    并且，所述依据所述选通信号的所处时段，来判断传输数据为所述显示数据或所述检查码的步骤中还包括：
    确定所述传输数据中的数据块头是否符合预设条件，并在确定符合所述预设条件后将当前传输数据的数据块头作为起始位置；
    当侦测到所述行同步信号且没有侦测到所述选通信号的第一时段时，判定传输数据为所述检查码，当侦测到行同步信号且侦测到所述选通信号的第一时段时，判定传输数据为所述显示数据。
  7. 根据权利要求6所述的数据传输方法，其中，所述在确定所述检查码后，利用所述检查码对所述显示数据进行检查校正的步骤中包括：
    利用所述检查码对后续传输的所述显示数据进行检查，若有错误，利用所述检查码对错误数据位进行相应的算法校正，以及对所述错误数据进行记录存储。
  8. 一种数据传输装置，所述数据传输装置与显示单元连接，所述显示单元在选通信号的控制下读取显示数据进行画面显示，其中，所述数据传输装置包括：
    传输模块，用于在所述选通信号的第一时段内传输所述显示数据，以及在所述选通信号的第二时段传输检查码，所述检查码用于对所述显示数据进行纠错检查，并对检查出的错误数据位进行校正；
    校正模块，与所述传输模块连接，用于依据所述选通信号的所处时段，来判断传输数据为所述显示数据或所述检查码，以及在确定所述检查码后，利用所述检查码对所述显示数据进行检查校正。
  9. 根据权利要求1所述的数据传输装置，其中，还包括：
    计算模块，用于在数据编码阶段根据所述显示数据生成所述检查码，并将所述检查码编入所述显示数据的头部和/或尾部。
  10. 一种显示芯片，其中，包括：如权利要求8或9中所述的数据传输装置。
  11. 一种电子设备，包括存储器和处理器，所述存储器存储有计算机程序，其中，所述处理器执行所述计算机程序时实现权利要求1至7中任一项所述数据传输方法的步骤。
  12. 一种计算机可读存储介质，其上存储有计算机程序，其中，所述计算机程序被处理器执行时实现权利要求1至7中任一项所述数据传输方法的步骤。
PCT/CN2023/125405 2023-06-20 2023-10-19 数据传输方法及装置、芯片、电子设备和存储介质 Ceased WO2024259835A1 (zh)

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