WO2025067792A1 - Méthodologie pour prédire un taux de défaillance d'une partie par billion - Google Patents

Méthodologie pour prédire un taux de défaillance d'une partie par billion Download PDF

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WO2025067792A1
WO2025067792A1 PCT/EP2024/073851 EP2024073851W WO2025067792A1 WO 2025067792 A1 WO2025067792 A1 WO 2025067792A1 EP 2024073851 W EP2024073851 W EP 2024073851W WO 2025067792 A1 WO2025067792 A1 WO 2025067792A1
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failure rate
features
grouped
feature
measured
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Fuming Wang
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ASML Netherlands BV
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ASML Netherlands BV
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70616—Monitoring the printed patterns
    • G03F7/7065—Defects, e.g. optical inspection of patterned layer for defects
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70491—Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
    • G03F7/705—Modelling or simulating from physical phenomena up to complete wafer processes or whole workflow in wafer productions
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70491—Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
    • G03F7/70516—Calibration of components of the microlithographic apparatus, e.g. light sources, addressable masks or detectors
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70616—Monitoring the printed patterns
    • G03F7/70625—Dimensions, e.g. line width, critical dimension [CD], profile, sidewall angle or edge roughness
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/706835—Metrology information management or control
    • G03F7/706837—Data analysis, e.g. filtering, weighting, flyer removal, fingerprints or root cause analysis
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/706835—Metrology information management or control
    • G03F7/706839—Modelling, e.g. modelling scattering or solving inverse problems

Definitions

  • the embodiments provided herein disclose a method of predicting a part per trillion failure rate, and more particularly, a method of improving failure rate prediction by grouping features on a sample to drastically increase a number of features on a device or sample available for metrology and inspection.
  • a lithographic apparatus is a machine that applies a desired pattern onto a target portion of a substrate.
  • the lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs).
  • ICs integrated circuits
  • An IC chip in a smart phone can be as small as a person’s thumbnail and may include over 2 billion transistors.
  • Making an IC is a complex and time-consuming process, with circuit components in different layers and including hundreds of individual steps. Errors in even one step may potentially result in problems with the final IC and may cause device failure. Therefore, in manufacturing processes of ICs, unfinished or finished circuit components are inspected to ensure that they are manufactured according to design and are free of defects.
  • Inspection systems utilizing optical microscopes or charged particle (e.g., electron) beam microscopes, such as a scanning electron microscope (SEM) can be employed.
  • SEM scanning electron microscope
  • the embodiments provided herein disclose a method of predicting a part per trillion failure rate, and more particularly, a method of improving failure rate prediction by grouping features on a sample to drastically increase a number of features on a device or sample available for metrology and inspection.
  • Some embodiments of the present disclosure provide a method for performing a massive metrology analysis.
  • the method comprises grouping a plurality of features, wherein the grouped features share a same or similar target size in at least one direction, measuring a size of a feature of the grouped features, measuring a failure rate of a feature from the grouped features using a multi-beam tool, correlating the measured sizes of the grouped features with the measured failure rates of the grouped features, and calibrating a computational model with the correlation to generate a process window for a range of failure rates up to three orders of magnitude below the measured failure rate.
  • a method for performing a massive metrology analysis comprises grouping a plurality of features on a sample, wherein the grouped features on the sample share a same or similar target size in at least one direction, measuring a size of a features of the grouped features, generating a distribution of measured sizes of the grouped features, measuring a failure rate of a feature of the grouped features, wherein the failure rate is at least one part per billion, correlating the generated distribution with the measured failure rate, calibrating a computational model with the correlation, and generating a process window from the calibrated computational model for a range of failure rates up to three orders of magnitude below the measured failure rate.
  • a non-transitory computer readable medium comprising a set of instructions that is executable by one or more processors of a computing device to cause the computing device to perform operations for performing a massive metrology analysis.
  • the operations comprise grouping a plurality of features wherein the grouped features share a same or similar target size in at least one direction, measuring a size of a feature of the grouped features, measuring a failure rate of a feature of the grouped features using a multi-beam tool, correlating the measured sizes of the grouped features with the measured failure rates of the grouped features, and calibrating a computational model with the correlation to generate a process window for a range of failure rates up to three orders of magnitude below the measured failure rate.
  • FIG. 1 is a schematic diagram illustrating an example lithographic projection assembly to fabricate an IC, consistent with embodiments of the present disclosure.
  • FIG. 2 is a schematic diagram illustrating an example electron beam inspection (EBI) system consistent with embodiments of the present disclosure.
  • EBI electron beam inspection
  • FIG. 3 is a schematic diagram of an example multi-beam tool , consistent with embodiments of the present disclosure.
  • FIG. 4 is an example flowchart of a conventional method to predict a failure rate for a fabricated device according to a lithographic fabrication condition and to generate a failure rate process window.
  • FIG. 5A is an example block diagram for generating input data.
  • FIG. 5B is an example focus-dose matrix illustrating a two-dimensional layout of lithographic conditions to fabricate an IC structure, consistent with embodiments of the present disclosure.
  • FIG. 6A is an example illustration of the computational model calculating a critical dimension limit based on a modeled critical dimension distribution and a measured failure rate.
  • FIG. 6B is an example failure rate process window that can be generated by conventional methods.
  • FIG. 7 is an example block diagram for generating input data, consistent with embodiments of the present disclosure.
  • FIG. 8A is an example illustration of grouping a plurality of features on a wafer having a same target size in at least one direction, consistent with embodiments of the present disclosure.
  • FIG.8B are example CD distributions modeled by a computational model for grouped features having a same or similar target size in at least one direction, consistent with embodiments of the present disclosure.
  • FIG. 8C is an example illustration of a variation in a measured metrology variation per number of measurements, consistent with embodiments of the present disclosure.
  • FIG. 9A is an example illustration of calculated a lower and upper CD limit value from a modeled CD distribution and a measured failure rate, consistent with embodiments of the present disclosure.
  • FIG. 9B is an example illustration of a calculated CD limit modeled as a function of a lithographic fabrication condition, consistent with embodiments of the present disclosure.
  • FIG. 10 is an example illustration of a generated failure rate process window by grouping a plurality of features with a same or similar target size in at least one direction, consistent with embodiments of the present disclosure.
  • FIG. 11 is an example workflow of acquiring input data and building a computational model to generate a failure rate process window capable of an accurate part-per-trillion failure rate prediction for a CDU wafer, consistent with embodiments of the present disclosure.
  • FIG. 12 is an example illustration comparing a total time required to generate an accurate part per trillion failure rate model using a conventional method compared to embodiments of the present disclosure.
  • FIG. 13 is an example block diagram illustrating a system for building a computational model to generate a failure rate process window capable of an accurate part-per-trillion failure rate prediction, consistent with embodiments of the present disclosure.
  • FIG 14 is an example flow diagram illustrating a method 1400 of building a calibrated computational model to predict a part per trillion failure rate, consistent with embodiments of the present disclosure.
  • the enhanced computing power of electronic devices while reducing the physical size of the devices, can be accomplished by significantly increasing the packing density of circuit components such as transistors, capacitors, diodes, etc. on an IC chip.
  • an IC chip of a smart phone which is the size of a thumbnail, may include over 2 billion transistors, the size of each transistor being less than l/1000th of a human hair.
  • semiconductor IC manufacturing is a complex and time-consuming process, with hundreds of individual steps. Errors in even one step have the potential to dramatically affect the functioning of the final product. Even one “killer defect” can cause device failure.
  • the goal of the manufacturing process is to improve the overall yield of the process.
  • each individual step must have a yield greater than 99.4%, and if the individual step yield is 95%, the overall process yield drops to 7%.
  • high process yield is desirable in an IC chip manufacturing facility
  • maintaining a high wafer throughput defined as the number of wafers processed per hour, is also essential.
  • High process yields and high wafer throughput can be impacted by the presence of defects, especially if operator intervention is required for reviewing the defects.
  • the number of transistors fabricated onto an IC chip is forecasted to grow from billions up to one trillion by 2030.
  • inspection tools such as a charged particle beam inspection tool
  • Inspection of a wafer using an electron beam inspection tool may generate images of the wafer to measure IC structure dimensions. The measured dimensions may be compared to a reference structure absent any defects to determine the presence of defects in the imaged structure.
  • inspection of ICs for defect detection is often a time-consuming process. It may be desirable to prevent defects from occurring during the fabrication stages instead of further refining IC inspection methods. Therefore, it is desired to improve the accuracy of IC failure rate predictive modeling during fabrication and generating more accurate process windows of fabrication conditions.
  • ICs may be manufactured using lithography, which is a fabrication process involving creating complex circuit patterns drawn on a mask deposited onto a substrate.
  • Lithography may be performed by a lithographic apparatus, which is a machine that applies a source of radiation (e.g., light or X-ray) onto a target portion of the substrate to form a desired pattern.
  • the target portion of the substrate may be covered with a pattern device (e.g., mask) that may be either eliminated or developed after exposure to the radiation source.
  • This process of transferring the desired pattern to the substrate is called a patterning process.
  • the patterning process may include a patterning step to transfer a pattern from a pattern device (e.g., a mask) to the substrate.
  • Variations in experimental parameters e.g., stochastic variations, errors, or noise due to an inspection tool or pattern processing tool
  • HVM high volume manufacturing
  • process yield of ICs and introduce defects into IC structures.
  • the substrate is provided with one or more sets of alignment marks.
  • Each mark is a structure whose position can be measured later using, for example, an electron beam inspection tool. Defects may occur in which an applied pattern structure or pattern layer is incorrectly placed in relation to a reference mark, or when the fabrication conditions are suboptimal.
  • a reference mark or layout define the desired structure, structure dimensions, and the distance between IC structures (such as gates, capacitors, etc.) or interconnect lines.
  • a critical dimension of a circuit can be defined as the smallest width of a line or hole or the smallest space between two lines or two holes. Thus, the critical dimension determines the overall size and packing density of the designed IC.
  • a goal in IC fabrication is to faithfully reproduce the original IC design on the substrate. If an error occurs during fabrication where the created IC design pattern does not match the reference design, this may result in a defect in the IC structure and render the IC inoperable.
  • a failure rate is related to a critical dimension of formed structures from various lithographic fabrication or patterning conditions (e.g., focus and dose, explained more below) that results in a patterning defect (e.g., a missing structure on an IC or a bridging structure on an IC) or an electrical defect (e.g., an open or short).
  • a patterning defect e.g., a missing structure on an IC or a bridging structure on an IC
  • an electrical defect e.g., an open or short.
  • Other defects may be structures on the IC that have dimensions markedly different from a reference structure.
  • Current methods rely on massive metrology using single-beam inspection tools to predict a failure rate of devices fabricated onto a wafer. However, current methods are limited to accurately predicting part per billion level failure rate predictions and are not capable of accurately predicting a failure rate at lower levels (e.g., part per trillion level).
  • devices fabricated on wafers may have limited repeated patterns or features.
  • a failure rate may be determined by measuring a same pattern or feature and calculating a ratio of instances where a failed pattern or feature appears. For example, if 1000 repeating patterns or features are measured (e.g., one measurement for each repeated pattern or feature), and one pattern or feature is determined to have failed (e.g., a defect), then the failure rate for the pattern or feature is 1/1000, 10 3 , or a part per thousand.
  • Current methods generally group patterns or features on a device with strict rules. For example, a repeated pattern is defined by a certain range around an entire feature, including neighboring features, to be repeated with an identical or rotated configuration throughout a sample.
  • Embodiments of the present disclosure provide a method to predict a part per trillion failure rate for a device according to lithographic fabrication condition. Some embodiments of the present disclosure may provide a method of extrapolating a part per trillion failure rate by correlating input metrology and failure rate data. In some embodiments, the input failure rate data is collected using a multi-beam inspection tool. In some embodiments, the input failure rate data is a measured part per billion failure rate. Some embodiments of the present disclosure may provide a method of building a computational model from correlated input metrology and failure rate data and to accurately predict down to a part per trillion failure rate from metrology data.
  • some embodiments of the present disclosure may increase throughput of IC manufacturing and confidence in predicting lithographic fabrication conditions to manufacture defect-free ICs. Some embodiments of the present disclosure may also provide a method to generate a process window indicating lithographic fabrication conditions necessary to minimize defects and achieve a part per trillion failure rate in IC fabrication.
  • a database can include A, B, or C, then, unless specifically stated otherwise or infeasible, the database can include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.
  • Lithographic projection apparatus 100 may include a emission source 101, which may be a charged-particle emission source, deep-ultraviolet excimer laser source or other type of source including an extreme ultraviolet (EUV) source, and emits a beam 108.
  • Illumination optics which may include illumination optics components 102 and 103 that shape radiation from the radiation source 101; a patterning device 104; and transmission optics 105 that project an image of the patterning device pattern onto a substrate 106.
  • Illumination optics components 102 and 103 may direct and shape beam 108 via patterning device 104 onto substrate 106 and may include any optical component that may alter the wavefront of beam 108.
  • a resist layer on substrate 106 may be exposed and a radiation intensity distribution at substrate 106 (i.e., an aerial image) may be transferred to the resist layer.
  • Optical properties of the lithographic projection apparatus e.g., properties of the source, the patterning device, and the projection optics dictate this process.
  • the resist layer may be removed and the applied pattern from beam 108 may then be applied to the substrate as discussed above.
  • the present disclosure may be applicable to other possible applications or designs.
  • the present disclosure may be applied to integrated optical systems, magnetic domain memories, liquid-crystal display panels, thin-film magnetic heads, and other nanoscale structures.
  • the terms “reticle”, “wafer”, or “die” may be used interchangeably with the terms “mask”, “substrate” or “sample”, and “target portion”, respectively.
  • FIG. 2 illustrates an example electron beam inspection (EBI) system 200 consistent with embodiments of the present disclosure.
  • EBI system 200 may be used for imaging.
  • EBI system 200 includes a main chamber 201, a load/lock chamber 202, a beam tool 204, and an equipment front end module (EFEM) 206.
  • Beam tool 204 is located within main chamber 201.
  • EFEM 206 includes a first loading port 206a and a second loading port 206b.
  • EFEM 206 may include additional loading port(s).
  • First loading port 206a and second loading port 206b receive wafer front opening unified pods (FOUPs) that contain wafers (e.g., semiconductor wafers or wafers made of other material(s)) or samples to be inspected (wafers and samples may be used interchangeably).
  • a “lot” is a plurality of wafers that may be loaded for wafer processing as a batch.
  • One or more robotic arms (not shown) in EFEM 206 may transport the wafers to load/lock chamber 202.
  • Load/lock chamber 202 is connected to a load/lock vacuum pump system (not shown) which removes gas molecules in load/lock chamber 202 to reach a first pressure below the atmospheric pressure. After reaching the first pressure, one or more robotic arms (not shown) may transport the wafer from load/lock chamber 202 to main chamber 201.
  • Main chamber 201 is connected to a main chamber vacuum pump system (not shown) which removes gas molecules in main chamber 201 to reach a second pressure below the first pressure. After reaching the second pressure, the wafer is subject to inspection by beam tool 204.
  • Beam tool 204 may be a single-beam system or a multi-beam system.
  • a controller 209 is electronically connected to beam tool 204. Controller 209 may be a computer configured to execute various controls of EBI system 200. While controller 209 is shown in FIG. 2 as being outside of the structure that includes main chamber 201, load/lock chamber 202, and EFEM 206, it is appreciated that controller 209 may be a part of the structure.
  • controller 209 may include one or more processors (not shown).
  • a processor may be a generic or specific electronic device capable of manipulating or processing information.
  • the processor may include any combination of any number of a central processing unit (or “CPU”), a graphics processing unit (or “GPU”), an optical processor, a programmable logic controller, a microcontroller, a microprocessor, a digital signal processor, an intellectual property (IP) core, a Programmable Logic Array (PLA), a Programmable Array Logic (PAL), a Generic Array Logic (GAL), a Complex Programmable Logic Device (CPLD), a Field- Programmable Gate Array (FPGA), a System On Chip (SoC), an Application-Specific Integrated Circuit (ASIC), and any type circuit capable of data processing.
  • the processor may also be a virtual processor that includes one or more processors distributed across multiple machines or devices coupled via a network.
  • controller 209 may further include one or more memories (not shown).
  • a memory may be a generic or specific electronic device capable of storing codes and data accessible by the processor (e.g., via a bus).
  • the memory may include any combination of any number of a random-access memory (RAM), a read-only memory (ROM), an optical disc, a magnetic disk, a hard drive, a solid-state drive, a flash drive, a security digital (SD) card, a memory stick, a compact flash (CF) card, or any type of storage device.
  • the codes and data may include an operating system (OS) and one or more application programs (or “apps”) for specific tasks.
  • the memory may also be a virtual memory that includes one or more memories distributed across multiple machines or devices coupled via a network.
  • FIG. 3 illustrates a schematic diagram of an example multi-beam tool 204 (also referred to herein as apparatus 204) and an image processing system 390 that may be configured for use in EBI system 200 (FIG. 2), consistent with embodiments of the present disclosure.
  • Beam tool 204 comprises a charged-particle source 302, a gun aperture 304, a condenser lens 306, a primary charged-particle beam 310 emitted from charged-particle source 302, a source conversion unit 312, a plurality of beamlets 314, 316, and 318 of primary charged-particle beam 310, a primary projection optical system 320, a motorized wafer stage 380, a wafer holder 382, multiple secondary charged-particle beams 336, 338, and 340, a secondary optical system 342, and a charged- particle detection device 344.
  • Primary projection optical system 320 can comprise a beam separator 322, a deflection scanning unit 326, and an objective lens 328.
  • Charged-particle detection device 344 can comprise detection sub-regions 346, 348, and 350.
  • Charged-particle source 302, gun aperture 304, condenser lens 306, source conversion unit 312, beam separator 322, deflection scanning unit 326, and objective lens 328 can be aligned with a primary optical axis 360 of apparatus 204.
  • Secondary optical system 342 and charged-particle detection device 344 can be aligned with a secondary optical axis 352 of apparatus 204.
  • Charged-particle source 302 can emit one or more charged particles, such as electrons, protons, ions, muons, or any other particle carrying electric charges.
  • charged-particle source 302 may be an electron source.
  • charged-particle source 302 may include a cathode, an extractor, or an anode, wherein primary electrons can be emitted from the cathode and extracted or accelerated to form primary charged-particle beam 310 (in this case, a primary electron beam) with a crossover (virtual or real) 308.
  • primary charged-particle beam 310 in this case, a primary electron beam
  • crossover virtual or real
  • Primary charged-particle beam 310 can be visualized as being emitted from crossover 308.
  • Gun aperture 304 can block off peripheral charged particles of primary charged-particle beam 310 to reduce Coulomb effect. The Coulomb effect may cause an increase in size of probe spots.
  • Source conversion unit 312 can comprise an array of image-forming elements and an array of beam-limit apertures.
  • the array of image-forming elements can comprise an array of micro-deflectors or micro-lenses.
  • the array of image-forming elements can form a plurality of parallel images (virtual or real) of crossover 308 with a plurality of beamlets 314, 316, and 318 of primary charged-particle beam 310.
  • the array of beam-limit apertures can limit the plurality of beamlets 314, 316, and 318. While three beamlets 314, 316, and 318 are shown in FIG. 3, embodiments of the present disclosure are not so limited.
  • the apparatus 204 may be configured to generate a first number of beamlets.
  • the first number of beamlets may be in a range from 1 to 1000.
  • the first number of beamlets may be in a range from 200-500.
  • the apparatus 204 may generate 400 beamlets.
  • Condenser lens 306 can focus primary charged-particle beam 310.
  • the electric currents of beamlets 314, 316, and 318 downstream of source conversion unit 312 can be varied by adjusting the focusing power of condenser lens 306 or by changing the radial sizes of the corresponding beam-limit apertures within the array of beam-limit apertures.
  • Objective lens 328 can focus beamlets 314, 316, and 318 onto a wafer 330 for imaging, and can form a plurality of probe spots 370, 372, and 374 on a surface of wafer 330.
  • Beam separator 322 can be a beam separator of Wien filter type generating an electrostatic dipole field and a magnetic dipole field. In some embodiments, if they are applied, the force exerted by the electrostatic dipole field on a charged particle (e.g., an electron) of beamlets 314, 316, and 318 can be substantially equal in magnitude and opposite in a direction to the force exerted on the charged particle by magnetic dipole field. Beamlets 314, 316, and 318 can, therefore, pass straight through beam separator 322 with zero deflection angle. However, the total dispersion of beamlets 314, 316, and 318 generated by beam separator 322 can also be non-zero. Beam separator 322 can separate secondary charged-particle beams 336, 338, and 340 from beamlets 314, 316, and 318 and direct secondary charged-particle beams 336, 338, and 340 towards secondary optical system 342.
  • a charged particle e.g., an electron
  • Deflection scanning unit 326 can deflect beamlets 314, 316, and 318 to scan probe spots 370, 372, and 374 over a surface area of wafer 330.
  • secondary charged-particle beams 336, 338, and 340 may be emitted from wafer 330.
  • Secondary charged-particle beams 336, 338, and 340 may comprise charged particles (e.g., electrons) with a distribution of energies.
  • secondary charged-particle beams 336, 338, and 340 may be secondary electron beams including secondary electrons (energies ⁇ 50 eV) and backscattered electrons (energies between 50 eV and landing energies of beamlets 314, 316, and 318).
  • Secondary optical system 342 can focus secondary charged-particle beams 336, 338, and 340 onto detection sub-regions 346, 348, and 350 of charged-particle detection device 344.
  • Detection sub-regions 346, 348, and 350 may be configured to detect corresponding secondary charged-particle beams 336, 338, and 340 and generate corresponding signals (e.g., voltage, current, or the like) used to reconstruct an SCPM image of structures on or underneath the surface area of wafer 330.
  • signals e.g., voltage, current, or the like
  • the generated signals may represent intensities of secondary charged-particle beams 336, 338, and 340 and may be provided to image processing system 390 that is in communication with charged- particle detection device 344, primary projection optical system 320, and motorized wafer stage 380.
  • the movement speed of motorized wafer stage 380 may be synchronized and coordinated with the beam deflections controlled by deflection scanning unit 326, such that the movement of the scan probe spots (e.g., scan probe spots 370, 372, and 374) may orderly cover regions of interests on the wafer 330.
  • the parameters of such synchronization and coordination may be adjusted to adapt to different materials of wafer 330. For example, different materials of wafer 330 may have different resistance-capacitance characteristics that may cause different signal sensitivities to the movement of the scan probe spots.
  • the intensity of secondary charged-particle beams 336, 338, and 340 may vary according to the external or internal structure of wafer 330, and thus may indicate whether wafer 330 includes defects. Moreover, as discussed above, beamlets 314, 316, and 318 may be projected onto different locations of the top surface of wafer 330, or different sides of local structures of wafer 330, to generate secondary charged-particle beams 336, 338, and 340 that may have different intensities. Therefore, by mapping the intensity of secondary charged-particle beams 336, 338, and 340 with the areas of wafer 330, image processing system 390 may reconstruct an image that reflects the characteristics of internal or external structures of wafer 330.
  • image processing system 390 may include an image acquirer 392, a storage 394, and a controller 396.
  • Image acquirer 392 may comprise one or more processors.
  • image acquirer 392 may comprise a computer, server, mainframe host, terminals, personal computer, any kind of mobile computing devices, or the like, or a combination thereof.
  • Image acquirer 392 may be communicatively coupled to charged-particle detection device 344 of beam tool 204 through a medium such as an electric conductor, optical fiber cable, portable storage media, IR, Bluetooth, internet, wireless network, wireless radio, or a combination thereof.
  • image acquirer 392 may receive a signal from charged-particle detection device 344 and may construct an image. Image acquirer 392 may thus acquire SCPM images of wafer 330. Image acquirer 392 may also perform various post-processing functions, such as generating contours, superimposing indicators on an acquired image, or the like. Image acquirer 392 may be configured to perform adjustments of brightness and contrast of acquired images.
  • storage 394 may be a storage medium such as a hard disk, flash drive, cloud storage, random access memory (RAM), other types of computer-readable memory, or the like. Storage 394 may be coupled with image acquirer 392 and may be used for saving scanned raw image data as original images, and post-processed images. Image acquirer 392 and storage 394 may be connected to controller 396. In some embodiments, image acquirer 392, storage 394, and controller 396 may be integrated together as one control unit.
  • image acquirer 392 may acquire one or more SCPM images of a wafer based on an imaging signal received from charged-particle detection device 344.
  • An imaging signal may correspond to a scanning operation for conducting charged particle imaging.
  • An acquired image may be a single image comprising a plurality of imaging areas.
  • the single image may be stored in storage 394.
  • the single image may be an original image that may be divided into a plurality of regions. Each of the regions may comprise one imaging area containing a feature of wafer 330.
  • the acquired images may comprise multiple images of a single imaging area of wafer 330 sampled multiple times over a time sequence.
  • the multiple images may be stored in storage 394.
  • image processing system 390 may be configured to perform image processing steps with the multiple images of the same location of wafer 330.
  • image processing system 390 may include measurement circuits (e.g., analog-to-digital converters) to obtain a distribution of the detected secondary charged particles (e.g., secondary electrons).
  • the charged-particle distribution data collected during a detection time window, in combination with corresponding scan path data of beamlets 314, 316, and 318 incident on the wafer surface, can be used to reconstruct images of the wafer structures under inspection.
  • the reconstructed images can be used to reveal various features of the internal or external structures of wafer 330, and thereby can be used to reveal any defects that may exist in the wafer.
  • the charged particles may be electrons.
  • the electrons of primary charged-particle beam 310 When electrons of primary charged-particle beam 310 are projected onto a surface of wafer 330 (e.g., probe spots 370, 372, and 374), the electrons of primary charged-particle beam 310 may penetrate the surface of wafer 330 for a certain depth, interacting with particles of wafer 330. Some electrons of primary charged-particle beam 310 may elastically interact with (e.g., in the form of elastic scattering or collision) the materials of wafer 330 and may be reflected or recoiled out of the surface of wafer 330.
  • An elastic interaction conserves the total kinetic energies of the bodies (e.g., electrons of primary charged-particle beam 310) of the interaction, in which the kinetic energy of the interacting bodies does not convert to other forms of energy (e.g., heat, electromagnetic energy, or the like).
  • Such reflected electrons generated from elastic interaction may be referred to as backscattered electrons (BSEs).
  • Some electrons of primary charged-particle beam 310 may inelastically interact with (e.g., in the form of inelastic scattering or collision) the materials of wafer 330.
  • An inelastic interaction does not conserve the total kinetic energies of the bodies of the interaction, in which some or all of the kinetic energy of the interacting bodies convert to other forms of energy.
  • the kinetic energy of some electrons of primary charged-particle beam 310 may cause electron excitation and transition of atoms of the materials. Such inelastic interaction may also generate electrons exiting the surface of wafer 330, which may be referred to as secondary electrons (SEs). Yield or emission rates of BSEs and SEs depend on, e.g., the material under inspection and the landing energy of the electrons of primary charged-particle beam 310 landing on the surface of the material, among others.
  • the energy of the electrons of primary charged-particle beam 310 may be imparted in part by its acceleration voltage (e.g., the acceleration voltage between the anode and cathode of charged-particle source 302 in FIG. 3).
  • the quantity of BSEs and SEs may be more or fewer (or even the same) than the injected electrons of primary charged-particle beam 310.
  • the images generated by SCPM may be used for defect inspection. For example, a generated image capturing a test device region of a wafer may be compared with a reference image capturing the same test device region.
  • the reference image may be predetermined (e.g., by simulation) and include no known defect. If a difference between the generated image and the reference image exceeds a tolerance level, a potential defect may be identified.
  • the SCPM may scan multiple regions of the wafer, each region including a test device region designed as the same, and generate multiple images capturing those test device regions as manufactured. The multiple images may be compared with each other. If a difference between the multiple images exceeds a tolerance level, a potential defect may be identified.
  • the present disclosure may be applicable to other possible applications or designs.
  • the present disclosure may be applied to integrated optical systems, magnetic domain memories, liquid-crystal display panels, thin-film magnetic heads, and other nanoscale structures.
  • the terms “die”, “structure”, and “IC structure” are used interchangeably in this disclosure.
  • Step 401 is an example flowchart of a conventional method to predict a failure rate for a fabricated device according to a lithographic fabrication condition using a computational model and to generate a process window for a range of lithographic fabrication conditions.
  • input data for the model is acquired.
  • Step 401 may involve generating one or more IC structures on a sample under a lithographic fabrication condition, inspecting the one or more IC structures using an inspection tool, measuring a critical dimension of the one or more formed IC structures, and measuring a failure rate of the one or more formed IC structures at the lithographic fabrication condition.
  • step 401 may be performed for a plurality of lithographic fabrication conditions, wherein one or more IC structures are formed according to a plurality of lithographic fabrication conditions and critical dimensions and failure rates are determined for each fabrication condition.
  • the inspection tool e.g., an optical microscope or a charged particle microscope
  • Failure rates of an IC structure in relation to a critical dimension may be measured as, for example, 1 part per million of a feature of the IC structure.
  • the feature of the IC structure may be identified by inspecting a generated image of the formed IC structure using a processor. Failure rates may be measured by analyzing a feature (e.g., a pixel or region of the IC structure pattern) of a corresponding image of the formed IC structure.
  • a CD distribution is modeled for a lithographic fabrication condition.
  • the CD distribution may be modeled at different focus and dose combinations.
  • a Bossung curve may be built from a range of CD measurements of an IC structure or feature over a range of lithographic fabrication conditions (e.g., dose or focus). For each Bossung curve built, a distribution of critical dimensions or variation of critical dimensions may be generated for the range of the lithographic fabrication condition. This may enable one to determine an impact of any variation of the lithographic fabrication condition (e.g., dose or focus) that may affect the IC structure (e.g., a change in CD) and lead to a failure.
  • any variation of the lithographic fabrication condition e.g., dose or focus
  • the IC structure e.g., a change in CD
  • the distribution of critical dimension or variation of critical dimension can be a normal distribution (e.g., Gaussian), Poisson, or any other standard distribution.
  • a CD distribution e.g., CD probability density function (PDF)
  • PDF CD probability density function
  • a critical dimension limit is calculated based on the modeled CD distribution and a measured failure rate. This may include determining a critical dimension limit for small and large defects of an IC structure.
  • the critical dimension limit is modeled as a function of lithographic fabrication condition. Steps 402-404 are performed concurrently for all lithographic fabrication conditions (e.g., dose, focus, or dose and focus). Thus, a modeled critical dimension limit is generated for each lithographic fabrication condition used to fabricate all IC structures.
  • step 405 a failure rate for each lithographic fabrication condition based on the modeled CD distribution and the modeled CD limit.
  • the failure rate may be estimated based on the following equations:
  • Equation (1) and Equation (2) FR sma uis a failure rate for a small feature or repeating pattern of an IC structure and FRi arge is a failure rate for a large feature or repeating pattern of an IC structure.
  • PDF (CD) is the modeled CD distribution determined in step 402 for a lithographic fabrication condition, CD m sma u modeled critical dimension limit for a small feature or repeating pattern for a lithographic fabrication condition determined in step 403, and CDi imiiarge modeled critical dimension limit for a large feature or repeating pattern for a lithographic fabrication condition determined in step 403. Equations (1) and (2) apply for each lithographic fabrication condition used to fabricate an IC.
  • step 406 a process window is generated to predict successful formation of defect-free IC structures according to all fabrication conditions.
  • FIG. 5A is an example block diagram for generating input data.
  • Input data may be generated using two steps as illustrated in FIG. 5A.
  • a lithographic projection apparatus 501 (such as lithographic projection apparatus 100 in FIG. 1) may be used to generate a focus-dose matrix using a plurality of focus and dose conditions for a radiation source (such as radiation source 101 in FIG. 1) onto a surface of a sample.
  • a focusdose matrix 510 may be formed on a target portion 520 of a substrate (such as target portion 109 in FIG. 1).
  • Target portion 520 may also be referred to as a focus-exposure matrix (FEM) wafer 520.
  • FEM focus-exposure matrix
  • the areas of the substrate within the grids of focus-dose matrix 510 may be exposed to a radiation source with varied focus 530 and dose 540.
  • Focus 530 is an indication of the focal point of the beam (such as beam 108 in FIG. 1) onto the surface of the sample
  • dose 540 is an indication of the energy of the radiation beam (such as beam 108 in FIG. 1) per area of the sample (e.g., mJ/cm 2 ).
  • each area outlined by a grid of focus-dose matrix 510 corresponds to a two-dimensional layout of a specific focus and dose of the radiation beam applying a pattern onto the sample.
  • Focus-dose matrix 510 may be a grid layout. Each area within a grid of focus-dose matrix 510 may contain a same IC structure or pattern, or each area with a grid may contain a different IC structure or pattern.
  • a processor 503 with a memory may be communicatively connected to lithographic projection apparatus 501 to store the focus and dose conditions of the radiation beam corresponding to each grid area of a focusdose matrix.
  • a metrology tool 502 e.g., an optical microscope or a charged particle beam microscope
  • Each critical dimension measured for a structure within a grid of the focus-dose matrix may correspond to a focus and dose condition during the lithographic fabrication process.
  • a single -beam inspection tool 504 e.g., an optical microscope or a charged particle beam microscope
  • Single-beam inspection tool 504 may have the capability to measure failure rates at a part per million level (e.g., 10 6 ).
  • a processor 503 with a memory may be communicatively connected to metrology tool 502 and single -beam inspection tool 504 to store the measured critical dimension values and failure rates. While not illustrated in FIG. 5A, a single beam tool could be used to perform both metrology and inspection.
  • FIG. 6A is an example illustration of the computational model calculating a critical dimension limit based on a modeled critical dimension distribution and a measured failure rate (e.g., step 403 in FIG. 4).
  • a failure rate 601 is plotted with a modeled CD distribution 602, and the intersection between failure rate 601 and modeled CD distribution 602 indicates the CD 603 of a feature or repeating pattern at which failure rate 601 occurs.
  • Failure rate 601 may be determined by an inspection tool (e.g., single -beam inspection tool 504 in FIG. 5A) and is a number of failed features or patterns out of a total number of repeating features or patterns on a device on a wafer.
  • the measured failure rate 601 > 1 may be a part per million failure rate, or 10 6 .
  • FIG. 6A illustrates a modeled CD distribution 602, measured failure rate 601_l, calculated CD lower limit 603_l, and calculated CD upper limit 603_2 for one lithographic fabrication condition (e.g., focus or dose).
  • the computational model builds a CD distribution, measures a failure rate, and calculates CD limit values for each lithographic fabrication condition (e.g., each focus/dose combination used in focus-dose matrix 510 in FIG. 5B).
  • the computational model may then model the calculated CD limit values as a function of lithographic fabrication condition (e.g., a function of focus and dose) to then estimate a failure rate as described above.
  • FIG. 6B is an example failure rate process window that can be generated by conventional methods for a feature or pattern of an IC structure across a range of fabrication conditions.
  • the failure rate process window 604 of FIG. 6B may be a contour plot indicating a range of estimated failure rates depending on a dose 605 and a focus 606.
  • the process window illustrates a contour boundary 607 that may represent a failure rate boundary of 10 6 .
  • Boundary 607 thus corresponds to the measured failure rate 601_l in FIG. 6A.
  • a contour boundary 608 may represent a failure rate boundary of 10 7 .
  • the radial area between two contour lines or boundaries in a failure rate process window indicates the lithographic fabrication conditions (e.g., dose 605 and focus 606) that may result in a feature or pattern with a failure rate between two values.
  • the radial area 609 between contour boundary 607 and contour boundary 608 represents a range of dose 605 and focus 606 values to achieve a failure rate between 10 6 and 10 7 .
  • the computational model according to conventional methods has a capability of accurately predicting a failure rate up to three orders of magnitude below a measured failure rate. Therefore, the failure rate process window of FIG. 6B has a contour boundary 610 that may represent a failure rate boundary of 10 9 , since the measured failure rate (e.g., measured failure rate 601_l in FIG.
  • Failure rate process window 604 may generate a contour boundary 611 that may indicate a 10 12 failure rate (part per trillion), but this is not accurate and is illustrated as such by the dotted line. If failure rate process window 604 were plotted as a color gradient contour plot, the radial area within and surrounding immediately outside boundary 611 may be illustrated as a drastic change in color representing a sharp decline in failure rate value. This may indicate an instability in the process window and therefore inaccurate failure rate predictions in this range of dose 605 and focus 606.
  • Limitations of conventional methods of modeling CD distributions and generating failure rate process windows may be a result of limited repeated patterns or features available for measurement on a device fabricated on a wafer. This may then limit the available features to measure failure rates (e.g., a failure rate for each same repeating feature or pattern) such that failure rates may only be available for thousands or millions of features. Additionally, this may limit the available CD measurements for any given lithographic fabrication condition on a FEM wafer (e.g., FEM wafer 520 in FIG. 5B) and result in an under representative sampling pool of CD measurements to model a CD distribution. Moreover, the modeled CD distribution may be inaccurate and impact the calculated CD limit values, the modeled CD limit values as a function of lithographic fabrication condition, and therefore inaccurately estimate failure rates at a desirably low level (e.g., part per trillion).
  • a desirably low level e.g., part per trillion
  • FIG. 7 is an example block diagram for generating input data, consistent with embodiments of the present disclosure.
  • Input data may be generated as illustrated in FIG. 7.
  • Lithographic projection apparatus 701 e.g., lithographic projection apparatus 100 in FIG. 1
  • the focus-dose matrix may be positioned on a wafer and referred to as a focus-dose/exposure matrix (FEM) wafer, and is as illustrated in FIG. 5B.
  • FEM focus-dose/exposure matrix
  • processor 703 with a memory may be communicatively connected to lithographic projection apparatus 701 to store the focus and dose conditions of the radiation beam corresponding to each grid area of a focus-dose matrix.
  • Metrology tool 702 e.g., an optical microscope or tool 204 in FIG. 2
  • Each critical dimension measured for a structure within a grid of the focusdose matrix may correspond to a focus and dose condition during the lithographic fabrication process.
  • a processor 703 with a memory may be communicatively connected to inspection tool 702 to store the measured critical dimension values.
  • a multi-beam inspection tool 704 may be used to measure failure rates of the structures formed in each grid area of the focusdose matrix (e.g., 510 in FIG. 5B) or measure failure rates of structures formed in grid areas of a second focus-dose matrix concurrently while critical dimension values are measured by metrology tool 702.
  • Multi-beam inspection tool 704 may have the capability to measure failure rates at a part per billion level (e.g., 10 9 ) and may measure failure rates up to 1000 times faster than metrology tool 702 measures CD values.
  • Processor 703 may be communicatively connected to multi-beam inspection tool 704 to store the measured failure rate values.
  • FIG. 8A is an example illustration of grouping a plurality of features on a wafer having a same target size in at least one direction, consistent with embodiments of the present disclosure.
  • FIG. 8A illustrates a wafer 801 containing a die 802 that may include one or more fabricated features or patterns.
  • Wafer 801 may be a FEM wafer (e.g., FEM wafer 520 in FIG. 5A) or a critical dimension uniformity (CDU) wafer in which a lithographic fabrication condition (e.g., focus, dose, or a combination thereof) is nominally uniform for each die on the CDU wafer.
  • the die 802 is expanded in FIG. 8A to show a plurality of grouped features in die 802.
  • Group 803 may all have a same or similar target size in an x-direction, and group 804 may all have a same or similar size in an x- direction. It is appreciated that “similar” may mean a target size of a feature within 10% of a second feature in a group. It is further appreciated that group 803 and group 804 are illustrated as each grouped feature having a different size in a y-direction, but embodiments of this disclosure are not so limited. For example, group 803 may contain features that share a same or similar target size in an x-direction and a y-direction, or a same or similar target size in a y-direction and different target sizes in an x- direction.
  • grouping a plurality of features having a same or similar target size in at least one direction may be based on a reference pattern.
  • the reference pattern may be an image or a design template (e.g., a graphic design system (GDS) template).
  • GDS graphic design system
  • grouping a plurality of features on a wafer based on a same or similar target size in at least one direction may significantly increase the number of available repeating features or patterns on a device for metrology measurements (e.g., CD) or failure rate measurements.
  • the number of available repeating features or patterns when grouped according to above embodiments may be a billion or more.
  • groupings may be employed to group of a plurality of features, and not just group 803 and group 804 as shown in FIG. 8A. Additionally, grouping a plurality of features may use any type of shape in the target design, and embodiments of the present disclosure are not limited to the shapes as illustrated by group 803 and group 804.
  • Modeled distribution 803_l may be generated for measured sizes of the target features in group 803 (FIG. 8A) and modeled distribution 804_l may be generated for measured sizes of the target features in group 804 (FIG. 8A).
  • the CD measurements of group 803 and group 804 may be collected by a metrology tool (e.g., metrology tool 702 in FIG. 7).
  • the modeled CD distributions may be generated as described above and are generated for one lithographic fabrication condition (e.g., focus, dose, or a combination thereof).
  • FIG. 8C is an example illustration of a deviation in a measured CD distribution variation per number of measurements, consistent with embodiments of the present disclosure.
  • a deviation 805 in the CD distribution increases towards 1 as the number of CD measurements 806 increases.
  • a value of 1 for deviation 805 represents a stable CD distribution that doesn’t change with additional metrology measurements.
  • deviation 805 reaches 1 at around 10 6 CD measurements.
  • a value of 1 for deviation 805 may indicate that the modeled CD distribution (e.g., modeled CD distribution 803_l in FIG. 8B) is stable and accurately models the distribution of CD across all measurements at that particular lithographic fabrication condition.
  • a value of around 1 for deviation 805 may be understood to mean a value at which deviation 805 approaches a horizontal asymptote (e.g., 1).
  • conventional methods to measure CD and model a CD distribution may be severely limited by an insufficient number of repeating features or patterns and thus may not accurately model the complete distribution of CD for a lithographic fabrication condition.
  • embodiments of the present disclosure may enable complete and accurate modeling of a CD distribution of a repeating feature or a pattern grouped by the methodology described in this disclosure or pattern fabricated at a lithographic fabrication condition.
  • FIG. 8C illustrates that 10 6 measurements of CD may be collected to ensure a modeled CD distribution is accurate.
  • Embodiments of the present disclosure may thus enable metrology tools (e.g., metrology tool 702 in FIG. 7) are still fast enough to measure metrology data (e.g., CD) for modeling a complete and accurate CD distribution in acceptable time frames, while a multi-beam inspection tool (e.g., multi-beam tool 204 in FIG. 3 and multi-beam inspection tool 704 in FIG. 7) may measure a part per billion failure rate.
  • metrology tools e.g., metrology tool 702 in FIG. 7
  • metrology data e.g., CD
  • a multi-beam inspection tool e.g., multi-beam tool 204 in FIG. 3 and multi-beam inspection tool 704 in FIG. 7 may measure a part per billion failure rate.
  • 9 A illustrates an example calculation of one grouped plurality of features (e.g., group 803 in FIG. 8A) at one lithographic fabrication condition. It is appreciated that this calculation may occur simultaneously for more than one group of features (e.g., group 803 and group 804 in FIG. 8A) and at multiple lithographic fabrication conditions.
  • FIG. 9B is an example illustration of a calculated CD limit modeled as a function of a lithographic fabrication condition, consistent with embodiments of the present disclosure.
  • a calculated CD lower limit value 902 is plotted against a lithographic fabrication condition (e.g., dose 605 in FIG. 6B). Since CD lower limit value 902 may be calculated by utilizing a more accurate failure rate measured at a lower level (e.g., part per billion), and the modeled CD distribution (e.g., modeled CD distribution 803_l in FIG.
  • modeled CD lower limit value 904 may be more accurately modeled as a function of dose 605 compared to conventional methods as described above. It is appreciated that modeled CD lower limit value 904 is illustrative and may be modeled using any polynomial function.
  • FIG. 10 is an example illustration of a generated failure rate process window by grouping a plurality of features with a same or similar target size in at least one direction, consistent with embodiments of the present disclosure.
  • generated failure rate process window 1001 may include a contour boundary 1002 that may be a part per trillion failure rate (e.g., 10 12 ). Since a multi-beam inspection tool (e.g., multi-beam tool 204 in FIG. 3 or multi-beam inspection tool 704 in FIG.
  • contour boundary 1002 is illustrated as a solid line, which may indicate a reliable estimation of a 10 12 failure rate.
  • a 10 12 failure rate boundary in a conventional failure rate process window may be inaccurate and was illustrated as a dashed line (e.g., 611 in FIG. 6B).
  • failure rate process window 1001 is for illustrative purposes, and different shapes and sizes for contour boundaries may be included.
  • FIG. 11 is an example workflow of acquiring input data and building a computational model to generate a failure rate process window capable of an accurate part- per-trillion failure rate prediction for a CDU wafer, consistent with embodiments of the present disclosure.
  • a FEM wafer 1101 e.g., FEM wafer 520 in FIG. 5A
  • CD measurements e.g., 10 6 measurements
  • grouped features e.g., group 803 and group 804 in FIG. 8A
  • each die 1102-1105 may have a different lithographic fabrication condition (e.g., a different dose, focus, or combination of dose and focus condition).
  • CD measurements may be collected for dies 1102-1105 by an metrology tool (e.g., metrology tool 702 in FIG. 7), and failure rate measurements are collected by measuring one billion features of the grouped features in dies 1102-1105 using a multi-beam inspection tool (e.g., multi-beam tool 204 in FIG. 3 or multi-beam inspection tool 704 in FIG. 7).
  • the input data e.g., 10 6 CD measurements and the measured failure rates from 10 9 grouped features
  • the input data e.g., 10 6 CD measurements and the measured failure rates from 10 9 grouped features
  • CD distributions are modeled for each die 1102-1105, and the measured failure rates are intersected with the CD distributions to calculate the limit CD values as described above.
  • the CD limit values are modeled as a function of lithographic fabrication condition, failure rates are estimated as described above using Equations 1 and 2, and then a failure rate process window 1106 is generated using the computational model calibrated with 10 6 CD measurements and the part per billion measured failure rates.
  • Input data may be collected from a CDU wafer 1108, in which dies 1109-1112 may be fabricated according to a nominal lithographic fabrication condition (e.g., focus and dose condition).
  • the input data collected from CDU wafer 1108 may be 10 6 CD measurements from grouped features within dies 1109-1112 as described above, and CD distributions may be modeled as described above.
  • the CD distributions for dies 1109-1112 may be supplied to the calibrated computational model to then predict a failure rate via the previously modeled CD limit values as a function of lithographic fabrication condition and the input CD distribution.
  • the calibrated computational model may generate predicted failure rates 1113 of regions of CDU wafer 1108 in which the predicted failure rates 1113 may be at least one part per trillion. It is appreciated that the regions of predicted failure rates 1113 on CDU wafer 1108 are illustrative and may be different sizes, shapes, and located at different positions on CDU wafer 1108.
  • FIG. 12 is an example illustration comparing a total time required to generate an accurate part per trillion failure rate model using a conventional method compared to embodiments of the present disclosure.
  • a part per trillion failure rate may be extrapolated from input metrology data and input inspection data (e.g., measured failure rate data).
  • the input metrology data may be at a part per million level (e.g., one million measurements) and the input inspection data may be at a part per billion level (e.g., one billion measurements).
  • FIG. 12 illustrates a time 1201 to generate a part per trillion failure rate model using a conventional method or embodiments of the present disclosure.
  • a conventional method using a single beam inspection tool e.g., single beam inspection tool 504 in FIG.
  • a conventional method using a single beam metrology tool to collect one million metrology measurements of a repeating pattern throughout a sample may take a time 1211.
  • time 1211 may be significantly shorter than time 1210, but both one billion failure rate measurements and one million inspection measurements must be collected to generate an accurate part per trillion model.
  • a conventional method may take a time 1201_l to generate a part per trillion failure rate model.
  • the time to collect one billion failure rate measurements (e.g., time 1210) may limit the applicability of a conventional method to generate a part per trillion failure rate model within a practicable time frame.
  • embodiments of the present disclosure may provide a multi-beam tool (e.g., multi-beam inspection tool 704 in FIG. 7) to collect one billion failure rate measurements and a single beam tool (e.g., metrology tool 702 in FIG. 7) to collect one million inspection measurements.
  • a multibeam tool may collect failure rate measurements significantly faster than a single beam tool used in a conventional method.
  • embodiments of the present disclosure provide grouping a plurality of features on a wafer having a same target size in at least one direction. As described above, this grouping may significantly increase a number of repeating features or patterns on a sample for failure rate measurement.
  • Time 1220 and 1221 may be equal, and thus an accurate part per trillion failure rate model may be generated in a time 1201_2, which may be significantly shorter compared to time 1201_1 using a conventional method.
  • an accurate part per trillion failure rate model may be generated in a practicable time frame (e.g., 4-8 hours) according to embodiments of the present disclosure, whereas a conventional method may require hundreds of hours.
  • embodiments of the present disclosure may eliminate a mismatch in time required for data acquisition (e.g., inspection and metrology) and drastically reduce a time required to generate an accurate part per trillion failure rate model.
  • FIG. 13 is an example block diagram illustrating a system 1300 for building a computational model to generate a failure rate process window capable of an accurate part-per-trillion failure rate prediction for a CDU wafer, consistent with embodiments of the present disclosure.
  • the modules in system 1300 in FIG. 13 may be applied via controller 209 in FIG 2, image processing system 390 in FIG. 3, or processor 703 in FIG. 7.
  • Input data may be obtained for a fabricated device and supplied to the computational model.
  • the input data may be input metrology information 1301 obtained from a metrology tool (e.g., tool 204 in FIG. 2 or metrology tool 702 in FIG. 7).
  • Input metrology information 1301 may be images collected for a device processed according to a wafer processing step (e.g., wafer processing steps in wafer workflow described above). The image may contain the metrology information available for the devices after a wafer processing step.
  • Input metrology information 1301 may be CD information, edge placement, or any other critical feature dimensions in IC chip design.
  • Input metrology information 1301 may be collected from a FEM wafer.
  • input metrology information 1301 may be CD measurements of a grouped plurality of features having a same or similar target size in at least one direction fabricated according to a lithographic fabrication condition. In some embodiments, input metrology information 1301 may be 10 6 CD measurements of a grouped plurality of features having a same or similar target size in at least one direction.
  • the input data may also be input inspection information 1302 obtained from a multi-beam inspection tool (e.g., multi-beam tool 204 in FIG. 3 or multi-beam inspection tool 704 in FIG. 7).
  • input inspection information 1301 may be a failure rate measured by a multi-beam inspection tool for billions of features in a grouped plurality of features having a same or similar target size in at least one direction fabricated according to a lithographic fabrication condition.
  • Input metrology information 1301 and input inspection information 1302 may be supplied to a computational model 1303.
  • Computational model 1303 may build a metrology information distribution for a grouped plurality of features having a same or similar target size in at least one direction according to a lithographic fabrication condition.
  • computational model 1303 may build a plurality of metrology information distributions according to a plurality of lithographic fabrication conditions.
  • the metrology information distribution is a CD distribution.
  • Computational model 1303 may calculate metrology limit information that corresponds to input inspection information 1302.
  • computational model 1303 may generate a model of calculated metrology limit information as a function of lithographic fabrication condition.
  • the calculated metrology limit information is a lower CD limit value. In some embodiments, the calculated metrology limit information is an upper CD limit value.
  • computational model 1303 may use input inspection information 1302 to calibrate the modeled calculated metrology limit information as a function of lithographic fabrication condition. [0085] Computational model 1303 may output a calibrated computational model 1304. Calibrated computational model 1304 may be used to predict a failure rate per metrology information. In some embodiments, metrology information 1305 may be supplied to calibrated computational model 1304. Metrology information 1305 may be as described above for input metrology information 1301, but with regards to a uniform lithographic fabrication condition.
  • metrology information 1305 may be 10 6 CD measurements of a grouped plurality of features having a same or similar target size in at least one direction from a second wafer.
  • the second wafer is a CDU wafer.
  • metrology information 1305 may be collected from a metrology tool (e.g., tool 204 in FIG. 2 or metrology tool 702 in FIG. 7).
  • Calibrated computational model 1304 may then generate a failure rate map 1306 of dies on the second wafer.
  • generated failure rate map 1306 may include part per trillion failure rates estimated at a region on the second wafer.
  • generated failure rate map 1306 may include part per trillion failure rates estimated at a plurality of regions on the second wafer.
  • FIG. 14 is an example flow diagram illustrating a method 1400 of building a calibrated computational model to predict a part per trillion failure rate, consistent with embodiments of the present disclosure.
  • the steps of method 1400 may be performed by a computing device that includes, e.g., controller 209 of FIG. 2, image processing system 390 of FIG. 3, or processor 703 of FIG. 7. It is appreciated that the illustrated method 1400 may be altered to modify the order of steps and to include the additional steps.
  • a plurality of features on a wafer is grouped based on a same or similar target size in at least one direction.
  • the at least one direction may be an x-direction, a y-direction, or both an x- direction and a y-direction.
  • multiple pluralities of features are grouped based on a plurality of features having a same or similar target size in at least on direction.
  • the wafer is a FEM wafer.
  • the input data is acquired and supplied to a computational model.
  • the input data may include metrology information collected from a grouped plurality of features on the wafer.
  • the metrology information may be CD measurements of a grouped plurality of features.
  • the metrology information may be 10 6 CD measurements of a grouped plurality of features.
  • the metrology information may be collected by an metrology tool (e.g., tool 204 in FIG. 2 or metrology tool 702 in FIG. 7).
  • the input data may include inspection information collected from a grouped plurality of features on the wafer.
  • the inspection information may be a measured failure rate. In some embodiments, the failure rate may be measured for billions of features in a grouped plurality of features.
  • the measured failure rate may be a part per billion failure rate.
  • the inspection information may be collected from a multi-beam inspection tool (e.g., multi-beam tool 204 in FIG. 3 or multi-beam inspection tool 704 in FIG. 7).
  • the computational model is calibrated using the input data to extrapolate a part per trillion failure rate prediction.
  • the computational model is calibrated using the measured part per billion failure rates.
  • the computational model generates a model of metrology information as a function of lithographic fabrication condition.
  • the calibrated computational model 1304 may be used to predict a failure rate based on the model of metrology information as a function of lithographic fabrication condition.
  • step 1404 input data for a second wafer is acquired and supplied to the calibrated computational mode.
  • the input data for the second wafer includes metrology information collected from a grouped plurality of features on the second wafer.
  • the metrology information may include CD measurements of a grouped plurality of features as described above in step 1402.
  • a failure rate map of the second wafer is generated.
  • the failure rate map may predict a part per trillion failure rate of a feature or pattern on the second wafer.
  • the generated failure rate map may be used to monitor wafer production and wafer yield during HVM.
  • a benefit provided by embodiments of the present disclosure may be a method to accurately predict a part per trillion failure rate for wafers fabricated during HVM.
  • a desirably high wafer yield may be monitored and maintained during wafer fabrication.
  • a method is provided to group a plurality of features on a wafer to drastically increase available metrology measurements for accurate part per billion failure rate prediction.
  • Some embodiments of the present disclosure may provide billions of repeating features or patterns for available mebology and inspection measurements.
  • Some embodiments of the present disclosure may provide a method of extrapolating a part per billion failure rate by correlating input metrology and failure rate data.
  • the input failure rate data is collected using a multi-beam inspection tool.
  • the input failure rate data is a measured part per billion failure rate.
  • Some embodiments of the present disclosure may provide a method of building a computational model from correlated input mebology and failure rate data and to accurately predict down to a part per trillion failure rate from metrology data. Moreover, some embodiments of the present disclosure may increase throughput of IC manufacturing and confidence in predicting lithographic fabrication conditions to manufacture defect-free ICs. Some embodiments of the present disclosure may also provide a method to generate a process window indicating lithographic fabrication conditions necessary to minimize defects and achieve a part per trillion failure rate in IC fabrication. Some embodiments of the present disclosure may provide a method to maintain defect inspection accuracy and yield of defect- free devices throughout HVM.
  • a non-bansitory computer readable medium may be provided that may store instructions for a processor of a lithographic projection apparatus (e.g., lithographic projection apparatus 100 of FIG. 1), a processor of a metrology tool (e.g., tool 204 of FIG. 2 or mebology tool 702 of FIG. 7) to group a plurality of features on a sample based on a same or similar target size in at least one direction and to determine critical dimension measurements, a processor of a multi-beam inspection tool (e.g., multibeam tool 204 of FIG. 3 or multi-beam inspection tool 704 of FIG.
  • a lithographic projection apparatus e.g., lithographic projection apparatus 100 of FIG. 1
  • a processor of a metrology tool e.g., tool 204 of FIG. 2 or mebology tool 702 of FIG.
  • a processor of a multi-beam inspection tool e.g., multibeam tool 204 of FIG. 3 or multi-beam inspection tool 704 of
  • non-transitory media include, for example, a floppy disk, a flexible disk, hard disk, solid state drive, magnetic tape, or any other magnetic data storage medium, a Compact Disc Read Only Memory (CD-ROM), any other optical data storage medium, any physical medium with patterns of holes, a Random Access Memory (RAM), a Programmable Read Only Memory (PROM), and Erasable Programmable Read Only Memory (EPROM), a FLASH-EPROM or any other flash memory, Non-Volatile Random Access Memory (NVRAM), a cache, a register, any other memory chip or cartridge, and networked versions of the same.
  • NVRAM Non-Volatile Random Access Memory
  • a method for performing a massive metrology analysis comprising: grouping a plurality of features, wherein the grouped features share a same or similar target size in at least one direction; measuring a size of a feature of the grouped features; measuring a failure rate of a feature from the grouped features using a multi-beam tool; correlating the measured sizes of the grouped features with the measured failure rates of the grouped features; and calibrating a computational model with the correlation to generate a process window for a range of failure rates up to three orders of magnitude below the measured failure rate.
  • calibrating the computational model with the correlation to generate a process window for a range of failure rates up to three orders of magnitude below the measured failure rate comprises: extrapolating an at least one part per trillion failure rate based on the measured size of a feature of the grouped features and the measured failure rate.
  • a method for performing a massive metrology analysis comprising: grouping a plurality of features on a sample, wherein the grouped features on the sample share a same or similar target size in at least one direction; measuring a size of a feature of the grouped features; generating a distribution of measured sizes of the grouped features; measuring a failure rate of a feature of the grouped features, wherein the failure rate is at least one part per billion; correlating the generated distribution with the measured failure rate; calibrating a computational model with the correlation; and generating a process window from the calibrated computational model for a range of failure rates up to three orders of magnitude below the measured failure rate.
  • calibrating the computational model with the correlation comprises: extrapolating an at least one part per one trillion failure rate based on the measured size of a feature of the grouped features and the measured failure rate.
  • a non-transitory computer readable medium comprising a set of instructions that is executable by one or more processors of a computing device to cause the computing device to perform operations for performing a massive metrology analysis, the operations comprising: grouping a plurality of features wherein the grouped features share a same or similar target size in at least one direction; measuring a size of a feature of the grouped features; measuring a failure rate of a feature of the grouped features using a multi-beam tool; correlating the measured sizes of the grouped features with the measured failure rates of the grouped features; and calibrating a computational model with the correlation to generate a process window for a range of failure rates up to three orders of magnitude below the measured failure rate.
  • operations further comprise: extrapolating an at least one part per trillion failure rate based on the measured size of a feature of the grouped features and the measured failure rate.
  • a non-transitory computer readable medium comprising a set of instructions that is executable by one or more processors of a computing device to cause the computing device to perform operations for predicting a failure rate for a device, the operations comprising: grouping a plurality of features on a sample, wherein the grouped features on the sample share a same or similar target size in at least one direction; measuring a size of a feature of the grouped features; generating a distribution of measured sizes of the grouped features; measuring a failure rate of a feature of the grouped features, wherein the failure rate is at least one part per billion; correlating the generated distribution with the measured failure rate; calibrating a computational model with the correlation; and generating a process window from the calibrated computational model for a range of failure rates up to three orders of magnitude below the measured failure rate.
  • calibrating a computational model with the correlation further comprises: extrapolating an at least one part per trillion failure rate based on the measured size of a feature of the grouped features and the measured failure rate.
  • the operations further comprise: grouping a plurality of features on a second sample, wherein the grouped features on the second sample share a same or similar target size in at least one direction; measuring a size of a feature of the grouped features; generating a distribution of measured sizes of the grouped features; and applying the calibrated computational model to the generated size distribution to predict a failure rate of a feature of the grouped features, wherein the predicted failure rate is at least one part per trillion.
  • a system using a computational model to perform a massive metrology analysis comprising: one or more processors configured to execute instructions to cause the system to perform operations comprising: grouping a plurality of features wherein the grouped features share a same or similar target size in at least one direction; measuring a size of a feature of the grouped features; measuring a failure rate of a feature of the grouped features using a multi-beam tool; and correlating the measured sizes of the grouped features with the measured failure rates of the grouped features; and calibrating a computational model with the correlation to generate a process window for a range of failure rates up to three orders of magnitude below the measured failure rate.
  • a system using a computational model to perform a massive metrology analysis comprising: one or more processors configured to execute instructions to cause the system to perform operations comprising: grouping a plurality of features on a sample, wherein the grouped features on the sample share a same or similar target size in at least one direction; measuring a size of a feature of the grouped features; generating a distribution of measured sizes of grouped features; measuring a failure rate of a feature of the grouped features, wherein the failure rate is at least one part per billion; correlating the generated distribution with the measured failure rate; calibrating a computational model with the correlation; and generating a process window from the calibrated computational model for a range of failure rates up to three orders of magnitude below the measured failure rate.
  • calibrating the computational model with the correlation further comprises: extrapolating an at least one part per trillion failure rate based on the measured size of a feature of the grouped features and the measured failure rate.
  • the operations further comprise: grouping a plurality of features on a second sample, wherein the grouped features on the second sample share a same or similar target size in at least one direction; measuring a size of a feature of a grouped features; generating a distribution of measured sizes of the grouped features; and applying the calibrated computational model to the generated size distribution to predict a failure rate of a feature of the grouped features, wherein the predicted failure rate is at least one part per trillion.

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Abstract

L'invention concerne un procédé permettant de prédire un taux de défaillance d'une partie par billion, et, plus particulièrement, un procédé destiné à améliorer la prédiction de taux de défaillance en regroupant des caractéristiques sur un échantillon pour drastiquement augmenter un certain nombre de caractéristiques sur un dispositif ou sur un échantillon qui sont disponibles pour métrologie et inspection. Un outil à faisceau unique et un outil à faisceaux multiples peuvent être utilisés simultanément pour étalonner un modèle de calcul et pour tirer parti d'une prédiction précise de taux de défaillance d'une partie par billion pour un échantillon.
PCT/EP2024/073851 2023-09-25 2024-08-26 Méthodologie pour prédire un taux de défaillance d'une partie par billion Pending WO2025067792A1 (fr)

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US20230221652A1 (en) * 2020-07-03 2023-07-13 Asml Netherlans B. V. Process window based on failure rate

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* Cited by examiner, † Cited by third party
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US20230221652A1 (en) * 2020-07-03 2023-07-13 Asml Netherlans B. V. Process window based on failure rate

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