WO2025151237A1 - Apprentissage profond géométrique pour réduction de réseau - Google Patents

Apprentissage profond géométrique pour réduction de réseau

Info

Publication number
WO2025151237A1
WO2025151237A1 PCT/US2024/059864 US2024059864W WO2025151237A1 WO 2025151237 A1 WO2025151237 A1 WO 2025151237A1 US 2024059864 W US2024059864 W US 2024059864W WO 2025151237 A1 WO2025151237 A1 WO 2025151237A1
Authority
WO
WIPO (PCT)
Prior art keywords
basis
lattice
neural
changed
partial
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/US2024/059864
Other languages
English (en)
Inventor
Giovanni Luca MARCHETTI
Gabriele Cesa
Kumar Pratik
Arash BEHBOODI
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US18/410,677 external-priority patent/US20250232000A1/en
Priority claimed from US18/410,660 external-priority patent/US12413270B2/en
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of WO2025151237A1 publication Critical patent/WO2025151237A1/fr
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/0413—MIMO systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/17—Function evaluation by approximation methods, e.g. inter- or extrapolation, smoothing, least mean square method
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/045—Combinations of networks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods

Definitions

  • Wireless communications systems are widely deployed to provide various telecommunication services such as telephony, video, data, messaging, broadcasts, or other similar types of services. These wireless communications systems may employ multiple-access technologies capable of supporting communications with multiple users by sharing available wireless communications system resources with those users [0004] Although wireless communications systems have made great technological advancements over many years, challenges still exist. For example, complex and dynamic environments can still attenuate or block signals between wireless transmitters and wireless receivers.
  • Lattice reduction is useful to solve the Closest Vector Problem (CVP) and Shortest Vector Problem (SVP) on lattices, which, as an example, arise respectively in multiple-input multiple-output (MIMO) demapping processes and standard public-key methods for post-quantum cryptography processes.
  • CVP and SVP solutions are possible when the bases (B) are orthogonal or nearly-orthogonal.
  • B the bases
  • lattices admit orthogonal bases, thus making the problem of finding the most orthogonal basis of a lattice, that is, the lattice reduction problem, NP-hard and therefore unfeasible to solve directly.
  • Wireless communications network 100 may subdivide the electromagnetic spectrum into various classes, bands, channels, or other features. In some aspects, the subdivision is provided based on wavelength and frequency, where frequency may also be referred to as a carrier, a subcarrier, a frequency channel, a tone, or a subband.
  • frequency may also be referred to as a carrier, a subcarrier, a frequency channel, a tone, or a subband.
  • 3GPP currently defines Frequency Range 1 (FR1) as including 410 MHz – 7125 MHz, which is often referred to (interchangeably) as “Sub-6 GHz”.
  • FR2 Frequency Range 2
  • mmW millimeter wave
  • 5GC 190 may include various functional components, including: an Access and Mobility Management Function (AMF) 192, other AMFs 193, a Session Management Function (SMF) 194, and a User Plane Function (UPF) 195.
  • AMF 192 may be in communication with Unified Data Management (UDM) 196.
  • UDM Unified Data Management
  • AMF 192 is a control node that processes signaling between UEs 104 and 5GC 190.
  • AMF 192 provides, for example, quality of service (QoS) flow and session management.
  • IP Internet protocol
  • IP Services 197 may include, for example, the Internet, an intranet, an IMS, a PS streaming service, and/or other IP services.
  • a network entity or network node can be implemented as an aggregated base station, as a disaggregated base station, a component of a base station, an integrated access and backhaul (IAB) node, a relay node, a sidelink node, to name a few examples.
  • IAB integrated access and backhaul
  • FIG. 2 depicts an example disaggregated base station 200 architecture.
  • control functions can include radio resource control (RRC), packet data convergence protocol (PDCP), service data adaptation protocol (SDAP), or the like.
  • RRC radio resource control
  • PDCP packet data convergence protocol
  • SDAP service data adaptation protocol
  • Each control function can be implemented with an interface configured to communicate signals with other control functions hosted by the CU 210.
  • the CU 210 may be configured to handle user plane functionality (e.g., Central Unit – User Plane (CU-UP)), control plane functionality (e.g., Central Unit – Control Plane (CU-CP)), or a combination thereof.
  • the CU 210 can be logically split into one or more CU-UP units D&S Ref. No.: QCM2400303U1WO Qualcomm Ref. No.: 2400303U1WO 12 and one or more CU-CP units.
  • Lower-layer functionality can be implemented by one or more RUs 240.
  • an RU 240 controlled by a DU 230, may correspond to a logical node that hosts RF processing functions, or low-PHY layer functions (such as performing fast Fourier transform (FFT), inverse FFT (iFFT), digital beamforming, physical random access channel (PRACH) extraction and filtering, or the like), or both, based at least in part on the functional split, such as a lower layer functional split.
  • the RU(s) 240 can be implemented to handle over the air (OTA) communications with one or more UEs 104.
  • OTA over the air
  • the SMO Framework 205 may be configured to interact with a cloud computing platform (such as an open cloud (O-Cloud) 290) to perform D&S Ref. No.: QCM2400303U1WO Qualcomm Ref. No.: 2400303U1WO 13 network element life cycle management (such as to instantiate virtualized network elements) via a cloud computing platform interface (such as an O2 interface).
  • a cloud computing platform such as an open cloud (O-Cloud) 290
  • QCM2400303U1WO Qualcomm Ref. No.: 2400303U1WO 13 network element life cycle management such as to instantiate virtualized network elements
  • a cloud computing platform interface such as an O2 interface
  • Such virtualized network elements can include, but are not limited to, CUs 210, DUs 230, RUs 240 and Near-RT RICs 225.
  • the SMO Framework 205 can communicate with a hardware aspect of a 4G RAN, such as an open eNB (O-eNB) 211, via an O1
  • the Non-RT RIC 215 or the Near-RT RIC 225 may be configured to tune RAN behavior or performance.
  • the Non-RT RIC 215 may monitor long-term trends and patterns for performance and employ AI/ML models to perform corrective actions through the SMO Framework 205 (such as reconfiguration via O1) or via creation of RAN management policies (such as A1 policies).
  • FIG. 3 depicts aspects of an example BS 102 and a UE 104.
  • BS 102 includes various processors (e.g., 320, 330, 338, and 340), antennas 334a-t (collectively 334), transceivers 332a-t (collectively 332), which include D&S Ref.
  • the control information may be for the physical broadcast channel (PBCH), physical control format indicator channel (PCFICH), physical hybrid automatic repeat request (HARQ) indicator channel (PHICH), physical downlink control channel (PDCCH), group common PDCCH (GC PDCCH), and/or others.
  • the data may be for the physical downlink shared channel (PDSCH), in some examples.
  • Transmit processor 320 may process (e.g., encode and symbol map) the data and control information to obtain data symbols and control symbols, respectively. Transmit processor 320 may also generate reference symbols, such as for the primary synchronization signal (PSS), secondary synchronization signal (SSS), PBCH demodulation reference signal (DMRS), and channel state information reference signal (CSI-RS).
  • PSS primary synchronization signal
  • SSS secondary synchronization signal
  • DMRS PBCH demodulation reference signal
  • CSI-RS channel state information reference signal
  • the uplink signals from UE 104 may be received by antennas 334a- t, processed by the demodulators in transceivers 332a-332t, detected by a RX MIMO detector 336 if applicable, and further processed by a receive processor 338 to obtain decoded data and control information sent by UE 104.
  • Receive processor 338 may provide the decoded data to a data sink 339 and the decoded control information to the controller/processor 340.
  • Memories 342 and 382 may store data and program codes for BS 102 and UE 104, respectively.
  • Scheduler 344 may schedule UEs for data transmission on the downlink and/or uplink. D&S Ref.
  • BS 102 may be described as transmitting and receiving various types of data associated with the methods described herein.
  • “transmitting” may refer to various mechanisms of outputting data, such as outputting data from data source 312, scheduler 344, memory 342, transmit processor 320, controller/processor 340, TX MIMO processor 330, transceivers 332a-t, antenna 334a-t, and/or other aspects described herein.
  • Wireless communications frame structures may also be time division duplex (TDD), in which, for a particular set of subcarriers, subframes within the set of subcarriers are dedicated for both DL and UL.
  • TDD time division duplex
  • the wireless communications frame structure is TDD where D is DL, U is UL, and X is flexible for use between DL/UL.
  • UEs may be configured with a slot format through a received slot format indicator (SFI) (dynamically through DL control information (DCI), or semi-statically/statically through radio resource control (RRC) signaling).
  • SFI received slot format indicator
  • DCI dynamically through DL control information
  • RRC radio resource control
  • a 10 ms frame is divided into 10 equally sized 1 ms subframes. Each subframe may include one or more time slots.
  • the subcarrier spacing and symbol length/duration are a function of the numerology.
  • the subcarrier spacing may be equal to 2 ⁇ ⁇ 15 kHz, where ⁇ is the numerology 0 to 5.
  • the symbol length/duration is inversely related to the subcarrier spacing.
  • the slot duration is 0.25 ms
  • the subcarrier spacing is 60 kHz
  • the symbol duration is approximately 16.67 ⁇ s.
  • the RS may include demodulation RS (DMRS) and/or channel state information reference signals (CSI-RS) for channel estimation at the UE.
  • the RS may also include beam measurement RS (BRS), beam refinement RS (BRRS), and/or phase tracking RS (PT-RS).
  • BRS beam measurement RS
  • BRRS beam refinement RS
  • PT-RS phase tracking RS
  • FIG. 4B illustrates an example of various DL channels within a subframe of a frame.
  • the physical downlink control channel (PDCCH) carries DCI within one or more control channel elements (CCEs), each CCE including, for example, nine RE groups (REGs), each REG including, for example, four consecutive REs in an OFDM symbol.
  • a primary synchronization signal (PSS) may be within symbol 2 of particular subframes of a frame.
  • the PSS is used by a UE (e.g., 104 of FIGS. 1 and 3) to determine subframe/symbol timing and a physical layer identity.
  • a secondary synchronization signal may be within symbol 4 of particular subframes of a frame.
  • the SSS is used by a UE to determine a physical layer cell identity group number and radio frame timing.
  • the UE Based on the physical layer identity and the physical layer cell identity group number, the UE can determine a physical cell identifier (PCI). Based on the PCI, the UE can determine the locations of the aforementioned DMRS.
  • PCI physical cell identifier
  • ⁇ ⁇ 1 ⁇ , wherein Q is a base-change matrix. Matrices belonging to ⁇ ⁇ ⁇ Z ⁇ are deemed unimodular. [0090] As noted above, lattices carry two fundamental computational problems. The SVP reduces to the CVP and the SVP is known to be NP-hard under randomized reductions. [0091] Not all bases are created equal. The ideal bases are the orthogonal ones i.e., such that H T H is diagonal.
  • MIMO wireless systems employ multiple antennas on both the transmit and receive sides, and provide increased spectral efficiency as compared to single-antenna systems.
  • a number of transmit antennas send signals x i to a number of receiver antennas.
  • the set of possible transmitted (noiseless) signals defines a lattice in the receiver’s space MIMO decoding is an instance of Closest Vector Problem (CVP).
  • CVP Closest Vector Problem
  • MIMO techniques may be used to achieve high data rates by transmitting signals from multiple antennas for reception by multiple antennas.
  • MIMO wireless systems employ multiple antennas on both the transmit and receive sides, and provide increased spectral efficiency as compared to single-antenna systems.
  • MIMO-OFDM enables high data rates (data-throughput) by transmitting multiple data streams in parallel in the same frequency band, referred to as spatial multiplexing.
  • various demappers may be used to decode the received signal and provide the received signal to error correction blocks for further processing. Because calculating probability estimates over transmitted bits to use as an input into error correction blocks is generally a computationally complex task, the neural lattice reduction D&S Ref.
  • FIG. 6 is a diagram illustrating an example of a demodulator 600, in accordance with various aspects described herein.
  • the demodulator 600 may be part of a wireless communications device, such as a UE 104, a base station (BS 102/180) and/or a component of a disaggregated base station of FIGs 1-3.
  • the demodulator 600 may be part of a transceiver 354/332, RX MIMO detector 356/336, and/or receive processor 358/338.
  • Demodulator 600 includes a receive component 605 and an LR component 610.
  • One or more of components 605-610 of demodulator 600 may be part of transceiver 354/332, RX MIMO detector 356/336, and/or receive processor 358.
  • Each of the components 605-610 of demodulator 600 may correspond to one or more hardware components specifically configured to carry out the stated processes/algorithm, implemented by one or more processors configured to perform the stated processes/algorithm, stored within a computer-readable medium for implementation by one or more processors, or some combination thereof.
  • Receive component 605 is configured to receive communications, such as from another wireless communications device (e.g., a UE 104, a base station (BS 102/180) and/or a component of a disaggregated base station of FIGs 1-3).
  • a network entity may send a communication to a UE 104 in a communications channel (corresponding to a frequency range), or vice versa, which is received by receive component 605, such as using multiple antennas.
  • the communication may be in the form of one or more beamformed transmissions on one or more REs scheduled for the wireless communications device.
  • the communication in the form of one or more beamformed transmissions may correspond to one or more modulated signals.
  • the receive component 605 outputs a vector ⁇ that is a representation of the received signaling, including the one or more beamformed transmissions, as received over each of the multiple antennas on the communications channel such as on the one or more REs scheduled for the wireless communications device.
  • LR component 610 is deploying geometric machine learning to approximate lattice reduction as described in more detail in FIG. 7. D&S Ref. No.: QCM2400303U1WO Qualcomm Ref. No.: 2400303U1WO 22 Aspects Related to a Neural Lattice Reduction Method [0100]
  • FIG. 7 is a block diagram illustrating an example of lattice reduction component 700, such as the LR component 610 discussed with reference to FIG. 6, comprising a neural lattice reduction process.
  • the approximated map is invariant with respect to GL ⁇ Z ⁇ and has continuous values.
  • the model 720 includes a gram matrix component 722, an equivariant neural network 724, an extended Gauss move component 726, and a recursion component 728.
  • the first gram matrix may be provided to the equivariant neural network 724, ⁇ .
  • the equivariant neural network 724 may be configured to generate a current extended Gauss move.
  • the equivariance property ⁇ ( ⁇ ) may be compatible with this recursion.
  • ⁇ outputs a matrix in the following form, referred to as an extended Gauss move: [0108]
  • the extended Gauss move has 1 on the diagonal and 0 everywhere except for a single row and a single column. Every ⁇ ⁇ SL ⁇ Z ⁇ can be written as a product of ⁇ extended Gauss moves. [0109]
  • the extended Gauss move at the extended Gauss move component 726 the following steps may be performed.
  • the index (i, j) is sampled via Gumbel-Softmax with a log- likeihood proportional to the absolute value of ! ⁇ ⁇ !. Then, each value m i,j is discretized via stochastic rounding, for example, by rounding it up or down with a probability proportional to the rounding error. Next, while retaining the i-th row and the j-th column of M, the sampling is converted into an extended Gauss move by masking the diagonal and all the other entries. In some aspects, the retained values are discretized via stochastic rounding, which may be an unbiased and differentiable discretization technique.
  • ⁇ can assume only 15 different values, for example as depicted in FIG. 8. Fifteen (15) possible messages from ($ ⁇ % ⁇ ) to ($, %) are depicted. D&S Ref. No.: QCM2400303U1WO Qualcomm Ref.
  • ⁇ , ) are Multi-Layer Perceptrons (MLPs).
  • MLPs Multi-Layer Perceptrons
  • the model 720 is further configured to execute one or more additional iterations.
  • a process of combining the current partial changed basis and each of the additional partial changed basis forms a first reduced basis for the first lattice with the reduced basis component (e.g., the output 730).
  • each of the lattices can be reduced in parallel by executing the model 720 in parallel.
  • the model 720 can fully leverage the deep learning hardware and can parallelize lattice reduction across multiple lattices (distributed across frequency and time).
  • FIG. 9 shows a method 900 for wireless communications by an apparatus, such as UE 104 of FIGS. 1 and 3.
  • Method 900 begins at block 905 with receiving signals corresponding to a MIMO channel matrix.
  • method 900 further includes generating a second gram matrix from a basis for a second lattice corresponding to a second signal of the received signals.
  • method 900 further includes generating, with the neural lattice reduction model, one or more second partial changed bases for the second lattice. D&S Ref. No.: QCM2400303U1WO Qualcomm Ref.
  • method 900 further includes generating a second reduced basis for the second lattice based on the one or more second partial changed bases, wherein the one or more processors generate the first reduced basis and the second reduced basis through parallel processing of the neural lattice reduction model.
  • the apparatus comprises a plurality of antennas, wherein the first signal of the received signals is received by a first antenna of the plurality of antennas and the second signal of the received signals is received by a second antenna of the plurality of antennas.
  • the parallel processing of the neural lattice reduction model is implemented by graphic processing unit batching.
  • method 900 further includes demapping the MIMO channel matrix based on the first reduced basis and the second reduced basis.
  • the first reduced basis is more orthogonal and shorter than the basis for the first lattice corresponding to the MIMO channel matrix.
  • the apparatus comprises a plurality of antennas configured to receive the signals, wherein the received signals are distributed across time and frequency.
  • method 900, or any aspect related to it may be performed by an apparatus, such as communications device 1100 of FIG.11, which includes various components operable, configured, or adapted to perform the method 900. Communications device 1100 is described below in further detail.
  • FIG. 10 shows a method 1000 for wireless communications by an apparatus, such as UE 104 of FIGS. 1 and 3.
  • Method 1000 begins at block 1005 with providing a first gram matrix to a neural lattice reduction model.
  • Method 1000 then proceeds to block 1010 with generating, with the neural lattice reduction model, one or more partial changed bases. D&S Ref. No.: QCM2400303U1WO Qualcomm Ref.
  • Method 1000 then proceeds to block 1015 with generating a first reduced basis based on the one or more partial changed bases.
  • the neural lattice reduction model comprises an equivariant neural network configured to generate a current extended Gauss move.
  • method 1000 further includes generating the first gram matrix from a basis for a first lattice corresponding to a first signal of a plurality of received signals, wherein the one or more partial changed bases generated by the neural lattice reduction model is based on at least the current extended Gauss move and the basis.
  • method 1000 further includes executing a plurality of additional iterations of the neural lattice reduction model, wherein each iteration comprises: generating a subsequent gram matrix from one of the one or more partial changed bases, providing the subsequent gram matrix to the neural lattice reduction model to generate a subsequent extended Gauss move, and generate an additional partial changed basis based on the subsequent extended Gauss move and the one or more partial changed bases.
  • method 1000 further includes providing a second gram matrix from a basis for a second lattice.
  • method 1000 further includes generating, with the neural lattice reduction model, one or more second partial changed bases for the second lattice.
  • the apparatus comprises a plurality of antennas, wherein the first signal of the plurality of received signals is received by a first antenna of the plurality of antennas and a second signal of the plurality of received signals is received by a second antenna of the plurality of antennas.
  • method 1000 further includes combining the one or more partial changed bases to form the first reduced basis for a first lattice.
  • method 1000 may be performed by an apparatus, such as communications device 1200 of FIG.12, which includes various components operable, configured, or adapted to perform the method 1000. Communications device 1200 is described below in further detail. [0149] Note that FIG.
  • FIG.11 depicts aspects of an example communications device 1100.
  • communications device 1100 is a wireless communications device, such as a UE 104, a base station (BS 102/180) and/or a component of a disaggregated base station of FIGs 1-3.
  • the communications device 1100 includes a processing system 1105 coupled to a transceiver 1175 (e.g., a transmitter and/or a receiver).
  • the transceiver 1175 is configured to transmit and receive signals for the communications device 1100 via an antenna 1180, such as the various signals as described herein.
  • the processing system 1105 may be configured to perform processing functions for the communications device 1100, including processing signals received and/or to be transmitted by the communications device 1100.
  • the processing system 1105 includes one or more processors 1110.
  • the one or more processors 1110 may be representative of one or more of receive processor 358, transmit processor 364, TX MIMO processor 366, and/or controller/processor 380, as described with respect to FIG.3.
  • the one or more processors 1110 are coupled to a computer-readable medium/memory 1140 via a bus 1170.
  • the computer-readable medium/memory 1140 is configured to store instructions D&S Ref. No.: QCM2400303U1WO Qualcomm Ref.
  • No.: 2400303U1WO 29 (e.g., computer-executable code) that when executed by the one or more processors 1110, enable and cause the one or more processors 1110 to perform the method 900 described with respect to FIG. 9, or any aspect related to it, including any operations described in relation to FIG. 9.
  • reference to a processor performing a function of communications device 1100 may include one or more processors performing that function of communications device 1100, such as in a distributed fashion.
  • computer-readable medium/memory 1140 stores code for receiving 1145, code for generating 1150, code for providing 1155, code for executing 1160, and code for demapping 1165.
  • Processing of the code 1145-1165 may enable and cause the communications device 1100 to perform the method 900 described with respect to FIG. 9, or any aspect related to it.
  • the one or more processors 1110 include circuitry configured to implement (e.g., execute) the code stored in the computer-readable medium/memory 1140, including circuitry for receiving 1115, circuitry for generating 1120, circuitry for providing 1125, circuitry for executing 1130, and circuitry for demapping 1135. Processing with circuitry 1115-1135 may enable and cause the communications device 1100 to perform the method 900 described with respect to FIG. 9, or any aspect related to it.
  • means for communicating, transmitting, sending or outputting for transmission may include the transceivers 354, antenna(s) 352, transmit processor 364, TX MIMO processor 366, AI processor 370, and/or controller/processor 380 of the UE 104 illustrated in FIG. 3, transceiver 1175 and/or antenna 1180 of the communications device 1100 in FIG. 11, and/or one or more processors 1110 of the communications device 1100 in FIG. 11.
  • Means for communicating, receiving or obtaining may include the transceivers 354, antenna(s) 352, receive processor 358, AI processor 370, and/or controller/processor 380 of the UE 104 illustrated in FIG. 3, transceiver 1175 and/or antenna 1180 of the communications device 1100 in FIG.
  • FIG.12 depicts aspects of an example communications device 1200.
  • communications device 1200 is a wireless communications device, such as a UE 104, a base station (BS 102/180) and/or a component of a disaggregated base station of FIGs 1-3.
  • the communications device 1200 includes a processing system 1205 coupled to a transceiver 1265 (e.g., a transmitter and/or a receiver).
  • the transceiver 1265 is configured to transmit and receive signals for the communications device 1200 via an antenna 1270, such as the various signals as described herein.
  • the processing system 1205 may be configured to perform processing functions for the communications device 1200, including processing signals received and/or to be transmitted by the communications device 1200.
  • the processing system 1205 includes one or more processors 1210.
  • the one or more processors 1210 may be representative of one or more of receive processor 358, transmit processor 364, TX MIMO processor 366, and/or controller/processor 380, as described with respect to FIG.3.
  • the one or more processors 1210 are coupled to a computer-readable medium/memory 1235 via a bus 1260.
  • the computer-readable medium/memory 1235 is configured to store instructions (e.g., computer-executable code) that when executed by the one or more processors 1210, enable and cause the one or more processors 1210 to perform the method 1000 described with respect to FIG. 10, or any aspect related to it, including any operations described in relation to FIG. 10.
  • instructions e.g., computer-executable code
  • reference to a processor performing a function of communications device 1200 may include one or more processors performing that function of communications device 1200, such as in a distributed fashion.
  • computer-readable medium/memory 1235 stores code for providing 1240, code for generating 1245, code for executing 1250, and code for combining 1255.
  • Processing of the code 1240-1255 may enable and cause the communications device 1200 to perform the method 1000 described with respect to FIG. 10, or any aspect related to it.
  • the one or more processors 1210 include circuitry configured to implement (e.g., execute) the code stored in the computer-readable medium/memory 1235, including circuitry for providing 1215, circuitry for generating 1220, circuitry for executing 1225, and circuitry for combining 1230. Processing with circuitry 1215-1230 may enable and cause the communications device 1200 to perform the method 1000 described with respect to FIG. 10, or any aspect related to it.
  • means for communicating, transmitting, sending or outputting for transmission may include the transceivers 354, antenna(s) 352, transmit D&S Ref.
  • Means for communicating, receiving or obtaining may include the transceivers 354, antenna(s) 352, receive processor 358, AI processor 370, and/or controller/processor 380 of the UE 104 illustrated in FIG. 3, transceiver 1265 and/or antenna 1270 of the communications device 1200 in FIG.
  • Clause 1 A method for wireless communications by an apparatus comprising: receiving signals corresponding to a MIMO channel matrix; generating a first gram matrix from a basis for a first lattice corresponding to a first signal of the received signals; providing the first gram matrix to a neural lattice reduction model comprising an equivariant neural network configured to generate a current extended Gauss move; generating, with the neural lattice reduction model, a current partial changed basis based on the current extended Gauss move and the basis; executing one or more additional iterations of the neural lattice reduction model, wherein each iteration comprises: generating a subsequent gram matrix from the current partial changed basis, providing the subsequent gram matrix to the equivariant neural network to generate a subsequent extended Gauss move, and generating an additional partial changed basis based on
  • Clause 2 The method of Clause 1, wherein combining the current partial changed basis and each of the additional partial changed basis form a first reduced basis for the first lattice.
  • Clause 3 The method of Clause 2, further comprising: generating a second gram matrix from a second basis for a second lattice corresponding to a second signal of the received signals; generating, with the neural lattice reduction model, one or more second partial changed bases for the second lattice; and generating a second reduced basis D&S Ref. No.: QCM2400303U1WO Qualcomm Ref.
  • Clause 4 The method of Clause 3, wherein the apparatus comprises a plurality of antennas, wherein the first signal of the received signals is received by a first antenna of the plurality of antennas and the second signal of the received signals is received by a second antenna of the plurality of antennas.
  • Clause 5 The method of Clause 3, wherein the parallel processing of the neural lattice reduction model is implemented by graphic processing unit batching.
  • Clause 6 The method of Clause 3, further comprising demapping the MIMO channel matrix based on the first reduced basis and the second reduced basis.
  • Clause 7 The method of Clause 2, wherein the first reduced basis is more orthogonal and shorter than the basis for the first lattice corresponding to the MIMO channel matrix.
  • Clause 8 The method of any one of Clauses 1-7, wherein the received signals are distributed across time and frequency.
  • Clause 9 A method for wireless communications by an apparatus comprising: providing a first gram matrix to a neural lattice reduction model; generating, with the neural lattice reduction model, one or more partial changed bases; and generating a first reduced basis based on the one or more partial changed bases.
  • Clause 10 The method of Clause 9, wherein the neural lattice reduction model comprises an equivariant neural network configured to generate a current extended Gauss move.
  • Clause 11 The method of Clause 10, further comprising generating the first gram matrix from a basis for a first lattice corresponding to a first signal of a plurality of received signals, wherein the one or more partial changed bases generated by the neural lattice reduction model is based on at least the current extended Gauss move and the basis.
  • Clause 12 The method of any one of Clauses 9-11, further comprising executing a plurality of additional iterations of the neural lattice reduction model, wherein each iteration comprises: generating a subsequent gram matrix from one of the one or D&S Ref. No.: QCM2400303U1WO Qualcomm Ref. No.: 2400303U1WO 33 more partial changed bases, providing the subsequent gram matrix to the neural lattice reduction model to generate a subsequent extended Gauss move, and generate an additional partial changed basis based on the subsequent extended Gauss move and the one or more partial changed bases.
  • Clause 13 The method of any one of Clauses 9-12, further comprising: providing a second gram matrix from a basis for a second lattice; generating, with the neural lattice reduction model, one or more second partial changed bases for the second lattice; and generating a second reduced basis for the second lattice based on the one or more second partial changed bases, wherein the one or more processors generate the first reduced basis and the second reduced basis through parallel processing of the neural lattice reduction model.
  • Clause 14 The method of Clause 13, wherein the parallel processing of the neural lattice reduction model is implemented by graphic processing unit batching.
  • Clause 15 The method of any one of Clauses 9-14, further comprising: generating the first gram matrix from a basis for a first lattice corresponding to a first signal of a plurality of received signals.
  • Clause 16 The method of Clause 15, wherein the plurality of received signals correspond to a MIMO channel matrix.
  • Clause 17 The method of Clause 16, wherein the first signal of the plurality of received signals is received by a first antenna of a plurality of antennas and a second signal of the plurality of received signals is received by a second antenna of the plurality of antennas.
  • Clause 18 The method of any one of Clauses 9-17, further comprising: combining the one or more partial changed bases to form the first reduced basis for a first lattice.
  • Clause 19 One or more apparatuses, comprising: one or more memories comprising executable instructions; and one or more processors configured to execute the executable instructions and cause the one or more apparatuses to perform a method in accordance with any one of Clauses 1-18.
  • Clause 20 One or more apparatuses, comprising: one or more memories; and one or more processors, coupled to the one or more memories, configured to cause the D&S Ref. No.: QCM2400303U1WO Qualcomm Ref.
  • Clause 21 One or more apparatuses, comprising: one or more memories; and one or more processors, coupled to the one or more memories, configured to perform a method in accordance with any one of Clauses 1-18.
  • Clause 22 One or more apparatuses, comprising means for performing a method in accordance with any one of Clauses 1-18.
  • Clause 23 One or more non-transitory computer-readable media comprising executable instructions that, when executed by one or more processors of one or more apparatuses, cause the one or more apparatuses to perform a method in accordance with any one of Clauses 1-18.
  • Clause 24 One or more computer program products embodied on one or more computer-readable storage media comprising code for performing a method in accordance with any one of Clauses 1-18.
  • Clause 25 A user equipment (UE), comprising: a processing system that includes processor circuitry and memory circuitry that stores code and is coupled with the processor circuitry, the processing system configured to cause the UE to perform a method in accordance with any one of Clauses 1-18.
  • UE user equipment
  • any aspect of the disclosure disclosed herein may be embodied by one or more elements of a claim.
  • the various illustrative logical blocks, modules and circuits described in connection with the present disclosure may be implemented or performed with a general purpose processor, a digital signal processor (DSP), an ASIC, a field programmable gate array (FPGA) or other programmable logic device (PLD), discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein.
  • a general-purpose processor may be a microprocessor, but in the alternative, the processor may be any commercially available processor, controller, microcontroller, or state machine.
  • a processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, a system on a chip (SoC), or any other such configuration.
  • SoC system on a chip
  • “at least one of: a, b, or c” is intended to cover a, b, c, a-b, a-c, b-c, and a-b-c, as well as any combination with multiples of the same element (e.g., a-a, a-a-a, a-a-b, a-a-c, a-b-b, a-c-c, b-b, b-b-b, b-b-c, c-c, and c-c-c or any other ordering of a, b, and c).
  • the term “determining” encompasses a wide variety of actions.
  • determining may include calculating, computing, processing, deriving, investigating, looking up (e.g., looking up in a table, a database or another data structure), ascertaining and the like. Also, “determining” may include receiving (e.g., receiving information), accessing (e.g., accessing data in a memory) and the like. Also, “determining” may include resolving, selecting, choosing, establishing and the like. D&S Ref. No.: QCM2400303U1WO Qualcomm Ref. No.: 2400303U1WO 36 [0193] As used herein, “coupled to” and “coupled with” generally encompass direct coupling and indirect coupling (e.g., including intermediary coupled aspects) unless stated otherwise.
  • a processor is coupled to a memory allows for a direct coupling or a coupling via an intermediary aspect, such as a bus.
  • the methods disclosed herein comprise one or more actions for achieving the methods.
  • the method actions may be interchanged with one another without departing from the scope of the claims.
  • the order and/or use of specific actions may be modified without departing from the scope of the claims.
  • the various operations of methods described above may be performed by any suitable means capable of performing the corresponding functions.
  • the means may include various hardware and/or software component(s) and/or module(s), including, but not limited to a circuit, an application specific integrated circuit (ASIC), or processor.
  • ASIC application specific integrated circuit
  • set and group are intended to include one or more elements, and may be used interchangeably with “one or more.” Where reference is made to one or more elements performing functions (e.g., steps of a method), one element may perform all functions, or more than one element may collectively perform the functions. When more than one element collectively performs the functions, each function need not be performed by each of those elements (e.g., different functions may be performed by different elements) and/or each function need not be performed in whole by only one element (e.g., different elements may perform different sub-functions of a function).

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Data Mining & Analysis (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Software Systems (AREA)
  • Mathematical Analysis (AREA)
  • Computing Systems (AREA)
  • Artificial Intelligence (AREA)
  • Computational Linguistics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Algebra (AREA)
  • Biomedical Technology (AREA)
  • Biophysics (AREA)
  • Databases & Information Systems (AREA)
  • Evolutionary Computation (AREA)
  • General Health & Medical Sciences (AREA)
  • Molecular Biology (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

Certains aspects de la présente divulgation concernent des techniques de communication sans fil par un appareil. Certaines techniques comprennent la réception de signaux correspondant à une matrice de canal MIMO ; la génération d'une première matrice de Gram à partir d'une base pour un premier réseau correspondant à un premier signal des signaux reçus ; la fourniture de la première matrice de Gram à un modèle de réduction de réseau neuronal comprenant un réseau de neurones artificiels équivariant configuré pour générer un déplacement de Gauss étendu actuel ; la génération, avec le modèle de réduction de réseau neuronal, d'une base modifiée actuelle partielle sur la base du déplacement de Gauss étendu actuel et de la base ; l'exécution d'une ou de plusieurs itérations supplémentaires du modèle de réduction de réseau neuronal ; et le démappage de la matrice de canal MIMO sur la base de la combinaison de la base modifiée actuelle partielle et de chacune de la base modifiée partielle supplémentaire générée par chacune de la ou des itérations supplémentaires du modèle de réduction de réseau neuronal.
PCT/US2024/059864 2024-01-11 2024-12-12 Apprentissage profond géométrique pour réduction de réseau Pending WO2025151237A1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US18/410,677 US20250232000A1 (en) 2024-01-11 2024-01-11 Geometric deep learning for lattice reduction
US18/410,677 2024-01-11
US18/410,660 2024-01-11
US18/410,660 US12413270B2 (en) 2024-01-11 2024-01-11 Geometric deep learning for lattice reduction

Publications (1)

Publication Number Publication Date
WO2025151237A1 true WO2025151237A1 (fr) 2025-07-17

Family

ID=94210288

Family Applications (2)

Application Number Title Priority Date Filing Date
PCT/US2024/059864 Pending WO2025151237A1 (fr) 2024-01-11 2024-12-12 Apprentissage profond géométrique pour réduction de réseau
PCT/US2024/059867 Pending WO2025151238A1 (fr) 2024-01-11 2024-12-12 Apprentissage profond géométrique pour réduction de treillis

Family Applications After (1)

Application Number Title Priority Date Filing Date
PCT/US2024/059867 Pending WO2025151238A1 (fr) 2024-01-11 2024-12-12 Apprentissage profond géométrique pour réduction de treillis

Country Status (1)

Country Link
WO (2) WO2025151237A1 (fr)

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
ALMASADEH ALI J ET AL: "Enhanced Deep Learning for Massive MIMO Detection Using Approximate Matrix Inversion", 2022 5TH INTERNATIONAL CONFERENCE ON COMMUNICATIONS, SIGNAL PROCESSING, AND THEIR APPLICATIONS (ICCSPA), IEEE, 27 December 2022 (2022-12-27), pages 1 - 6, XP034280750, DOI: 10.1109/ICCSPA55860.2022.10019100 *
LI YI-MEI ET AL: "Deep-Learning-Based Lattice Reduction Preprocessing for Time-Correlated MIMO Systems", 2023 ASIA PACIFIC SIGNAL AND INFORMATION PROCESSING ASSOCIATION ANNUAL SUMMIT AND CONFERENCE (APSIPA ASC), IEEE, 31 October 2023 (2023-10-31), pages 230 - 237, XP034471731, DOI: 10.1109/APSIPAASC58517.2023.10317521 *
VINCENT CORLAY ET AL: "Neural network approaches to point lattice decoding", ARXIV.ORG, CORNELL UNIVERSITY LIBRARY, 201 OLIN LIBRARY CORNELL UNIVERSITY ITHACA, NY 14853, 8 October 2021 (2021-10-08), XP091065095 *

Also Published As

Publication number Publication date
WO2025151238A1 (fr) 2025-07-17

Similar Documents

Publication Publication Date Title
US20240306000A1 (en) Framework for semantic encoding and decoding in a wireless communication network
WO2024016145A1 (fr) Indication d'un motif de signal de référence d'informations d'état de canal pour des schémas d'informations d'état de canal assistés par apprentissage automatique
WO2024066793A1 (fr) Sélection et commutation de modèle
WO2024045147A1 (fr) Collecte de données avec estimation de canal idéale et non idéale
US12439396B2 (en) Transmission alignment for mini-slots and mixed numerology component carriers
US12063082B2 (en) Pseudo singular value decomposition (SVD) precoder
US12200691B2 (en) Repetition cancellation in full duplex communications
US20240381267A1 (en) Implicit indication of transmission power level for channel state information reference signals
US12395388B2 (en) Interference randomization in orthogonal cover codes
US20240237017A1 (en) Sequential orbital angular momentum mode configuration and indication
US12170966B2 (en) Frequency hopping adaptation for inter-slot physical uplink shared channel repetition
WO2023236003A1 (fr) Multiplexage spatial par dispositif de rétrodiffusion à antennes multiples
US12413270B2 (en) Geometric deep learning for lattice reduction
US20250232000A1 (en) Geometric deep learning for lattice reduction
WO2025151237A1 (fr) Apprentissage profond géométrique pour réduction de réseau
US20240406047A1 (en) Radio unit remote interference management reference signal transmission
US20260046091A1 (en) Demodulation Reference Signal Bundle for Physical Downlink Control Channel
US12192040B1 (en) Lattice reduction transformation matrix calculation and signaling
US20250030472A1 (en) Correlation model for a frequency range 2 multi-receiver system with simultaneous reception
WO2025081294A1 (fr) Conception de groupe d'antennes de réception pour réduction de complexité d'ue
US20260031838A1 (en) Structure of spatially coupled multiple-input multiple-output communications
US20250088239A1 (en) Channel calculations based on channel state information reference signal (csi-rs) and sounding reference signal (srs)
WO2025160721A1 (fr) Combinaison de ressources de signal de référence d'informations d'état de canal (csi-rs)
US20250317929A1 (en) DEMODULATION REFERENCE SIGNAL (DMRS) SHARING ACROSS USER EQUIPMENTS (UEs)
WO2024026614A1 (fr) Schéma mixte pour approximations précises dans la mise en forme de constellation

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 24834181

Country of ref document: EP

Kind code of ref document: A1