WO2026038469A1 - Dispositif à semi-conducteur, dispositif de détection de lumière et appareil électronique - Google Patents

Dispositif à semi-conducteur, dispositif de détection de lumière et appareil électronique

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Publication number
WO2026038469A1
WO2026038469A1 PCT/JP2025/027156 JP2025027156W WO2026038469A1 WO 2026038469 A1 WO2026038469 A1 WO 2026038469A1 JP 2025027156 W JP2025027156 W JP 2025027156W WO 2026038469 A1 WO2026038469 A1 WO 2026038469A1
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WO
WIPO (PCT)
Prior art keywords
transistor
semiconductor substrate
gate electrode
photodetector
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/JP2025/027156
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English (en)
Japanese (ja)
Inventor
慎 小林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Semiconductor Solutions Corp
Original Assignee
Sony Semiconductor Solutions Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Semiconductor Solutions Corp filed Critical Sony Semiconductor Solutions Corp
Publication of WO2026038469A1 publication Critical patent/WO2026038469A1/fr
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/10—Integrated devices
    • H10F39/12—Image sensors
    • H10F39/18—Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors

Definitions

  • This disclosure relates to, for example, semiconductor devices, photodetector devices, and electronic devices.
  • Patent Document 1 discloses a solid-state imaging device having a vertical readout gate electrode and planar gate electrodes of other transistors on the surface of a substrate.
  • a semiconductor device includes a semiconductor substrate having opposing first and second surfaces, a first transistor provided on the first surface of the semiconductor substrate, and a second transistor provided on the first surface of the semiconductor substrate, extending in the thickness direction of the semiconductor substrate as a first direction, with one end of the second transistor in the extending direction embedded in the semiconductor substrate and the other end including a vertical portion formed at a different position in the first direction from the top surface of the gate electrode of the first transistor.
  • An optical detection device includes a semiconductor substrate having opposing first and second surfaces and having a photoelectric conversion unit embedded in each pixel; a first transistor provided on the first surface of the semiconductor substrate; and a second transistor provided on the first surface of the semiconductor substrate, extending in the thickness direction of the semiconductor substrate as a first direction, with one end of the second transistor in the extending direction embedded in the semiconductor substrate and the other end having a gate electrode including a vertical portion formed at a position different from the top surface of the gate electrode of the first transistor in the first direction.
  • An electronic device includes the above-described photodetector according to one embodiment of the present disclosure.
  • a first transistor and a second transistor are provided on a first surface of a semiconductor substrate.
  • the second transistor has a gate electrode including a vertical portion that extends in the thickness direction of the semiconductor substrate, with one end of the extension direction being embedded in the semiconductor substrate.
  • the other end of the vertical portion of the gate electrode of this second transistor is formed at a different position in the first direction from the top surface of the gate electrode of the first transistor. This relaxes layout constraints between the first transistor and the second transistor.
  • FIG. 1 is a schematic diagram illustrating an example of a cross-sectional configuration of a photodetector according to an embodiment of the present disclosure.
  • FIG. 2 is a block diagram showing the overall configuration of the photodetector shown in FIG.
  • FIG. 3 is an equivalent circuit diagram of the unit pixel shown in FIG.
  • FIG. 4 is a schematic diagram showing an example of a planar configuration corresponding to Sec1 of the photodetector shown in FIG. 2A to 2C are schematic cross-sectional views for explaining an example of a method for manufacturing the photodetector shown in FIG. 1 .
  • FIG. 5B is a schematic cross-sectional view showing a step subsequent to FIG. 5A.
  • FIG. 5C is a schematic cross-sectional view showing a step subsequent to FIG.
  • FIG. 5D is a schematic cross-sectional view showing a step subsequent to FIG. 5C.
  • FIG. 5E is a schematic cross-sectional view showing a step subsequent to FIG. 5D.
  • FIG. 5F is a schematic cross-sectional view showing a step subsequent to FIG. 5E.
  • FIG. 5G is a schematic cross-sectional view showing a step subsequent to FIG. 5F.
  • FIG. 5H is a schematic cross-sectional view showing a step subsequent to FIG. 5G.
  • FIG. 5I is a schematic cross-sectional view showing a step subsequent to FIG. 5H.
  • FIG. 6 is a schematic diagram showing an example of a cross-sectional configuration of a main part of a solid-state imaging device as a comparative example.
  • FIG. 6 is a schematic diagram showing an example of a cross-sectional configuration of a main part of a solid-state imaging device as a comparative example.
  • FIG. 6 is a schematic diagram showing an example of a cross-
  • FIG. 7 is a schematic diagram showing an example of a planar configuration corresponding to Sec2 of the solid-state imaging device shown in FIG.
  • FIG. 8 is a schematic diagram illustrating an example of a planar configuration of a photodetector according to a first modification of the present disclosure.
  • FIG. 9 is a schematic diagram showing an example of a planar configuration of a photodetector as a comparative example.
  • FIG. 10 is a schematic diagram illustrating an example of a planar configuration of a photodetector according to Modification 2 of the present disclosure.
  • FIG. 11 is a schematic diagram illustrating another example of the planar configuration of the photodetector according to the second modification of the present disclosure.
  • FIG. 12 is a schematic diagram illustrating an example of a planar configuration of a photodetector according to a third modification of the present disclosure.
  • FIG. 13 is a schematic diagram illustrating another example of the planar configuration of the photodetector according to the third modification of the present disclosure.
  • FIG. 14 is a schematic diagram illustrating an example of a planar configuration of a photodetector according to a fourth modification of the present disclosure.
  • FIG. 15 is a schematic diagram illustrating another example of the planar configuration of a photodetector according to the fourth modification of the present disclosure.
  • FIG. 16 is a diagram illustrating an example of a schematic configuration of a photodetector according to a fifth modification of the present disclosure.
  • FIG. 17 is a block diagram showing an example of the configuration of an electronic device having the photodetector shown in FIG. 2 and other figures.
  • FIG. 18A is a schematic diagram showing an example of the overall configuration of a light detection system using the light detection device shown in FIG. 2 and the like.
  • FIG. 18B is a diagram illustrating an example of a circuit configuration of the light detection system illustrated in FIG. 18A.
  • FIG. 19 is a block diagram showing an example of a schematic configuration of a vehicle control system.
  • FIG. 20 is an explanatory diagram showing an example of the installation positions of the outside-of-vehicle information detection unit and the imaging unit.
  • FIG. 21 is a diagram showing an example of a schematic configuration of an endoscopic surgery system.
  • FIG. 22 is a block diagram showing an example of the functional configuration of the camera head and the CCU.
  • Embodiment Example of a semiconductor device in which the upper end of the gate electrode of one of two transistors including a vertical gate electrode is provided at a different height from the upper surface of the gate electrode of the other transistor
  • Modifications 2-1. Modification 1 (another example of the configuration of the photodetector) 2-2. Modification 2 (another example of the configuration of the photodetector) 2-3.
  • Modification 3 (another example of the configuration of the photodetector) 2-4.
  • Modification 4 (another example of the configuration of the photodetector) 2-5.
  • Modification 5 (another example of the configuration of the photodetector) 3.
  • Application examples 4. Application examples
  • Embodiment 1 is a schematic diagram illustrating an example of a cross-sectional configuration of a photodetector 1 as an example of a semiconductor device according to an embodiment of the present disclosure.
  • the photodetector 1 is, for example, a complementary metal oxide semiconductor (CMOS) image sensor used in electronic devices such as digital still cameras and video cameras, and has a pixel section (pixel array section 100A) in which a plurality of pixels (unit pixels P) are two-dimensionally arranged in a matrix as an imaging area.
  • CMOS complementary metal oxide semiconductor
  • the photodetector 1 is, for example, a so-called back-illuminated photodetector in this CMOS image sensor or the like.
  • the photodetector 1 has a semiconductor substrate 10 having opposing front and back surfaces 10S1 and 10S2.
  • a pixel transistor 220 and a transfer transistor TR are provided on the front surface 10S1 of the semiconductor substrate 10.
  • the transfer transistor TR is a so-called vertical transistor, and has a gate electrode 231 that extends in the thickness direction of the semiconductor substrate 10 (here, the Z-axis direction) and includes a vertical portion 231A with one end in the extension direction (Z-axis direction) embedded in the semiconductor substrate 10.
  • the other end (surface 231S) of this vertical portion 231A is formed at a different height in the Z-axis direction from the upper surface 221S of the gate electrode 221 of the pixel transistor 220.
  • the photodetector device 1 corresponds to a specific example of a "semiconductor device” as an embodiment of the present disclosure.
  • the semiconductor substrate 10 corresponds to a specific example of a “semiconductor substrate” as an embodiment of the present disclosure.
  • the pixel transistor 220 corresponds to a specific example of a "first transistor” as an embodiment of the present disclosure.
  • the transfer transistor TR corresponds to a specific example of a "second transistor” as an embodiment of the present disclosure
  • the vertical portion 231A corresponds to a specific example of a "vertical portion” as an embodiment of the present disclosure.
  • [Schematic configuration of the photodetector] 2 shows an example of the overall configuration of the photodetector 1.
  • the photodetector 1 is, for example, a CMOS image sensor used in electronic devices such as digital still cameras and video cameras, and has a pixel array section 100A as an imaging area in which a plurality of unit pixels P are two-dimensionally arranged in a matrix.
  • the photodetector 1 captures incident light (image light) from a subject via an optical lens system (not shown), converts the amount of incident light imaged on the imaging surface into an electrical signal on a pixel-by-pixel basis, and outputs it as a pixel signal.
  • the photodetector 1 has a pixel array section 100A as an imaging area on a semiconductor substrate 10, and also has, in the peripheral area of this pixel array section 100A, for example, a vertical drive circuit 101, a column signal processing circuit 102, a horizontal drive circuit 103, an output circuit 104, a control circuit 105, and input/output terminals 106.
  • a pixel drive line Lread (specifically, a row selection line and a reset control line) is wired for each pixel row, and a vertical signal line Lsig is wired for each pixel column.
  • the pixel drive line Lread transmits drive signals for reading signals from the pixels.
  • One end of the pixel drive line Lread is connected to an output terminal of the vertical drive circuit 101 corresponding to each row.
  • the vertical drive circuit 101 is a pixel drive unit that is composed of a shift register, address decoder, etc., and drives each unit pixel P of the pixel array unit 100A, for example, row by row.
  • the signals output from each unit pixel P of a pixel row selected and scanned by the vertical drive circuit 101 are supplied to the column signal processing circuit 102 through each vertical signal line Lsig.
  • the column signal processing circuit 102 is composed of amplifiers, horizontal selection switches, etc., provided for each vertical signal line Lsig.
  • the horizontal drive circuit 103 is composed of a shift register, address decoder, etc., and scans and drives each horizontal selection switch of the column signal processing circuit 102 in sequence. Through selective scanning by this horizontal drive circuit 103, the signals of each pixel transmitted through each vertical signal line Lsig are output in sequence to the horizontal signal line 107, and transmitted to the outside of the semiconductor substrate 10 via this horizontal signal line 107.
  • the output circuit 104 processes and outputs signals sequentially supplied from each of the column signal processing circuits 102 via the horizontal signal line 107.
  • the output circuit 104 may perform only buffering, or it may perform black level adjustment, column variation correction, and various digital signal processing, for example.
  • the circuit portion consisting of the vertical drive circuit 101, column signal processing circuit 102, horizontal drive circuit 103, horizontal signal line 107, and output circuit 104 may be formed directly on the semiconductor substrate 10, or may be disposed on an external control IC. These circuit portions may also be formed on another substrate connected by a cable or the like.
  • the control circuit 105 receives clocks and data instructing the operating mode from outside the semiconductor substrate 10, and outputs data such as internal information of the photodetector 1.
  • the control circuit 105 also has a timing generator that generates various timing signals, and controls the driving of peripheral circuits such as the vertical drive circuit 101, column signal processing circuit 102, and horizontal drive circuit 103 based on the various timing signals generated by the timing generator.
  • the input/output terminal 106 is used to exchange signals with the outside world.
  • FIG. 3 shows an example of a unit pixel P and a readout circuit 200.
  • “shared” means that the outputs of the four unit pixels P are input to a common readout circuit 200.
  • Each unit pixel P has common components.
  • an identification number (1, 2, 3, 4) is added to the end of the reference numeral for the component of each unit pixel P.
  • an identification number will be added to the end of the reference numeral for the component of each unit pixel P, but when it is not necessary to distinguish the components of each unit pixel P from one another, the identification number at the end of the reference numeral for the component of each unit pixel P will be omitted.
  • Each unit pixel P has, for example, a photodiode PD (photoelectric conversion unit 11), a transfer transistor TR electrically connected to the photoelectric conversion unit 11, and a floating diffusion FD that temporarily holds the charge output from the photoelectric conversion unit 11 via the transfer transistor TR.
  • the photoelectric conversion unit 11 corresponds to a specific example of a "photoelectric conversion unit” as an embodiment of the present disclosure.
  • the floating diffusion FD corresponds to a specific example of a "charge holding unit” as an embodiment of the present disclosure.
  • the photoelectric conversion unit 11 performs photoelectric conversion to generate charge according to the amount of light received.
  • the cathode of the photoelectric conversion unit 11 is electrically connected to the source of the transfer transistor TR, and the anode of the photoelectric conversion unit 11 is electrically connected to a reference potential line (e.g., ground).
  • the drain of the transfer transistor TR is electrically connected to the floating diffusion FD, and the gate of the transfer transistor TR is electrically connected to a pixel drive line 42 (see Figure 16).
  • the transfer transistor TR is, for example, a CMOS (Complementary Metal Oxide Semiconductor) transistor.
  • the floating diffusions FD of each unit pixel P that shares one readout circuit 200 are electrically connected to each other and to the input terminal of the common readout circuit 200.
  • the readout circuit 200 includes, for example, a reset transistor RST, a selection transistor SEL, and an amplification transistor AMP.
  • the selection transistor SEL may be omitted if necessary.
  • the source of the reset transistor RST (the input terminal of the readout circuit 200) is electrically connected to the floating diffusion FD, and the drain of the reset transistor RST is electrically connected to the power supply line VDD and the drain of the amplification transistor AMP.
  • the gate of the reset transistor RST is electrically connected to the pixel drive line 42.
  • the source of the amplification transistor AMP is electrically connected to the drain of the selection transistor SEL, and the gate of the amplification transistor AMP is electrically connected to the source of the reset transistor RST.
  • the source of the selection transistor SEL (the output terminal of the readout circuit 200) is electrically connected to the vertical signal line 43 (see Figure 16), and the gate of the selection transistor SEL is electrically connected to the pixel drive line 42.
  • the transfer transistor TR When the transfer transistor TR is turned on, it transfers the charge of the photoelectric conversion unit 11 to the floating diffusion FD.
  • the gate (gate electrode 231) of the transfer transistor TR extends, for example, as shown in FIG. 1, from the surface 10S1 of the semiconductor substrate 10, through the p-well layer 111, to a depth reaching the n-type semiconductor region 112.
  • the reset transistor RST resets the potential of the floating diffusion FD to a predetermined potential.
  • the reset transistor RST When the reset transistor RST is turned on, it resets the potential of the floating diffusion FD to the potential of the power supply line VDD.
  • the selection transistor SEL controls the output timing of the pixel signal from the readout circuit 200.
  • the amplification transistor AMP generates a pixel signal with a voltage corresponding to the level of the charge held in the floating diffusion FD.
  • the amplification transistor AMP forms a source-follower amplifier and outputs a pixel signal with a voltage corresponding to the level of the charge generated in the photoelectric conversion unit 11.
  • the amplifier transistor AMP amplifies the potential of the floating diffusion FD and outputs a voltage corresponding to that potential to the column signal processing circuit 512 (see FIG. 16) via the vertical signal line 43.
  • the reset transistor RST, the amplifier transistor AMP, and the select transistor SEL are, for example, CMOS transistors.
  • the selection transistor SEL may be provided between the power supply line VDD and the amplification transistor AMP.
  • the drain of the reset transistor RST is electrically connected to the power supply line VDD and the drain of the selection transistor SEL.
  • the source of the selection transistor SEL is electrically connected to the drain of the amplification transistor AMP, and the gate of the selection transistor SEL is electrically connected to the pixel drive line 42.
  • the source of the amplification transistor AMP (the output terminal of the readout circuit 200) is electrically connected to the vertical signal line 43, and the gate of the amplification transistor AMP is electrically connected to the source of the reset transistor RST.
  • an FD conversion gain switching transistor FDG may be provided between the source of the reset transistor RST and the gate of the amplification transistor AMP.
  • the FD conversion gain switching transistor FDG is used to switch the conversion efficiency.
  • pixel signals are small when shooting in dark locations.
  • Q CV
  • the capacitance of the floating diffusion FD FD capacitance C
  • the V when converted to voltage by the amplifier transistor AMP will be small.
  • the FD capacitance C is not large, the floating diffusion FD will not be able to fully absorb the charge from the photoelectric conversion unit 11.
  • the FD capacitance C must be large.
  • the FD conversion gain switching transistor FDG when the FD conversion gain switching transistor FDG is turned on, the gate capacitance of the FD conversion gain switching transistor FDG increases, increasing the overall FD capacitance C. On the other hand, when the FD conversion gain switching transistor FDG is turned off, the overall FD capacitance C decreases. In this way, by switching the FD conversion gain switching transistor FDG on and off, the FD capacitance C can be varied and the conversion efficiency can be switched.
  • the photodetector 1 is, for example, a back-illuminated photodetector, and has, as an imaging area, a pixel array section 100A in which a plurality of unit pixels P are two-dimensionally arranged in a matrix.
  • Each unit pixel P has a stacked configuration, as shown in Fig. 1, of a semiconductor substrate 10 having a front surface 10S1 and a back surface 10S2 facing each other, a multilayer wiring layer 20 provided on the front surface 10S1 side of the semiconductor substrate 10, and an optical member 30 provided on the back surface 10S2 side of the semiconductor substrate 10, which is the light incident side S1.
  • the semiconductor substrate 10 is made of, for example, a silicon substrate.
  • the semiconductor substrate 10 has, for example, a p-well layer 111 in and near a portion of the surface 10S1, and an n-type semiconductor region 112 in other regions (for example, regions deeper than the p-well layer 111).
  • a p-n junction photodiode PD made up of the p-well layer 111 and the n-type semiconductor region 112 is embedded in the semiconductor substrate 10 as the photoelectric conversion unit 11.
  • a floating diffusion (FD) 12 On the surface 10S1 of the semiconductor substrate 10, a floating diffusion (FD) 12, a transfer transistor TR, and a plurality of pixel transistors 220 are provided, as will be described in detail below.
  • the FD 12 is composed of, for example, an n-type semiconductor region.
  • the semiconductor substrate 10 is provided with an isolation portion 13 that isolates a plurality of unit pixels P, which are arranged two-dimensionally in a matrix.
  • the isolation portion 13 extends in the thickness direction (Z-axis direction) of the semiconductor substrate 10.
  • the isolation portion 13 is provided to separate adjacent unit pixels P from each other and has, for example, a lattice-like planar shape.
  • the isolation portion 13 electrically and optically isolates adjacent unit pixels P from each other.
  • the isolation portion 13 includes, for example, a light-shielding film and an insulating film.
  • the light-shielding film may be made of a metal material such as tungsten (W). A predetermined potential may be applied to the light-shielding film.
  • the insulating film is provided between the light-shielding film and the p-well layer 111 and n-type semiconductor region 112.
  • the insulating film is made of, for example, silicon oxide (SiO).
  • the isolation portion 13 has, for example, a DTI (Deep Trench Isolation) structure provided from the back surface 10S2 side of the semiconductor substrate 10. Alternatively, the isolation portion 13 may have a full trench isolation (FTI) structure that penetrates the semiconductor substrate 10.
  • DTI Deep Trench Isolation
  • FTI full trench isolation
  • the semiconductor substrate 10 is provided with, for example, a first pinning region 113 and a second pinning region 114.
  • the first pinning region 113 is provided near the back surface 10S2 of the semiconductor substrate 10, and is disposed between the n-type semiconductor region 112 and the fixed charge film 14 described below.
  • the second pinning region 114 is provided on the side of the isolation portion 13, specifically, between the isolation portion 13 and the p-well layer 111 or the n-type semiconductor region 112.
  • the first pinning region 113 and the second pinning region 114 are formed, for example, from p-type semiconductor regions.
  • a fixed charge film 14 having, for example, a negative fixed charge is provided between the semiconductor substrate 10 and the isolation portion 13 and on the back surface 10S2 of the semiconductor substrate 10.
  • a first pinning region 113 and a second pinning region 114 of the hole accumulation layer are formed at the interface between the semiconductor substrate 10 and the isolation portion 13 and on the back surface 10S2 of the semiconductor substrate 10 due to an electric field induced by the fixed charge film 14. This suppresses the generation of dark current due to interface states between the semiconductor substrate 10 and the isolation portion 13 and on the back surface 10S2 of the semiconductor substrate 10.
  • the fixed charge film 14 is formed, for example, from an insulating film having a negative fixed charge. Examples of materials for insulating films having a negative fixed charge include hafnium oxide (HfO), zirconium oxide (ZrO), aluminum oxide (AlO), titanium oxide (TiO), and tantalum oxide (TaO).
  • the multilayer wiring layer 20 has a configuration in which, for example, gate wiring layers 22, 23 and wiring layers 24, 25 are stacked with an interlayer insulating layer 21 between them.
  • the multilayer wiring layer 20 also includes, for example, a vertical drive circuit 101, a column signal processing circuit 102, a horizontal drive circuit 103, an output circuit 104, a control circuit 105, and input/output terminals 106.
  • the interlayer insulating layer 21 is formed, for example, from a single layer film made of one of silicon oxide (SiO), tetraethoxysilane (TEOS), silicon nitride (SiN), and silicon oxynitride (SiON), or a laminate film made of two or more of these materials.
  • SiO silicon oxide
  • TEOS tetraethoxysilane
  • SiN silicon nitride
  • SiON silicon oxynitride
  • the gate wiring layers 22, 23 and the wiring layers 24, 25 are formed using, for example, aluminum (Al), copper (Cu), or tungsten (W).
  • the gate wiring layers 22, 23 may be formed using polysilicon (Poly-Si) or amorphous silicon doped with impurities.
  • an optical member 30 including, for example, a protective layer 31, a color filter layer 32, and a light-receiving lens 33 is provided.
  • the protective layer 31 protects the light incident side S1 (rear surface 10S2) of the semiconductor substrate 10 and also flattens that surface.
  • the protective layer 31 is formed using, for example, silicon oxide (SiO) or silicon nitride (SiN).
  • a light-shielding film may be provided within the protective layer 31 to prevent light obliquely incident on the color filter layer 32 from leaking into adjacent unit pixels P that detect light of different wavelengths.
  • the light-shielding film is provided, for example, above the separation section 13 and, like the separation section 13, is provided in a grid pattern in plan view.
  • the light-shielding film may be made of a metal material such as tungsten (W).
  • the light-shielding film may be made of a metal compound such as TiN.
  • the light-shielding film may be formed, for example, as a single layer film or a laminated film.
  • the color filter layer 32 selectively transmits light of a specific wavelength.
  • the color filter layer 32 has a red filter 32R that selectively transmits red light (R), a green filter 32G that selectively transmits green light (G), and a blue filter 32B that selectively transmits blue light (B).
  • the color filter layer 32 may also have filters that selectively transmit cyan, magenta, and yellow, respectively.
  • Each color filter 32R, 32G, 32B is provided for each unit pixel P, for example. Specifically, for four unit pixels P arranged in, for example, 2 rows x 2 columns, two green filters 32G are arranged diagonally, and one red filter 32R and one blue filter 32B are arranged on the orthogonal diagonal.
  • the unit pixels (red pixel Pr, green pixel Pg, and blue pixel Pb) provided with each color filter detect the corresponding color light. That is, in the pixel array section 100A, the unit pixels (red pixel Pr, green pixel Pg, and blue pixel Pb) that detect red light (R), green light (G), and blue light (B), respectively, are arranged in a Bayer pattern.
  • the color filter layer 32 can be formed using, for example, a pigment or dye.
  • the film thickness of the color filter layer 32 may vary for each color, taking into account the color reproducibility and sensor sensitivity of the spectral distribution. Note that for black and white pixels, a layer made of a transparent material can be considered the color filter layer 32. For infrared pixels, a layer made of a material that selectively transmits infrared light can be considered the color filter layer 32.
  • the light-receiving lens 33 is provided, for example, to cover the entire surface of the pixel array section 100A and has multiple microlenses on its surface.
  • the microlenses focus light incident from above toward the back surface 10S2 of the semiconductor substrate 10, which serves as the light-receiving surface, and are provided for each unit pixel P, as shown in FIG. 1, for example.
  • the light-receiving lens 33 is formed, for example, using a high-refractive index material, specifically, an inorganic material such as silicon nitride (SiN).
  • the light-receiving lens 33 may also be formed using a high-refractive index organic material such as an episulfide resin, a titanium compound, or a resin thereof.
  • the shape of the on-chip lens 25L is not particularly limited, and various lens shapes such as a hemispherical or semi-cylindrical shape can be used.
  • Fig. 4 is a schematic diagram showing an example of the planar configuration of the surface 10S1 of the semiconductor substrate 10 corresponding to Sec1 shown in Fig. 1.
  • Fig. 1 shows a cross section corresponding to line II' shown in Fig. 4.
  • the pixel array section 100A has a plurality of unit pixels P two-dimensionally arranged in a matrix. More specifically, a pixel sharing unit U including a plurality of pixels (here, four unit pixels P arranged in two rows and two columns) serves as a repeating unit, and these are repeatedly arranged in an array consisting of row and column directions.
  • one FD12 is arranged in the center of the pixel sharing unit U. Specifically, one FD12 is provided near the intersection of four unit pixels P1, P2, P3, and P4, which are arranged in two rows and two columns and make up the pixel unit. The FD12 is electrically connected to each of these unit pixels P1, P2, P3, and P4. A transfer transistor Tr is provided in each of the unit pixels P1, P2, P3, and P4 that make up the pixel sharing unit U.
  • the pixel transistor 220 is a collective term for multiple transistors that make up the readout circuit 200, and corresponds to, for example, the reset transistor RST, the selection transistor SEL, the amplification transistor AMP, and the FD conversion gain switching transistor FDG.
  • a readout circuit 200 is provided for each pixel sharing unit U, and the multiple pixel transistors 220 (reset transistor RST, selection transistor SEL, amplification transistor AMP, and FD conversion gain switching transistor FDG) that make up this readout circuit are arranged in pairs in the Y-axis direction between pixel sharing units U adjacent to each other in the X-axis direction, for example, as shown in FIG. 4 .
  • the transfer transistor TR is a so-called vertical transistor and has a gate electrode 231 including a vertical portion 231A extending in the Z-axis direction and a horizontal portion 231B perpendicular to the vertical portion 231A. A portion of the vertical portion 231A is embedded in the semiconductor substrate 10.
  • the pixel transistor 220 is a so-called planar transistor and has a gate electrode 221 provided on the surface 10S1 of the semiconductor substrate 10. Note that a gate insulating film (not shown) is provided on the surface 10S1 of the semiconductor substrate 10. Sidewalls 222 are provided on the sides of the gate electrode 221.
  • the sidewalls 222 are made of, for example, silicon nitride (SiN).
  • the gate electrode 231 of the transfer transistor TR is formed at a different position in the Z-axis direction from the gate electrode 221 of the pixel transistor 220.
  • the other end (surface 231S) of the vertical portion 231A extending in the Z-axis direction of the gate electrode 231 of the transfer transistor TR, opposite to the one end embedded in the semiconductor substrate 10, is formed at a different height in the Z-axis direction from the upper surface 221S of the gate electrode 221 of the pixel transistor 220.
  • the gate electrode 221 of the pixel transistor 220 is covered with the interlayer insulating layer 21, and the horizontal portion 231B of the gate electrode 231 of the transfer transistor TR, which is perpendicular to the vertical portion 231A, is provided on the interlayer insulating layer 21 that covers the gate electrode 221.
  • the gate electrode 231 of the transfer transistor TR is formed in a different process from the gate electrode 221 of the pixel transistor 220.
  • the gate electrode 231 of the transfer transistor TR is formed by forming the gate electrode 221 of the pixel transistor 220, forming an interlayer insulating layer 21 that covers the gate electrode 221, and then forming a contact (e.g., via V1) for the gate electrode 221, etc., in the process of forming the vertical portion 231A of the gate electrode 231. This improves the degree of freedom in the layout design of the gate electrode 231 of the transfer transistor TR and the gate electrode 221 of the pixel transistor 220.
  • Method of manufacturing the photodetector 5A to 5I show an example of a method for manufacturing the transfer transistor TR of the photodetector 1 shown in FIG.
  • an n-type semiconductor region that constitutes FD 12 is formed on the surface 10S1 of the semiconductor substrate 10, along with the gate electrode 221 and sidewall 222 of the pixel transistor 220.
  • an interlayer insulating layer 21 that covers the gate electrode 221 is formed using, for example, chemical vapor deposition (CVD), and then the surface of the interlayer insulating layer 21 is planarized using chemical mechanical polishing (CMP).
  • a trench H is formed by photolithography and etching, reaching into the semiconductor substrate 10.
  • an oxide film 115 is formed on the side surface of the trench H formed in the semiconductor substrate 10 by in-situ steam generation (ISSG) oxidation.
  • p-type impurities e.g., boron (B)
  • B boron
  • FIG. 5E the oxide film 115 is removed by, for example, wet etching, and then a gate oxide film 16 is formed on the side and bottom surfaces of the trench H by, for example, ISSG oxidation, and the impurities in the p-type layer 15 are activated.
  • an amorphous silicon film doped with, for example, an n-type impurity (e.g., phosphorus (P)) or a p-type impurity (e.g., boron (B)) is buried in the trench H using, for example, CVD, to form vertical portion 231A and horizontal portion 231B.
  • an n-type impurity e.g., phosphorus (P)
  • a p-type impurity e.g., boron (B)
  • an interlayer insulating layer 21 is further formed on the horizontal portion 231B of the gate electrode 231, and then vias V1 and V2 are formed that reach the gate electrode 221 and the gate electrode 231, respectively, as shown in FIG. 5I.
  • the vertical portion 231A of the transfer transistor TR which is a so-called vertical transistor, has one end embedded in the semiconductor substrate 10 and the other end (surface 231S) thereof opposite to the other end (surface 231S) is formed at a different height in the Z-axis direction from the upper surface 221S of the gate electrode 221 of the pixel transistor 220. This alleviates layout restrictions between the pixel transistor 220 and the transfer transistor TR. This is described below.
  • Figure 6 is a schematic representation of an example of the cross-sectional configuration of the main parts of a solid-state imaging device (solid-state imaging device 300) having a vertical readout gate electrode 331 and a planar gate electrode 221 of another transistor on the surface of a substrate as described above.
  • Figure 7 is a schematic representation of an example of the planar configuration corresponding to Sec2 of the solid-state imaging device 300 shown in Figure 6.
  • the area of the horizontal portion 331B of the vertical readout gate electrode needs to be increased to account for variations in the formation of the contact (via V4) that connects the vertical readout gate electrode 331 to the metal wiring layer.
  • constraints on layout and design rules that take into account the electric field between the transfer transistor having the vertical readout gate electrode 331 and the n-type semiconductor region that constitutes FD12, and the electric field between the transfer transistor having the vertical readout gate electrode 331 and other transistors (for example, the reset transistor RST), are factors that hinder pixel miniaturization.
  • the vertical portion 231A of the transfer transistor TR which is a so-called vertical transistor, has its other end (surface 231S) opposite to its one end embedded in the semiconductor substrate 10, formed at a different height in the Z-axis direction from the upper surface 221S of the gate electrode 221 of the pixel transistor 220.
  • the vertical portion 231A of the transfer transistor TR is formed in the process of forming a contact (e.g., via V1) for the gate electrode 221, etc., after forming the gate electrode 221 of the pixel transistor 220 and then forming the interlayer insulating layer 21 that covers the gate electrode 221.
  • the distance W1 between the gate electrode 231 of the transfer transistor TR and the gate electrode 221 of the pixel transistor arranged nearby is greater than the distance W3 between the vertical readout gate electrode 331 and the planar gate electrode 221 of another transistor in the solid-state imaging device 300 shown in Figures 6 and 7. This relaxes layout constraints between the pixel transistor 220 and the transfer transistor TR.
  • the distance W2 between the gate electrode 231 of the transfer transistor TR and the FD12 formed nearby is greater than the distance W4 between the vertical readout gate electrode 331 and the FD12 in the solid-state imaging device 300 shown in Figures 6 and 7. This relaxes layout constraints between the FD12 and the transfer transistor TR.
  • the photodetector device 1 of this embodiment allows for greater freedom in the layout design of the gate electrode 231 of the transfer transistor TR and the gate electrode 221 of the pixel transistor 220, making it possible to achieve, for example, miniaturization of pixels.
  • the distance W1 between the gate electrode 231 of the transfer transistor TR and the gate electrode 221 of the pixel transistor arranged nearby, and the distance W2 between the gate electrode 231 of the transfer transistor TR and the FD 12 formed nearby, are increased, and the formation area of the pixel transistor can be increased accordingly. This makes it possible to reduce noise.
  • FIG. 8 is a schematic diagram illustrating another example of the planar configuration of the surface 10S1 of the semiconductor substrate 10 as a photodetector (photodetector 1A) according to Modification 1 of the present disclosure, which corresponds to Sec1 of the photodetector 1 shown in Fig. 1.
  • Fig. 9 is a schematic diagram illustrating an example of the planar configuration of the surface 10S1 of the semiconductor substrate 10 in a solid-state imaging device 300A having a general configuration, which corresponds to the photodetector 1A shown in Fig. 8.
  • the unit pixel P has a rectangular shape with its long side in the Y-axis direction. Furthermore, in the photodetector 1A, the isolation portion 13 has an FTI structure that penetrates the semiconductor substrate 10, and is partially separated between the unit pixels P1 and P2 that are adjacent in the X-axis direction and share the readout circuit 200. In the photodetector 1A, the FDs 12 are formed at opposing corners of the unit pixels P1 and P2 that are adjacent in the X-axis direction and share the readout circuit 200.
  • the distance W1 between the gate electrode 231 of the transfer transistor TR and the gate electrode 221 of the pixel transistor arranged nearby is greater than the distance W3 between the vertical readout gate electrode 331 and the planar gate electrode 221 of another transistor in the solid-state imaging device 300A shown in FIG. 9.
  • the distance W2 between the gate electrode 231 of the transfer transistor TR and the FD12 formed nearby is greater than the distance W4 between the vertical readout gate electrode 331 and the FD12 in the solid-state imaging device 300A shown in FIG. 9.
  • the photodetector device 1A of this modified example can achieve the same effects as the above embodiment.
  • Fig. 10 is a schematic representation of another example of the planar configuration of the surface 10S1 of the semiconductor substrate 10, which corresponds to Sec1 of the photodetector 1 shown in Fig. 1, as a photodetector device (photodetector 1B) according to Modification 2 of the present disclosure.
  • Fig. 11 is a schematic representation of another example of the planar configuration of the surface 10S1 of the semiconductor substrate 10, which corresponds to Sec1 of the photodetector 1 shown in Fig. 1, as a photodetector device (photodetector 1C) according to Modification 2 of the present disclosure.
  • the gate electrode 231 of the transfer transistor TR is shown as consisting of one vertical portion 231A and a horizontal portion 231B perpendicular to it, but this is not limited to this.
  • the photodetecting devices 1B and 1C of this variant each include a transfer transistor TR having a gate electrode 231 consisting of two vertical portions 231A and a horizontal portion 231B perpendicular to the two vertical portions 231A. Except for this point, the photodetecting device 1B has substantially the same configuration as the photodetecting device 1 of the above embodiment and the photodetecting device 1A of variant 1.
  • the gate electrode 231 of the transfer transistor TR has multiple vertical portions 231A. This not only achieves the effect of the above embodiment, but also makes it possible to transfer the charge in the photoelectric conversion unit 11 to the FD 12 more efficiently.
  • FIG. 12 is a schematic representation of another example of the planar configuration of the surface 10S1 of the semiconductor substrate 10, which corresponds to Sec1 of the photodetector 1 shown in Fig. 1, as a photodetector device (photodetector device 1D) according to Modification 3 of the present disclosure.
  • Fig. 13 is a schematic representation of another example of the planar configuration of the surface 10S1 of the semiconductor substrate 10, which corresponds to Sec1 of the photodetector 1 shown in Fig. 1, as a photodetector device (photodetector device 1E) according to Modification 3 of the present disclosure.
  • the vertical portion 231A of the gate electrode 231 of the transfer transistor TR has a circular planar shape, but this is not limited to this.
  • the vertical portion 231A of the gate electrode 231 of the transfer transistor TR has an elliptical shape, and is arranged so that its major axis faces the FD12.
  • the photodetectors 1D and 1E have substantially the same configuration as the photodetector 1 of the above embodiment and the photodetector 1A of variant 1.
  • the photodetector devices 1D and 1E of this modified example can achieve the same effects as the above embodiment.
  • FIG. 14 is a schematic representation of another example of the planar configuration of the surface 10S1 of the semiconductor substrate 10, which corresponds to Sec1 of the photodetector 1 shown in Fig. 1, as a photodetector according to Modification 4 of the present disclosure (photodetector 1F).
  • Fig. 15 is a schematic representation of another example of the planar configuration of the surface 10S1 of the semiconductor substrate 10, which corresponds to Sec1 of the photodetector 1 shown in Fig. 1, as a photodetector according to Modification 3 of the present disclosure (photodetector 1G).
  • the vertical portion 231A of the gate electrode 231 of the transfer transistor TR has an elliptical shape and is arranged so that its major axis faces FD12, but this is not limited to this.
  • the vertical portion 231A of the gate electrode 231 of the transfer transistor TR has an elliptical shape and is arranged so that its minor axis faces FD12.
  • the photodetectors 1F and 1G have substantially the same configuration as the photodetectors 1D and 1E of the above-described third modification.
  • the photodetector devices 1F and 1G of this modified example can achieve the same effects as the above embodiment.
  • FIG. 16 shows an example of the schematic configuration of a photodetector 2 according to Variation 5 of the present disclosure.
  • an example was shown in which multiple sensor pixels (unit pixels P) that perform photoelectric conversion and a readout circuit 200 that outputs pixel signals based on the charges output from the sensor pixels 12 are provided on a single substrate (semiconductor substrate 10), but the present invention is not limited to this.
  • the photodetector 2 of this modified example includes three substrates (first substrate 100, second substrate 400, and third substrate 500).
  • the photodetector 2 has a three-dimensional structure formed by bonding together three substrates (first substrate 100, second substrate 400, and third substrate 500).
  • the first substrate 100, second substrate 400, and third substrate 500 are stacked in this order.
  • the first substrate 100 has, on its semiconductor substrate 10, a plurality of sensor pixels (unit pixels P) that perform photoelectric conversion.
  • the plurality of unit pixels P are arranged in a matrix within a pixel array section 100A of the first substrate 100.
  • the second substrate 400 has, on its semiconductor substrate 41, a readout circuit 200 for every four unit pixels P.
  • the readout circuit 200 outputs pixel signals based on the electric charges output from the unit pixels P.
  • the second substrate 400 has a plurality of pixel drive lines 42 extending in the row direction and a plurality of vertical signal lines 43 extending in the column direction.
  • the third substrate 500 has, on its semiconductor substrate 51, a logic circuit 52 that processes pixel signals.
  • the logic circuit 52 has, for example, a vertical drive circuit 511, a column signal processing circuit 512, a horizontal drive circuit 513, and a system control circuit 514.
  • the logic circuit 52 (specifically, the horizontal drive circuit 513) outputs an output voltage Vout for each unit pixel P to the outside.
  • a low-resistance region made of silicide such as CoSi 2 or NiSi formed using a salicide (Self Aligned Silicide) process may be formed on the surface of the impurity diffusion region in contact with the source electrode and the drain electrode.
  • the vertical drive circuit 511 sequentially selects multiple unit pixels P row by row.
  • the column signal processing circuit 512 for example, performs correlated double sampling (CDS) processing on the pixel signals output from each unit pixel P in the row selected by the vertical drive circuit 511.
  • the column signal processing circuit 512 extracts the signal level of the pixel signal by performing CDS processing, for example, and holds pixel data corresponding to the amount of light received by each unit pixel P.
  • the horizontal drive circuit 513 for example, sequentially outputs the pixel data held in the column signal processing circuit 512 to the outside.
  • the system control circuit 514 for example, controls the driving of each block (vertical drive circuit 511, column signal processing circuit 512, and horizontal drive circuit 513) within the logic circuit 52.
  • This technology can also be applied to a photodetector 2 having a three-dimensional structure formed by bonding together the three substrates described above (first substrate 100, second substrate 400, third substrate 500).
  • a photodetector 2 to which this technology is applied can achieve the same effects as the above embodiment.
  • the photodetector 1 and the like can be applied to any type of electronic device with an imaging function, for example, a camera system such as a digital still camera or video camera, a mobile phone with an imaging function, etc.
  • Fig. 17 shows a schematic configuration of an electronic device 1000.
  • the electronic device 1000 includes, for example, a lens group 1001, a photodetector 1, a DSP (Digital Signal Processor) circuit 1002, a frame memory 1003, a display unit 1004, a storage unit 1005, an operation unit 1006, and a power supply unit 1007, which are interconnected via a bus line 1008.
  • a lens group 1001 a photodetector 1
  • a DSP (Digital Signal Processor) circuit 1002 a frame memory 1003, a display unit 1004, a storage unit 1005, an operation unit 1006, and a power supply unit 1007, which are interconnected via a bus line 1008.
  • DSP Digital Signal Processor
  • the lens group 1001 captures incident light (image light) from the subject and forms an image on the imaging surface of the photodetector 1.
  • the photodetector 1 converts the amount of incident light formed on the imaging surface by the lens group 1001 into an electrical signal on a pixel-by-pixel basis and supplies this as a pixel signal to the DSP circuit 1002.
  • the DSP circuit 1002 is a signal processing circuit that processes the signal supplied from the photodetector 1.
  • the DSP circuit 1002 outputs image data obtained by processing the signal from the photodetector 1.
  • the frame memory 1003 temporarily stores the image data processed by the DSP circuit 1002 on a frame-by-frame basis.
  • the display unit 1004 is, for example, a panel-type display device such as a liquid crystal panel or an organic EL (Electro Luminescence) panel, and the storage unit 1005 records the image data of moving or still images captured by the light detection device 1 on a storage medium such as a semiconductor memory or a hard disk.
  • a panel-type display device such as a liquid crystal panel or an organic EL (Electro Luminescence) panel
  • the storage unit 1005 records the image data of moving or still images captured by the light detection device 1 on a storage medium such as a semiconductor memory or a hard disk.
  • the operation unit 1006 outputs operation signals for the various functions of the electronic device 1000 in accordance with user operations.
  • the power supply unit 1007 supplies various types of power to the DSP circuit 1002, frame memory 1003, display unit 1004, storage unit 1005, and operation unit 1006 as needed.
  • FIG. 18A schematically illustrates an example of the overall configuration of a light detection system 2000 including a light detection device (e.g., light detection device 1).
  • FIG. 18B illustrates an example of the circuit configuration of the light detection system 2000.
  • the light detection system 2000 includes a light-emitting device 2001 serving as a light source unit that emits infrared light (light L2), and a light detection device 2002 serving as a light-receiving unit.
  • the light detection device 2002 may be, for example, the light detection device 1 described above.
  • the light detection system 2000 may further include a system control unit 2003, a light source driving unit 2004, a sensor control unit 2005, a light source-side optical system 2006, and a camera-side optical system 2007.
  • the optical detection device 2002 can detect light L1 and light L2.
  • Light L1 is external ambient light reflected by the subject (object to be measured) 2100 ( Figure 18A).
  • Light L2 is light emitted by the light-emitting device 2001 and then reflected by the subject 2100.
  • Light L1 is, for example, visible light
  • light L2 is, for example, infrared light.
  • Light L1 can be detected by the photoelectric conversion unit in the optical detection device 2002, and light L2 can be detected by the photoelectric conversion region in the optical detection device 2002.
  • Image information of the subject 2100 can be obtained from light L1, and distance information between the subject 2100 and the optical detection system 2000 can be obtained from light L2.
  • the optical detection system 2000 can be installed in, for example, an electronic device such as a smartphone or a mobile object such as a car.
  • the light-emitting device 2001 can be composed of, for example, a semiconductor laser, a surface-emitting semiconductor laser, or a vertical-cavity surface-emitting laser (VCSEL).
  • the method of detecting the light L2 emitted from the light-emitting device 2001 by the photodetector 2002 can be, for example, an iTOF method, but is not limited to this.
  • the photoelectric conversion unit can measure the distance to the subject 2100, for example, by using the time-of-flight (TOF) of light.
  • TOF time-of-flight
  • the method of detecting the light L2 emitted from the light-emitting device 2001 by the photodetector 2002 can also be, for example, a structured light method or a stereo vision method.
  • a structured light method a predetermined pattern of light is projected onto the subject 2100, and the distance between the photodetector system 2000 and the subject 2100 can be measured by analyzing the distortion of the pattern.
  • the stereo vision method for example, two or more cameras are used to acquire two or more images of the subject 2100 viewed from two or more different viewpoints, thereby measuring the distance between the photodetector system 2000 and the subject.
  • the light emitting device 2001 and the light detecting device 2002 can be synchronously controlled by the system control unit 2003.
  • the technology according to the present disclosure can be applied to various products.
  • the technology according to the present disclosure may be realized as a device mounted on any type of moving body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.
  • Figure 19 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology disclosed herein can be applied.
  • the vehicle control system 12000 includes multiple electronic control units connected via a communication network 12001.
  • the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside vehicle information detection unit 12030, an inside vehicle information detection unit 12040, and an integrated control unit 12050.
  • the functional configuration of the integrated control unit 12050 also includes a microcomputer 12051, an audio/video output unit 12052, and an in-vehicle network I/F (interface) 12053.
  • the drivetrain control unit 12010 controls the operation of devices related to the vehicle's drivetrain in accordance with various programs.
  • the drivetrain control unit 12010 functions as a control device for a driveforce generating device such as an internal combustion engine or drive motor that generates vehicle driveforce, a driveforce transmission mechanism that transmits driveforce to the wheels, a steering mechanism that adjusts the vehicle's steering angle, and a braking device that generates vehicle braking force.
  • the body system control unit 12020 controls the operation of various devices installed in the vehicle body according to various programs.
  • the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps.
  • radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020.
  • the body system control unit 12020 accepts these radio waves or signal inputs and controls the vehicle's door lock device, power window device, lamps, etc.
  • the outside vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000.
  • the outside vehicle information detection unit 12030 is connected to an imaging unit 12031.
  • the outside vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images.
  • the outside vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.
  • the imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received.
  • the imaging unit 12031 can output the electrical signal as an image, or as distance measurement information.
  • the light received by the imaging unit 12031 may be visible light, or may be invisible light such as infrared light.
  • the in-vehicle information detection unit 12040 detects information inside the vehicle. Connected to the in-vehicle information detection unit 12040 is, for example, a driver state detection unit 12041 that detects the driver's state.
  • the driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the driver's level of fatigue or concentration based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.
  • Microcomputer 12051 can calculate control target values for the driving force generating device, steering mechanism, or braking device based on information inside and outside the vehicle acquired by external vehicle information detection unit 12030 or internal vehicle information detection unit 12040, and output control commands to drivetrain control unit 12010.
  • microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following based on inter-vehicle distance, maintaining vehicle speed, vehicle collision warning, or vehicle lane departure warning.
  • ADAS Advanced Driver Assistance System
  • the microcomputer 12051 controls the driving force generating device, steering mechanism, braking device, etc. based on information about the vehicle's surroundings acquired by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040, thereby enabling cooperative control aimed at autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation.
  • the microcomputer 12051 can output control commands to the body system control unit 12020 based on information outside the vehicle acquired by the vehicle exterior information detection unit 12030.
  • the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the vehicle exterior information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.
  • the audio/video output unit 12052 transmits at least one audio and/or video output signal to an output device capable of visually or audibly notifying vehicle occupants or the outside of the vehicle of information.
  • an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as output devices.
  • the display unit 12062 may include, for example, at least one of an on-board display and a head-up display.
  • Figure 20 shows an example of the installation position of the imaging unit 12031.
  • vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as imaging unit 12031.
  • Imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, on the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of vehicle 12100.
  • Imaging unit 12101 provided on the front nose and imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly capture images of the front of vehicle 12100.
  • Imaging units 12102 and 12103 provided on the side mirrors mainly capture images of the sides of vehicle 12100.
  • Imaging unit 12104 provided on the rear bumper or back door mainly captures images of the rear of vehicle 12100.
  • the forward images captured by imaging units 12101 and 12105 are mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.
  • Imaging range 12111 indicates the imaging range of imaging unit 12101 provided on the front nose
  • imaging ranges 12112 and 12113 indicate the imaging ranges of imaging units 12102 and 12103 provided on the side mirrors, respectively
  • imaging range 12114 indicates the imaging range of imaging unit 12104 provided on the rear bumper or back door.
  • At least one of the image capturing units 12101 to 12104 may have a function for acquiring distance information.
  • at least one of the image capturing units 12101 to 12104 may be a stereo camera consisting of multiple image capturing elements, or an image capturing element having pixels for phase difference detection.
  • the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the closest three-dimensional object on the path of the vehicle 12100 that is traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km/h or higher). Furthermore, the microcomputer 12051 can set the inter-vehicle distance that should be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control) and automatic acceleration control (including follow-up start control). In this way, cooperative control can be performed for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation.
  • automatic braking control including follow-up stop control
  • automatic acceleration control including follow-up start control
  • the microcomputer 12051 can classify and extract three-dimensional object data regarding three-dimensional objects into categories such as motorcycles, standard vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects, and use this data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into those that are visible to the driver of the vehicle 12100 and those that are difficult to see.
  • the microcomputer 12051 determines the collision risk, which indicates the risk of collision with each obstacle, and when the collision risk is equal to or exceeds a set value and a collision is possible, it can provide driving assistance to avoid a collision by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or evasive steering via the drivetrain control unit 12010.
  • At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays.
  • the microcomputer 12051 can recognize pedestrians by determining whether or not a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points in the images captured by the image capturing units 12101 to 12104 as infrared cameras, and performing pattern matching processing on a series of feature points that indicate the outline of an object to determine whether or not the object is a pedestrian.
  • the audio/video output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis.
  • the audio/video output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian in a desired position.
  • the technology disclosed herein can be applied to the image capture unit 12031.
  • the light detection device 1 can be applied to the image capture unit 12031.
  • the technology according to the present disclosure (Application example to endoscopic surgery system)
  • the technology according to the present disclosure can be applied to various products.
  • the technology according to the present disclosure may be applied to an endoscopic surgery system.
  • Figure 21 is a diagram showing an example of the general configuration of an endoscopic surgery system to which the technology disclosed herein (the present technology) can be applied.
  • Figure 21 shows an operator (doctor) 11131 performing surgery on a patient 11132 on a patient bed 11153 using an endoscopic surgery system 11000.
  • the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.
  • the endoscope 11100 is composed of a lens barrel 11101, a predetermined length of which is inserted from the tip into the body cavity of the patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101.
  • the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible scope having a flexible lens barrel.
  • An opening into which an objective lens is fitted is provided at the tip of the tube 11101.
  • a light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the tube by a light guide extending inside the tube 11101, and is then irradiated via the objective lens towards the object to be observed inside the body cavity of the patient 11132.
  • the endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.
  • the camera head 11102 contains an optical system and an image sensor, and the optical system focuses reflected light (observation light) from the object being observed onto the image sensor.
  • the image sensor converts the observation light photoelectrically, generating an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. This image signal is sent to the camera control unit (CCU) 11201 as RAW data.
  • CCU camera control unit
  • the CCU 11201 is composed of a CPU (Central Processing Unit), GPU (Graphics Processing Unit), etc., and provides overall control over the operation of the endoscope 11100 and display device 11202. Furthermore, the CCU 11201 receives image signals from the camera head 11102 and performs various image processing on the image signals, such as development processing (demosaic processing), to display an image based on the image signals.
  • CPU Central Processing Unit
  • GPU Graphics Processing Unit
  • the display device 11202 Under the control of the CCU 11201, the display device 11202 displays an image based on the image signal that has been subjected to image processing by the CCU 11201.
  • the light source device 11203 is composed of a light source such as an LED (Light Emitting Diode), and supplies illumination light to the endoscope 11100 when photographing the surgical site, etc.
  • a light source such as an LED (Light Emitting Diode)
  • the input device 11204 is an input interface for the endoscopic surgery system 11000.
  • the user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204.
  • the user can input instructions to change the imaging conditions (type of illumination light, magnification, focal length, etc.) used by the endoscope 11100.
  • the treatment tool control device 11205 controls the operation of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc.
  • the insufflation device 11206 sends gas into the body cavity of the patient 11132 via the insufflation tube 11111 to inflate the body cavity in order to ensure a clear field of view for the endoscope 11100 and to ensure working space for the surgeon.
  • the recorder 11207 is a device capable of recording various types of information related to the surgery.
  • the printer 11208 is a device capable of printing various types of information related to the surgery in various formats, such as text, images, or graphs.
  • the light source device 11203 which supplies illumination light to the endoscope 11100 when photographing the surgical site, can be configured from a white light source, such as an LED, a laser light source, or a combination of these.
  • a white light source such as an LED, a laser light source, or a combination of these.
  • the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, making it possible to adjust the white balance of the captured image in the light source device 11203.
  • the light source device 11203 may be controlled to change the intensity of the light it outputs at predetermined time intervals.
  • the operation of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and combining these images, it is possible to generate an image with a high dynamic range that is free of so-called blocked-up shadows and blown-out highlights.
  • the light source device 11203 may also be configured to supply light in a predetermined wavelength band corresponding to special light observation.
  • Special light observation takes advantage of the wavelength dependence of light absorption in body tissues, and irradiates light with a narrower band than the light irradiated during normal observation (i.e., white light), thereby capturing high-contrast images of specific tissues, such as blood vessels on the surface of the mucosa, in what is known as narrow band imaging.
  • special light observation may involve fluorescence observation, in which images are obtained using fluorescence generated by irradiating excitation light.
  • Fluorescence observation can involve irradiating excitation light onto body tissue and observing the fluorescence from the tissue (autofluorescence observation), or by locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image.
  • the light source device 11203 may be configured to supply narrow band light and/or excitation light corresponding to such special light observation.
  • Figure 22 is a block diagram showing an example of the functional configuration of the camera head 11102 and CCU 11201 shown in Figure 21.
  • the camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405.
  • the CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413.
  • the camera head 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 so that they can communicate with each other.
  • Lens unit 11401 is an optical system provided at the connection point with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. Lens unit 11401 is composed of a combination of multiple lenses, including a zoom lens and a focus lens.
  • the imaging unit 11402 is composed of an imaging element.
  • the imaging unit 11402 may have one imaging element (a so-called single-chip type) or multiple imaging elements (a so-called multi-chip type). If the imaging unit 11402 is composed of a multi-chip type, for example, each imaging element may generate an image signal corresponding to each of RGB, and these may be combined to obtain a color image.
  • the imaging unit 11402 may be configured to have a pair of imaging elements for acquiring image signals for the right eye and left eye corresponding to 3D (dimensional) display. 3D display allows the surgeon 11131 to more accurately grasp the depth of the biological tissue at the surgical site. Note that if the imaging unit 11402 is composed of a multi-chip type, multiple lens units 11401 may be provided corresponding to each imaging element.
  • the imaging unit 11402 does not necessarily have to be provided in the camera head 11102.
  • the imaging unit 11402 may be provided inside the lens barrel 11101, immediately after the objective lens.
  • the drive unit 11403 is composed of an actuator, and under the control of the camera head control unit 11405, moves the zoom lens and focus lens of the lens unit 11401 a predetermined distance along the optical axis. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted as appropriate.
  • the communication unit 11404 is composed of a communication device for sending and receiving various information to and from the CCU 11201.
  • the communication unit 11404 transmits the image signal obtained from the imaging unit 11402 as RAW data to the CCU 11201 via the transmission cable 11400.
  • the communication unit 11404 also receives control signals from the CCU 11201 for controlling the operation of the camera head 11102, and supplies these to the camera head control unit 11405.
  • These control signals include information relating to the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value during imaging, and/or information specifying the magnification and focus of the captured image.
  • the imaging conditions such as the frame rate, exposure value, magnification, and focus may be specified by the user as appropriate, or may be set automatically by the control unit 11413 of the CCU 11201 based on the acquired image signal.
  • the endoscope 11100 will be equipped with the so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.
  • the camera head control unit 11405 controls the operation of the camera head 11102 based on control signals received from the CCU 11201 via the communication unit 11404.
  • the communication unit 11411 is composed of a communication device for sending and receiving various information to and from the camera head 11102.
  • the communication unit 11411 receives image signals transmitted from the camera head 11102 via the transmission cable 11400.
  • the communication unit 11411 transmits control signals to the camera head 11102 to control the operation of the camera head 11102.
  • Image signals and control signals can be transmitted via electrical communication, optical communication, etc.
  • the image processing unit 11412 performs various image processing operations on the image signal, which is RAW data transmitted from the camera head 11102.
  • the control unit 11413 performs various controls related to the imaging of the surgical site, etc. by the endoscope 11100, and the display of the captured images obtained by imaging the surgical site, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.
  • control unit 11413 causes the display device 11202 to display the captured image showing the surgical area, etc., based on the image signal that has been image processed by the image processing unit 11412.
  • the control unit 11413 may recognize various objects in the captured image using various image recognition technologies.
  • the control unit 11413 can recognize surgical tools such as forceps, specific biological parts, bleeding, mist generated when using the energy treatment tool 11112, etc., by detecting the shape and color of the edges of objects included in the captured image.
  • the control unit 11413 may use the recognition results to superimpose various surgical support information on the image of the surgical area. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.
  • the transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for electrical signal communication, an optical fiber for optical communication, or a composite cable of these.
  • communication is performed wired using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.
  • the technology disclosed herein can be suitably applied to the imaging unit 11402 provided in the camera head 11102 of the endoscope 11100.
  • the technology disclosed herein can be suitably applied to the imaging unit 11402, it is possible to reduce the size or increase the resolution of the imaging unit 11402, thereby providing a compact or high-resolution endoscope 11100.
  • the present disclosure has been described above using embodiments, variants 1 to 5, and application and application examples, but the present technology is not limited to the above embodiments, etc., and various modifications are possible.
  • the components that make up the light detection device (light detection device 1) in the above embodiments, etc. may be omitted as appropriate, or other components may be provided.
  • the present disclosure can also be configured as follows: According to the present technology configured as follows, it is possible to increase the degree of freedom in transistor layout. (1) a semiconductor substrate having opposing first and second surfaces; a first transistor provided on the first surface of the semiconductor substrate; a second transistor provided on the first surface of the semiconductor substrate, extending in a thickness direction of the semiconductor substrate as a first direction, one end of the second transistor in the extending direction being embedded in the semiconductor substrate, and the other end of the second transistor having a gate electrode including a vertical portion formed at a position different from an upper surface of the gate electrode of the first transistor in the first direction. (2) The semiconductor device according to (1), wherein the second transistor further includes a horizontal portion orthogonal to the vertical portion.
  • a semiconductor substrate having a first surface and a second surface facing each other, and having a photoelectric conversion portion embedded therein for each of the pixels; a first transistor provided on the first surface of the semiconductor substrate; a second transistor provided on the first surface of the semiconductor substrate, extending in a thickness direction of the semiconductor substrate as a first direction, one end of the second transistor in the extending direction being embedded in the semiconductor substrate, and the other end of the second transistor having a gate electrode including a vertical portion formed at a position different from that of an upper surface of the gate electrode of the first transistor in the first direction.
  • the second transistor further includes a horizontal portion orthogonal to the vertical portion.
  • a charge retention portion provided on the first surface of the semiconductor substrate, the charge retention portion temporarily retaining the charge generated in the photoelectric conversion portion;
  • the photodetector device according to any one of (6) to (10), wherein pixel sharing units, in which one charge holding portion is shared by a plurality of the pixels, are arranged in a two-dimensional array as repeating units on the semiconductor substrate. (12) one or more of the first transistors are provided for each of the pixel sharing units, The photodetector device according to any one of (6) to (11), wherein the second transistor is provided for each of the pixels. (13) The photodetector according to (12), wherein the second transistors are arranged in the vicinity of the charge storage portion.
  • the photodetector device a semiconductor substrate having a first surface and a second surface facing each other, and having a photoelectric conversion portion embedded therein for each of the pixels; a first transistor provided on the first surface of the semiconductor substrate; a second transistor provided on the first surface of the semiconductor substrate, extending in a thickness direction of the semiconductor substrate as a first direction, one end of the second transistor in the extending direction being embedded in the semiconductor substrate, and the other end of the second transistor having a gate electrode including a vertical portion formed at a position different from that of an upper surface of the gate electrode of the first transistor in the first direction.

Landscapes

  • Solid State Image Pick-Up Elements (AREA)

Abstract

Un dispositif à semi-conducteur selon un mode de réalisation de la présente divulgation comprend un substrat semi-conducteur qui comporte des première et seconde surfaces opposées, un premier transistor qui est disposé sur la première surface du substrat semi-conducteur, et un second transistor qui est disposé sur la première surface du substrat semi-conducteur et comporte une électrode de grille qui comprend une partie verticale qui s'étend dans une première direction constituant la direction de l'épaisseur du substrat semi-conducteur, de telle sorte qu'une extrémité dans la direction d'extension est intégrée dans le substrat semi-conducteur et l'autre extrémité est située à une position différente depuis une surface supérieure d'une électrode de grille du premier transistor par rapport à la première direction.
PCT/JP2025/027156 2024-08-16 2025-07-31 Dispositif à semi-conducteur, dispositif de détection de lumière et appareil électronique Pending WO2026038469A1 (fr)

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JP2024137057 2024-08-16
JP2024-137057 2024-08-16

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021186911A1 (fr) * 2020-03-18 2021-09-23 ソニーセミコンダクタソリューションズ株式会社 Dispositif d'imagerie et appareil électronique
WO2022124131A1 (fr) * 2020-12-11 2022-06-16 ソニーセミコンダクタソリューションズ株式会社 Élément de réception de lumière, dispositif de réception de lumière et appareil électronique
WO2023176449A1 (fr) * 2022-03-15 2023-09-21 ソニーセミコンダクタソリューションズ株式会社 Dispositif de détection optique
JP2024072796A (ja) * 2022-11-16 2024-05-28 三星電子株式会社 イメージセンサ及びその製造方法
JP2024086642A (ja) * 2022-12-16 2024-06-27 三星電子株式会社 イメージセンサ

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021186911A1 (fr) * 2020-03-18 2021-09-23 ソニーセミコンダクタソリューションズ株式会社 Dispositif d'imagerie et appareil électronique
WO2022124131A1 (fr) * 2020-12-11 2022-06-16 ソニーセミコンダクタソリューションズ株式会社 Élément de réception de lumière, dispositif de réception de lumière et appareil électronique
WO2023176449A1 (fr) * 2022-03-15 2023-09-21 ソニーセミコンダクタソリューションズ株式会社 Dispositif de détection optique
JP2024072796A (ja) * 2022-11-16 2024-05-28 三星電子株式会社 イメージセンサ及びその製造方法
JP2024086642A (ja) * 2022-12-16 2024-06-27 三星電子株式会社 イメージセンサ

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