YU200480A - Reliable circuit for testing memory matrix - Google Patents

Reliable circuit for testing memory matrix

Info

Publication number
YU200480A
YU200480A YU02004/80A YU200480A YU200480A YU 200480 A YU200480 A YU 200480A YU 02004/80 A YU02004/80 A YU 02004/80A YU 200480 A YU200480 A YU 200480A YU 200480 A YU200480 A YU 200480A
Authority
YU
Yugoslavia
Prior art keywords
memory matrix
testing memory
reliable circuit
reliable
testing
Prior art date
Application number
YU02004/80A
Other versions
YU41727B (en
Inventor
H J Knapp
Original Assignee
Int Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Int Standard Electric Corp filed Critical Int Standard Electric Corp
Publication of YU200480A publication Critical patent/YU200480A/en
Publication of YU41727B publication Critical patent/YU41727B/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/74Masking faults in memories by using spares or by reconfiguring using duplex memories, i.e. using dual copies
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B61RAILWAYS
    • B61LGUIDING RAILWAY TRAFFIC; ENSURING THE SAFETY OF RAILWAY TRAFFIC
    • B61L21/00Station blocking between signal boxes in one yard
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/22Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling
    • G06F13/225Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling with priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mechanical Engineering (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Hardware Redundancy (AREA)
  • Storage Device Security (AREA)
  • Debugging And Monitoring (AREA)
YU2004/80A 1979-08-09 1980-08-08 Reliable circuit for testing memory matrix YU41727B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2932271A DE2932271C2 (en) 1979-08-09 1979-08-09 Circuit arrangement for interrogating a matrix memory with reliable signaling

Publications (2)

Publication Number Publication Date
YU200480A true YU200480A (en) 1982-08-31
YU41727B YU41727B (en) 1987-12-31

Family

ID=6078009

Family Applications (1)

Application Number Title Priority Date Filing Date
YU2004/80A YU41727B (en) 1979-08-09 1980-08-08 Reliable circuit for testing memory matrix

Country Status (7)

Country Link
AT (1) AT374297B (en)
CH (1) CH649163A5 (en)
DE (1) DE2932271C2 (en)
ES (1) ES8107403A1 (en)
IL (1) IL60736A (en)
SE (1) SE441223B (en)
YU (1) YU41727B (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3668644A (en) * 1970-02-09 1972-06-06 Burroughs Corp Failsafe memory system

Also Published As

Publication number Publication date
ATA386480A (en) 1983-08-15
YU41727B (en) 1987-12-31
IL60736A (en) 1984-10-31
SE8005458L (en) 1981-02-10
ES494111A0 (en) 1981-10-16
SE441223B (en) 1985-09-16
ES8107403A1 (en) 1981-10-16
DE2932271A1 (en) 1981-02-12
CH649163A5 (en) 1985-04-30
IL60736A0 (en) 1980-10-26
AT374297B (en) 1984-04-10
DE2932271C2 (en) 1981-12-24

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