YU33468B - Circuit arrangement for clock synchronization for pulse-code modulation line repeater - Google Patents

Circuit arrangement for clock synchronization for pulse-code modulation line repeater

Info

Publication number
YU33468B
YU33468B YU300370A YU300370A YU33468B YU 33468 B YU33468 B YU 33468B YU 300370 A YU300370 A YU 300370A YU 300370 A YU300370 A YU 300370A YU 33468 B YU33468 B YU 33468B
Authority
YU
Yugoslavia
Prior art keywords
pulse
circuit arrangement
clock synchronization
code modulation
line repeater
Prior art date
Application number
YU300370A
Other languages
English (en)
Other versions
YU300370A (en
Inventor
Pospischil Reginhard
Reginhard Pospischil
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19691961950 external-priority patent/DE1961950C3/de
Priority claimed from DE19702004036 external-priority patent/DE2004036C3/de
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of YU300370A publication Critical patent/YU300370A/xx
Publication of YU33468B publication Critical patent/YU33468B/xx

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J7/00—Multiplex systems in which the amplitudes or durations of the signals in individual channels are characteristic of those channels
    • H04J7/02—Multiplex systems in which the amplitudes or durations of the signals in individual channels are characteristic of those channels in which the polarity of the amplitude is characteristic
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
YU300370A 1969-12-10 1970-12-09 Circuit arrangement for clock synchronization for pulse-code modulation line repeater YU33468B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19691961950 DE1961950C3 (de) 1969-12-10 1969-12-10 Schaltungsanordnung zur Taktsynchronisation für einen Pulscodemodulations-Streckenregenerator
DE19702004036 DE2004036C3 (de) 1970-01-29 1970-01-29 Schaltungsanordnung zur Taktsynchronisation für einen Pulscodemodulations-Streckenregenerator

Publications (2)

Publication Number Publication Date
YU300370A YU300370A (en) 1976-08-31
YU33468B true YU33468B (en) 1977-02-28

Family

ID=25758226

Family Applications (1)

Application Number Title Priority Date Filing Date
YU300370A YU33468B (en) 1969-12-10 1970-12-09 Circuit arrangement for clock synchronization for pulse-code modulation line repeater

Country Status (8)

Country Link
JP (1) JPS5225689B1 (fr)
BE (1) BE760161A (fr)
CH (1) CH530741A (fr)
FR (1) FR2073053A5 (fr)
LU (1) LU62201A1 (fr)
NL (1) NL160131C (fr)
SE (1) SE375211B (fr)
YU (1) YU33468B (fr)

Also Published As

Publication number Publication date
FR2073053A5 (fr) 1971-09-24
NL160131B (nl) 1979-04-17
JPS5225689B1 (fr) 1977-07-09
NL160131C (nl) 1979-09-17
LU62201A1 (fr) 1971-05-14
NL7017976A (fr) 1971-06-14
YU300370A (en) 1976-08-31
CH530741A (de) 1972-11-15
SE375211B (fr) 1975-04-07
BE760161A (fr) 1971-06-10

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