AT515372B1 - Verfahren zur Herstellung einer Leiterplatte - Google Patents

Verfahren zur Herstellung einer Leiterplatte Download PDF

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Publication number
AT515372B1
AT515372B1 ATA50058/2014A AT500582014A AT515372B1 AT 515372 B1 AT515372 B1 AT 515372B1 AT 500582014 A AT500582014 A AT 500582014A AT 515372 B1 AT515372 B1 AT 515372B1
Authority
AT
Austria
Prior art keywords
circuit board
printed circuit
layer
cavity
protective layer
Prior art date
Application number
ATA50058/2014A
Other languages
German (de)
English (en)
Other versions
AT515372A1 (de
Original Assignee
At & S Austria Tech & Systemtechnik Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by At & S Austria Tech & Systemtechnik Ag filed Critical At & S Austria Tech & Systemtechnik Ag
Priority to ATA50058/2014A priority Critical patent/AT515372B1/de
Priority to EP21179979.6A priority patent/EP3902020A1/fr
Priority to EP15708697.6A priority patent/EP3100310B1/fr
Priority to US15/115,221 priority patent/US9713248B2/en
Priority to PCT/AT2015/050019 priority patent/WO2015113088A1/fr
Priority to CN201580016774.6A priority patent/CN106165131B/zh
Publication of AT515372A1 publication Critical patent/AT515372A1/de
Application granted granted Critical
Publication of AT515372B1 publication Critical patent/AT515372B1/de

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0274Optical details, e.g. printed circuits comprising integral optical means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • H05K1/183Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components mounted in and supported by recessed areas of the PCBs
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • H05K3/0026Etching of the substrate by chemical or physical means by laser ablation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0055After-treatment, e.g. cleaning or desmearing of holes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4697Manufacturing multilayer circuits having cavities, e.g. for mounting components
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/85Packages
    • H10H20/855Optical field-shaping means, e.g. lenses
    • H10H20/856Reflecting means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/85Packages
    • H10H20/857Interconnections, e.g. lead-frames, bond wires or solder balls
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • H05K1/184Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components inserted in holes through the PCBs and wherein terminals of the components are connected to printed contacts on the walls of the holes or at the edges thereof or protruding over or into the holes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09036Recesses or grooves in insulating substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10106Light emitting diode [LED]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2054Light-reflecting surface, e.g. conductors, substrates, coatings, dielectrics
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/30Details of processes not otherwise provided for in H05K2203/01 - H05K2203/17
    • H05K2203/308Sacrificial means, e.g. for temporarily filling a space for making a via or a cavity or for making rigid-flexible PCBs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • H10H20/036Manufacture or treatment of packages
    • H10H20/0363Manufacture or treatment of packages of optical field-shaping means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • H10H20/036Manufacture or treatment of packages
    • H10H20/0364Manufacture or treatment of packages of interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68Shapes or dispositions thereof
    • H10W70/682Shapes or dispositions thereof comprising holes having chips therein
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Led Device Packages (AREA)
  • Optical Elements Other Than Lenses (AREA)
  • Manufacturing Of Printed Wiring (AREA)
ATA50058/2014A 2014-01-29 2014-01-29 Verfahren zur Herstellung einer Leiterplatte AT515372B1 (de)

Priority Applications (6)

Application Number Priority Date Filing Date Title
ATA50058/2014A AT515372B1 (de) 2014-01-29 2014-01-29 Verfahren zur Herstellung einer Leiterplatte
EP21179979.6A EP3902020A1 (fr) 2014-01-29 2015-01-21 Carte de circuit imprimé
EP15708697.6A EP3100310B1 (fr) 2014-01-29 2015-01-21 Procédé de production d'une carte de circuits imprimés
US15/115,221 US9713248B2 (en) 2014-01-29 2015-01-21 Method for producing a circuit board
PCT/AT2015/050019 WO2015113088A1 (fr) 2014-01-29 2015-01-21 Procédé de production d'une carte de circuits imprimés
CN201580016774.6A CN106165131B (zh) 2014-01-29 2015-01-21 电路板生产方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ATA50058/2014A AT515372B1 (de) 2014-01-29 2014-01-29 Verfahren zur Herstellung einer Leiterplatte

Publications (2)

Publication Number Publication Date
AT515372A1 AT515372A1 (de) 2015-08-15
AT515372B1 true AT515372B1 (de) 2019-10-15

Family

ID=52633004

Family Applications (1)

Application Number Title Priority Date Filing Date
ATA50058/2014A AT515372B1 (de) 2014-01-29 2014-01-29 Verfahren zur Herstellung einer Leiterplatte

Country Status (5)

Country Link
US (1) US9713248B2 (fr)
EP (2) EP3100310B1 (fr)
CN (1) CN106165131B (fr)
AT (1) AT515372B1 (fr)
WO (1) WO2015113088A1 (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10219384B2 (en) 2013-11-27 2019-02-26 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Circuit board structure
AT515101B1 (de) 2013-12-12 2015-06-15 Austria Tech & System Tech Verfahren zum Einbetten einer Komponente in eine Leiterplatte
AT515372B1 (de) 2014-01-29 2019-10-15 At & S Austria Tech & Systemtechnik Ag Verfahren zur Herstellung einer Leiterplatte
AT515447B1 (de) 2014-02-27 2019-10-15 At & S Austria Tech & Systemtechnik Ag Verfahren zum Kontaktieren eines in eine Leiterplatte eingebetteten Bauelements sowie Leiterplatte
US11523520B2 (en) 2014-02-27 2022-12-06 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Method for making contact with a component embedded in a printed circuit board
US9918414B2 (en) * 2015-12-18 2018-03-13 Intel Corporation Electromagnetic interference shields for electronic packages and related methods
CN109219255A (zh) * 2018-11-14 2019-01-15 生益电子股份有限公司 一种非金属化阶梯槽的制作方法及pcb
CN112382206B (zh) 2020-11-13 2022-07-12 Tcl华星光电技术有限公司 背板及led面板
EP4248717A2 (fr) 2020-11-18 2023-09-27 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Support de composant pour applications de guide d'ondes
US11664567B2 (en) 2020-11-30 2023-05-30 Nxp B.V. Hollow waveguide assembly formed by affixing first and second substrates to form a cavity therein and having a conductive layer covering the cavity
CN115707194A (zh) 2021-08-04 2023-02-17 奥特斯奥地利科技与系统技术有限公司 部件承载件及其制造方法
CN114928947A (zh) * 2022-05-31 2022-08-19 景旺电子科技(龙川)有限公司 Oled模组刚挠结合板制作方法及刚挠结合板

Citations (5)

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WO2005091392A1 (fr) * 2004-03-18 2005-09-29 Phoseon Technology, Inc. Micro-reflecteurs montes sur un substrat et destines a un reseau del haute densite
US20070176198A1 (en) * 2006-02-02 2007-08-02 Samsung Electro-Mechanics Co., Ltd. Chip on board package and manufacturing method thereof
KR20090104580A (ko) * 2008-03-31 2009-10-06 서울반도체 주식회사 인쇄 회로 기판을 이용한 발광 다이오드 패키지
EP2463577A1 (fr) * 2010-12-07 2012-06-13 LG Innotek Co., Ltd. Module de dispositif électroluminescent et unité de rétroéclairage l'incluant
WO2013141509A1 (fr) * 2012-03-21 2013-09-26 Lg Innotek Co., Ltd. Carte de circuit imprimé et son procédé de fabrication

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US5206188A (en) * 1990-01-31 1993-04-27 Ibiden Co., Ltd. Method of manufacturing a high lead count circuit board
JP3736679B2 (ja) * 2001-07-18 2006-01-18 日立エーアイシー株式会社 プリント配線板
JP2004200209A (ja) * 2002-12-16 2004-07-15 Fuji Xerox Co Ltd 電極等の導電パターンの形成方法およびこれを用いた面発光型半導体レーザ並びにその製造方法
JP4659421B2 (ja) * 2004-09-30 2011-03-30 株式会社トクヤマ 発光素子収納用パッケージの製造方法
KR20060106891A (ko) * 2005-04-04 2006-10-12 마츠시타 덴끼 산교 가부시키가이샤 광학 디바이스용 캐비티 구조체, 광학 디바이스 및 광학디바이스용 캐비티 구조체의 제조방법
CN1901238A (zh) * 2005-07-20 2007-01-24 桦晶科技股份有限公司 发光二极管(led)无打线的封装结构
JP4771135B2 (ja) 2006-01-12 2011-09-14 日立化成工業株式会社 プリント配線板、それを使用したled装置及びプリント配線板の製造方法
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JP2009021426A (ja) * 2007-07-12 2009-01-29 Sharp Corp チップ部品型led及びその製造方法
AT12322U1 (de) 2009-01-27 2012-03-15 Dcc Dev Circuits & Components Gmbh Verfahren zur herstellung einer mehrlagigen leiterplatte, haftverhinderungsmaterial sowie mehrlagige leiterplatte und verwendung eines derartigen verfahrens
TWM390542U (en) * 2010-03-17 2010-10-11 Hon Hai Prec Ind Co Ltd LED lead frame
JP2012044102A (ja) 2010-08-23 2012-03-01 Hitachi Cable Ltd 発光装置及びその製造方法並びに配線基板
AT13434U1 (de) * 2012-02-21 2013-12-15 Austria Tech & System Tech Verfahren zur Herstellung einer Leiterplatte und Verwendung eines derartigen Verfahrens
AT515372B1 (de) 2014-01-29 2019-10-15 At & S Austria Tech & Systemtechnik Ag Verfahren zur Herstellung einer Leiterplatte

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005091392A1 (fr) * 2004-03-18 2005-09-29 Phoseon Technology, Inc. Micro-reflecteurs montes sur un substrat et destines a un reseau del haute densite
US20070176198A1 (en) * 2006-02-02 2007-08-02 Samsung Electro-Mechanics Co., Ltd. Chip on board package and manufacturing method thereof
KR20090104580A (ko) * 2008-03-31 2009-10-06 서울반도체 주식회사 인쇄 회로 기판을 이용한 발광 다이오드 패키지
EP2463577A1 (fr) * 2010-12-07 2012-06-13 LG Innotek Co., Ltd. Module de dispositif électroluminescent et unité de rétroéclairage l'incluant
WO2013141509A1 (fr) * 2012-03-21 2013-09-26 Lg Innotek Co., Ltd. Carte de circuit imprimé et son procédé de fabrication

Also Published As

Publication number Publication date
US20160353566A1 (en) 2016-12-01
EP3902020A1 (fr) 2021-10-27
US9713248B2 (en) 2017-07-18
EP3100310A1 (fr) 2016-12-07
EP3100310B1 (fr) 2021-07-07
AT515372A1 (de) 2015-08-15
CN106165131B (zh) 2019-04-26
CN106165131A (zh) 2016-11-23
WO2015113088A1 (fr) 2015-08-06

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Effective date: 20220129