ATE103723T1 - Mehrfachzugriffsvorrichtung. - Google Patents

Mehrfachzugriffsvorrichtung.

Info

Publication number
ATE103723T1
ATE103723T1 AT88202675T AT88202675T ATE103723T1 AT E103723 T1 ATE103723 T1 AT E103723T1 AT 88202675 T AT88202675 T AT 88202675T AT 88202675 T AT88202675 T AT 88202675T AT E103723 T1 ATE103723 T1 AT E103723T1
Authority
AT
Austria
Prior art keywords
circuit
coupling
transmission circuit
transmission
stations
Prior art date
Application number
AT88202675T
Other languages
English (en)
Inventor
Dirk Herman Lutgardis C Rabaey
Didier Rene Haspeslagh
Original Assignee
Alcatel Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Nv filed Critical Alcatel Nv
Application granted granted Critical
Publication of ATE103723T1 publication Critical patent/ATE103723T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H04Q11/0407—Selecting arrangements for multiplex systems for time-division multiplexing using a stored program control
    • H04Q11/0414—Details
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Small-Scale Networks (AREA)
  • Preparation Of Compounds By Using Micro-Organisms (AREA)
  • Information Transfer Systems (AREA)
  • Memory System (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Transmitters (AREA)
  • Selective Calling Equipment (AREA)
  • Communication Control (AREA)
  • Dram (AREA)
AT88202675T 1987-12-07 1988-11-24 Mehrfachzugriffsvorrichtung. ATE103723T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
BE8701402A BE1001383A7 (fr) 1987-12-07 1987-12-07 Dispositif a acces multiples.
EP88202675A EP0320041B1 (de) 1987-12-07 1988-11-24 Mehrfachzugriffsvorrichtung

Publications (1)

Publication Number Publication Date
ATE103723T1 true ATE103723T1 (de) 1994-04-15

Family

ID=3883009

Family Applications (1)

Application Number Title Priority Date Filing Date
AT88202675T ATE103723T1 (de) 1987-12-07 1988-11-24 Mehrfachzugriffsvorrichtung.

Country Status (9)

Country Link
US (1) US5068848A (de)
EP (1) EP0320041B1 (de)
JP (1) JPH065523B2 (de)
AT (1) ATE103723T1 (de)
AU (1) AU613983B2 (de)
BE (1) BE1001383A7 (de)
CA (1) CA1312386C (de)
DE (1) DE3888801T2 (de)
ES (1) ES2054789T3 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2656710A1 (fr) * 1989-12-29 1991-07-05 Radiotechnique Compelec Microcontroleur pour l'execution rapide d'un grand nombre d'operations decomposable en sequence d'operations de meme nature.
DE59106831D1 (de) * 1991-08-14 1995-12-07 Siemens Ag Schnittstellenbaustein zur Unterstützung der Kommunikation zwischen Prozessorsystemen.
JP3778579B2 (ja) * 1993-11-16 2006-05-24 株式会社ルネサステクノロジ 半導体記憶装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2465269B1 (fr) * 1979-09-12 1985-12-27 Cii Honeywell Bull Selecteur de demandes asynchrones dans un systeme de traitement de l'information
US4393464A (en) * 1980-12-12 1983-07-12 Ncr Corporation Chip topography for integrated circuit communication controller
IT1140233B (it) * 1981-10-20 1986-09-24 Italtel Spa Unita' di controllo dei circuiti di interfaccia di ingresso-uscita di un elaboratore elettronico
US4514823A (en) * 1982-01-15 1985-04-30 International Business Machines Corporation Apparatus and method for extending a parallel channel to a serial I/O device
DE3502721A1 (de) * 1985-01-28 1986-07-31 Robert Bosch Gmbh, 7000 Stuttgart Multiprozessorsystem
US4740956A (en) * 1985-12-30 1988-04-26 Ibm Corporation Linear-space signalling for a circuit-switched network

Also Published As

Publication number Publication date
BE1001383A7 (fr) 1989-10-17
CA1312386C (en) 1993-01-05
JPH065523B2 (ja) 1994-01-19
AU613983B2 (en) 1991-08-15
EP0320041A3 (en) 1990-03-28
EP0320041A2 (de) 1989-06-14
US5068848A (en) 1991-11-26
ES2054789T3 (es) 1994-08-16
JPH01169559A (ja) 1989-07-04
DE3888801D1 (de) 1994-05-05
DE3888801T2 (de) 1994-08-18
EP0320041B1 (de) 1994-03-30
AU2582288A (en) 1989-06-15

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Legal Events

Date Code Title Description
UEP Publication of translation of european patent specification
REN Ceased due to non-payment of the annual fee