ATE104083T1 - Matrix-wortorganisiertes speichersystem. - Google Patents
Matrix-wortorganisiertes speichersystem.Info
- Publication number
- ATE104083T1 ATE104083T1 AT87310053T AT87310053T ATE104083T1 AT E104083 T1 ATE104083 T1 AT E104083T1 AT 87310053 T AT87310053 T AT 87310053T AT 87310053 T AT87310053 T AT 87310053T AT E104083 T1 ATE104083 T1 AT E104083T1
- Authority
- AT
- Austria
- Prior art keywords
- memory chips
- lines
- memory system
- routed
- cas
- Prior art date
Links
- 239000011159 matrix material Substances 0.000 title 1
- 238000003491 array Methods 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dram (AREA)
- Memory System (AREA)
- Controls And Circuits For Display Device (AREA)
- Image Input (AREA)
- Digital Computer Display Output (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Debugging And Monitoring (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/933,715 US4773044A (en) | 1986-11-21 | 1986-11-21 | Array-word-organized display memory and address generator with time-multiplexed address bus |
| EP87310053A EP0269330B1 (de) | 1986-11-21 | 1987-11-13 | Matrix-Wortorganisiertes Speichersystem |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE104083T1 true ATE104083T1 (de) | 1994-04-15 |
Family
ID=25464402
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT87310053T ATE104083T1 (de) | 1986-11-21 | 1987-11-13 | Matrix-wortorganisiertes speichersystem. |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4773044A (de) |
| EP (1) | EP0269330B1 (de) |
| JP (1) | JP2719621B2 (de) |
| AT (1) | ATE104083T1 (de) |
| DE (1) | DE3789537T2 (de) |
Families Citing this family (30)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4912658A (en) * | 1986-04-18 | 1990-03-27 | Advanced Micro Devices, Inc. | Method and apparatus for addressing video RAMS and refreshing a video monitor with a variable resolution |
| DE3804938C2 (de) | 1987-02-18 | 1994-07-28 | Canon Kk | Bildverarbeitungseinrichtung |
| US5293481A (en) * | 1987-02-18 | 1994-03-08 | Canon Kabushiki Kaisha | Data parallel processing apparatus |
| US4951230A (en) * | 1987-10-26 | 1990-08-21 | Tektronix, Inc. | Method and apparatus for tiling an image |
| US4953101A (en) * | 1987-11-24 | 1990-08-28 | Digital Equipment Corporation | Software configurable memory architecture for data processing system having graphics capability |
| US4980828A (en) * | 1988-11-25 | 1990-12-25 | Picker International, Inc. | Medical imaging system including use of DMA control for selective bit mapping of DRAM and VRAM memories |
| GB2245394A (en) * | 1990-06-18 | 1992-01-02 | Rank Cintel Ltd | Video framestore selective addressing system |
| DE69127518T2 (de) * | 1990-06-19 | 1998-04-02 | Dell Usa Lp | Digitalrechner, der eine Anlage für das aufeinanderfolgende Auffrischen einer erweiterbaren dynamischen RAM-Speicherschaltung hat |
| JP2960560B2 (ja) * | 1991-02-28 | 1999-10-06 | 株式会社日立製作所 | 超小型電子機器 |
| EP0520765B1 (de) * | 1991-06-25 | 1999-05-12 | Canon Kabushiki Kaisha | Verfahren und Vorrichtung zur Detektion eines Bewegungsvektors sowie Kodierungsverfahren und Vorrichtung zur Anwendung eines solchen Verfahrens und Vorrichtung |
| US5537563A (en) * | 1993-02-16 | 1996-07-16 | Texas Instruments Incorporated | Devices, systems and methods for accessing data using a gun preferred data organization |
| US6230063B1 (en) * | 1995-07-07 | 2001-05-08 | Samsung Electronics Co., Ltd. | Factory mode free setting apparatus and method thereof |
| US6356988B1 (en) * | 1999-01-07 | 2002-03-12 | Nec Corporation | Memory access system, address converter, and address conversion method capable of reducing a memory access time |
| US20090265525A1 (en) * | 1999-10-18 | 2009-10-22 | Micron Technology, Inc. | Determining memory upgrade options |
| US8732644B1 (en) | 2003-09-15 | 2014-05-20 | Nvidia Corporation | Micro electro mechanical switch system and method for testing and configuring semiconductor functional circuits |
| US8788996B2 (en) * | 2003-09-15 | 2014-07-22 | Nvidia Corporation | System and method for configuring semiconductor functional circuits |
| US8775997B2 (en) | 2003-09-15 | 2014-07-08 | Nvidia Corporation | System and method for testing and configuring semiconductor functional circuits |
| US8711161B1 (en) * | 2003-12-18 | 2014-04-29 | Nvidia Corporation | Functional component compensation reconfiguration system and method |
| US8723231B1 (en) | 2004-09-15 | 2014-05-13 | Nvidia Corporation | Semiconductor die micro electro-mechanical switch management system and method |
| US8711156B1 (en) | 2004-09-30 | 2014-04-29 | Nvidia Corporation | Method and system for remapping processing elements in a pipeline of a graphics processing unit |
| US8021193B1 (en) | 2005-04-25 | 2011-09-20 | Nvidia Corporation | Controlled impedance display adapter |
| US7793029B1 (en) | 2005-05-17 | 2010-09-07 | Nvidia Corporation | Translation device apparatus for configuring printed circuit board connectors |
| US8412872B1 (en) | 2005-12-12 | 2013-04-02 | Nvidia Corporation | Configurable GPU and method for graphics processing using a configurable GPU |
| US8417838B2 (en) * | 2005-12-12 | 2013-04-09 | Nvidia Corporation | System and method for configurable digital communication |
| US8724483B2 (en) * | 2007-10-22 | 2014-05-13 | Nvidia Corporation | Loopback configuration for bi-directional interfaces |
| US8453019B2 (en) * | 2007-11-06 | 2013-05-28 | Nvidia Corporation | Method and system for a free running strobe tolerant interface |
| US8687639B2 (en) * | 2009-06-04 | 2014-04-01 | Nvidia Corporation | Method and system for ordering posted packets and non-posted packets transfer |
| US9176909B2 (en) | 2009-12-11 | 2015-11-03 | Nvidia Corporation | Aggregating unoccupied PCI-e links to provide greater bandwidth |
| US9331869B2 (en) * | 2010-03-04 | 2016-05-03 | Nvidia Corporation | Input/output request packet handling techniques by a device specific kernel mode driver |
| US9330031B2 (en) | 2011-12-09 | 2016-05-03 | Nvidia Corporation | System and method for calibration of serial links using a serial-to-parallel loopback |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3681763A (en) * | 1970-05-01 | 1972-08-01 | Cogar Corp | Semiconductor orthogonal memory systems |
| GB1568379A (en) * | 1976-02-19 | 1980-05-29 | Micro Consultants Ltd | Video store |
| US4395700A (en) * | 1980-08-15 | 1983-07-26 | Environmental Research Institute Of Michigan | Image analyzer with variable line storage |
| US4460958A (en) * | 1981-01-26 | 1984-07-17 | Rca Corporation | Window-scanned memory |
| US4497024A (en) * | 1981-07-01 | 1985-01-29 | General Electric Company | Nuclear image display controller |
| US4691295A (en) * | 1983-02-28 | 1987-09-01 | Data General Corporation | System for storing and retreiving display information in a plurality of memory planes |
| US4566082A (en) * | 1983-03-23 | 1986-01-21 | Tektronix, Inc. | Memory pack addressing system |
| US4608678A (en) * | 1983-12-23 | 1986-08-26 | Advanced Micro Devices, Inc. | Semiconductor memory device for serial scan applications |
| JPS60162287A (ja) * | 1984-01-23 | 1985-08-24 | 三菱電機株式会社 | 画像メモリのアクセス処理装置 |
| JPS60260086A (ja) * | 1984-06-07 | 1985-12-23 | 工業技術院長 | メモリ回路 |
| JPS61120260A (ja) * | 1984-11-16 | 1986-06-07 | Matsushita Electric Ind Co Ltd | 順次デ−タ記憶回路のアクセス装置 |
| US4593642A (en) * | 1984-11-28 | 1986-06-10 | Shay Charles W | Carrying case for canoe |
| US4683555A (en) * | 1985-01-22 | 1987-07-28 | Texas Instruments Incorporated | Serial accessed semiconductor memory with reconfigureable shift registers |
| US4725987A (en) * | 1985-10-23 | 1988-02-16 | Eastman Kodak Company | Architecture for a fast frame store using dynamic RAMS |
-
1986
- 1986-11-21 US US06/933,715 patent/US4773044A/en not_active Expired - Lifetime
-
1987
- 1987-11-13 AT AT87310053T patent/ATE104083T1/de active
- 1987-11-13 EP EP87310053A patent/EP0269330B1/de not_active Expired - Lifetime
- 1987-11-13 DE DE3789537T patent/DE3789537T2/de not_active Expired - Fee Related
- 1987-11-20 JP JP62294998A patent/JP2719621B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US4773044A (en) | 1988-09-20 |
| EP0269330A3 (de) | 1991-01-23 |
| EP0269330A2 (de) | 1988-06-01 |
| JP2719621B2 (ja) | 1998-02-25 |
| EP0269330B1 (de) | 1994-04-06 |
| DE3789537D1 (de) | 1994-05-11 |
| JPS63142471A (ja) | 1988-06-14 |
| DE3789537T2 (de) | 1994-10-27 |
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