ATE116479T1 - Halbleiterherstellungsverfahren unter verwendung eines maskenersatzes und dotierstoffundurchlässiger gebiete. - Google Patents
Halbleiterherstellungsverfahren unter verwendung eines maskenersatzes und dotierstoffundurchlässiger gebiete.Info
- Publication number
- ATE116479T1 ATE116479T1 AT87302480T AT87302480T ATE116479T1 AT E116479 T1 ATE116479 T1 AT E116479T1 AT 87302480 T AT87302480 T AT 87302480T AT 87302480 T AT87302480 T AT 87302480T AT E116479 T1 ATE116479 T1 AT E116479T1
- Authority
- AT
- Austria
- Prior art keywords
- dopant
- mask
- production process
- semiconductor production
- impermeable areas
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D64/251—Source or drain electrodes for field-effect devices
- H10D64/252—Source or drain electrodes for field-effect devices for vertical or pseudo-vertical devices
- H10D64/2527—Source or drain electrodes for field-effect devices for vertical or pseudo-vertical devices for vertical devices wherein the source or drain electrodes are recessed in semiconductor bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D64/251—Source or drain electrodes for field-effect devices
- H10D64/256—Source or drain electrodes for field-effect devices for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S430/00—Radiation imagery chemistry: process, composition, or product thereof
- Y10S430/146—Laser beam
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
Landscapes
- Electrodes Of Semiconductors (AREA)
- Thin Film Transistor (AREA)
- Drying Of Semiconductors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
- Light Receiving Elements (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/842,771 US4748103A (en) | 1986-03-21 | 1986-03-21 | Mask-surrogate semiconductor process employing dopant protective region |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE116479T1 true ATE116479T1 (de) | 1995-01-15 |
Family
ID=25288204
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT87302480T ATE116479T1 (de) | 1986-03-21 | 1987-03-23 | Halbleiterherstellungsverfahren unter verwendung eines maskenersatzes und dotierstoffundurchlässiger gebiete. |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US4748103A (de) |
| EP (1) | EP0238362B1 (de) |
| JP (1) | JP2575378B2 (de) |
| KR (1) | KR960000387B1 (de) |
| AT (1) | ATE116479T1 (de) |
| CA (2) | CA1253262A (de) |
| DE (1) | DE3750909T2 (de) |
Families Citing this family (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2172427A (en) * | 1985-03-13 | 1986-09-17 | Philips Electronic Associated | Semiconductor device manufacture using a deflected ion beam |
| US4895810A (en) * | 1986-03-21 | 1990-01-23 | Advanced Power Technology, Inc. | Iopographic pattern delineated power mosfet with profile tailored recessed source |
| US5182234A (en) * | 1986-03-21 | 1993-01-26 | Advanced Power Technology, Inc. | Profile tailored trench etch using a SF6 -O2 etching composition wherein both isotropic and anisotropic etching is achieved by varying the amount of oxygen |
| JP2615667B2 (ja) * | 1987-09-28 | 1997-06-04 | 日産自動車株式会社 | Mos電界効果トランジスタの製造方法 |
| JPH0783122B2 (ja) * | 1988-12-01 | 1995-09-06 | 富士電機株式会社 | 半導体装置の製造方法 |
| US4970173A (en) * | 1989-07-03 | 1990-11-13 | Motorola, Inc. | Method of making high voltage vertical field effect transistor with improved safe operating area |
| US5155052A (en) * | 1991-06-14 | 1992-10-13 | Davies Robert B | Vertical field effect transistor with improved control of low resistivity region geometry |
| EP0534530B1 (de) * | 1991-09-23 | 2000-05-03 | Koninklijke Philips Electronics N.V. | Verfahren zum Herstellen einer Anordnung, bei dem ein Stoff in einen Körper implantiert wird |
| US5297001A (en) * | 1992-10-08 | 1994-03-22 | Sundstrand Corporation | High power semiconductor assembly |
| US5395777A (en) * | 1994-04-06 | 1995-03-07 | United Microelectronics Corp. | Method of producing VDMOS transistors |
| US5631484A (en) * | 1995-12-26 | 1997-05-20 | Motorola, Inc. | Method of manufacturing a semiconductor device and termination structure |
| GB2323703B (en) * | 1997-03-13 | 2002-02-13 | United Microelectronics Corp | Method to inhibit the formation of ion implantation induced edge defects |
| DE19840032C1 (de) * | 1998-09-02 | 1999-11-18 | Siemens Ag | Halbleiterbauelement und Herstellungsverfahren dazu |
| US6218701B1 (en) | 1999-04-30 | 2001-04-17 | Intersil Corporation | Power MOS device with increased channel width and process for forming same |
| US6819089B2 (en) | 2001-11-09 | 2004-11-16 | Infineon Technologies Ag | Power factor correction circuit with high-voltage semiconductor component |
| US6828609B2 (en) * | 2001-11-09 | 2004-12-07 | Infineon Technologies Ag | High-voltage semiconductor component |
| US20040036131A1 (en) * | 2002-08-23 | 2004-02-26 | Micron Technology, Inc. | Electrostatic discharge protection devices having transistors with textured surfaces |
| US8080459B2 (en) * | 2002-09-24 | 2011-12-20 | Vishay-Siliconix | Self aligned contact in a semiconductor device and method of fabricating the same |
| US8629019B2 (en) | 2002-09-24 | 2014-01-14 | Vishay-Siliconix | Method of forming self aligned contacts for a power MOSFET |
| US7569883B2 (en) * | 2004-11-19 | 2009-08-04 | Stmicroelectronics, S.R.L. | Switching-controlled power MOS electronic device |
| ITMI20042243A1 (it) * | 2004-11-19 | 2005-02-19 | St Microelectronics Srl | Processo per la realizzazione di un dispositivo mos di potenza ad alta densita' di integrazione |
| US7544545B2 (en) | 2005-12-28 | 2009-06-09 | Vishay-Siliconix | Trench polysilicon diode |
| CN101361193B (zh) | 2006-01-18 | 2013-07-10 | 维西埃-硅化物公司 | 具有高静电放电性能的浮动栅极结构 |
| US8435873B2 (en) * | 2006-06-08 | 2013-05-07 | Texas Instruments Incorporated | Unguarded Schottky barrier diodes with dielectric underetch at silicide interface |
| US10600902B2 (en) | 2008-02-13 | 2020-03-24 | Vishay SIliconix, LLC | Self-repairing field effect transisitor |
| US9230810B2 (en) | 2009-09-03 | 2016-01-05 | Vishay-Siliconix | System and method for substrate wafer back side and edge cross section seals |
| JP2016051812A (ja) * | 2014-08-29 | 2016-04-11 | キヤノン株式会社 | 接合型電界効果トランジスタの製造方法、半導体装置の製造方法、撮像装置の製造方法、接合型電界効果トランジスタ及び撮像装置 |
| CN111106012B (zh) * | 2019-12-20 | 2022-05-17 | 电子科技大学 | 一种实现半导体器件局域寿命控制的方法 |
Family Cites Families (36)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1289740A (de) * | 1969-12-24 | 1972-09-20 | ||
| NL161305C (nl) * | 1971-11-20 | 1980-01-15 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderin- richting. |
| US3863330A (en) * | 1973-08-02 | 1975-02-04 | Motorola Inc | Self-aligned double-diffused MOS devices |
| US4015278A (en) * | 1974-11-26 | 1977-03-29 | Fujitsu Ltd. | Field effect semiconductor device |
| FR2341943A1 (fr) * | 1976-02-20 | 1977-09-16 | Radiotechnique Compelec | Procede de realisation de transistors par implantation ionique |
| FR2454698A1 (fr) * | 1979-04-20 | 1980-11-14 | Radiotechnique Compelec | Procede de realisation de circuits integres a l'aide d'un masque multicouche et dispositifs obtenus par ce procede |
| US4383026A (en) * | 1979-05-31 | 1983-05-10 | Bell Telephone Laboratories, Incorporated | Accelerated particle lithographic processing and articles so produced |
| DE2930780C2 (de) * | 1979-07-28 | 1982-05-27 | Deutsche Itt Industries Gmbh, 7800 Freiburg | Verfahren zur Herstellung eines VMOS-Transistors |
| US4231811A (en) * | 1979-09-13 | 1980-11-04 | Intel Corporation | Variable thickness self-aligned photoresist process |
| US4545113A (en) * | 1980-10-23 | 1985-10-08 | Fairchild Camera & Instrument Corporation | Process for fabricating a lateral transistor having self-aligned base and base contact |
| JPS5793549A (en) * | 1980-12-03 | 1982-06-10 | Fujitsu Ltd | Manufacture of semiconductor device |
| US4329773A (en) * | 1980-12-10 | 1982-05-18 | International Business Machines Corp. | Method of making low leakage shallow junction IGFET devices |
| GB2102202A (en) * | 1981-07-17 | 1983-01-26 | Westinghouse Brake & Signal | Semiconductor device passivation |
| EP0073025B1 (de) * | 1981-08-21 | 1989-08-09 | Kabushiki Kaisha Toshiba | Verfahren zur Herstellung von dielektrischen Isolationszonen für Halbleiteranordnungen |
| US4497107A (en) * | 1981-11-12 | 1985-02-05 | Gte Laboratories Incorporated | Method of making self-aligned high-frequency static induction transistor |
| US4468682A (en) * | 1981-11-12 | 1984-08-28 | Gte Laboratories Incorporated | Self-aligned high-frequency static induction transistor |
| US4375124A (en) * | 1981-11-12 | 1983-03-01 | Gte Laboratories Incorporated | Power static induction transistor fabrication |
| US4437925A (en) * | 1981-11-12 | 1984-03-20 | Gte Laboratories Incorporated | Etched-source static induction transistor |
| US4486943A (en) * | 1981-12-16 | 1984-12-11 | Inmos Corporation | Zero drain overlap and self aligned contact method for MOS devices |
| US4553316A (en) * | 1981-12-24 | 1985-11-19 | Texas Instruments Incorporated | Self-aligned gate method for making MESFET semiconductor |
| JPS58130575A (ja) * | 1982-01-29 | 1983-08-04 | Hitachi Ltd | 電界効果トランジスタの製造方法 |
| US4625388A (en) * | 1982-04-26 | 1986-12-02 | Acrian, Inc. | Method of fabricating mesa MOSFET using overhang mask and resulting structure |
| US4419811A (en) * | 1982-04-26 | 1983-12-13 | Acrian, Inc. | Method of fabricating mesa MOSFET using overhang mask |
| US4459605A (en) * | 1982-04-26 | 1984-07-10 | Acrian, Inc. | Vertical MESFET with guardring |
| US4503598A (en) * | 1982-05-20 | 1985-03-12 | Fairchild Camera & Instrument Corporation | Method of fabricating power MOSFET structure utilizing self-aligned diffusion and etching techniques |
| US4450041A (en) * | 1982-06-21 | 1984-05-22 | The United States Of America As Represented By The Secretary Of The Navy | Chemical etching of transformed structures |
| US4561168A (en) * | 1982-11-22 | 1985-12-31 | Siliconix Incorporated | Method of making shadow isolated metal DMOS FET device |
| US4414059A (en) * | 1982-12-09 | 1983-11-08 | International Business Machines Corporation | Far UV patterning of resist materials |
| US4586243A (en) * | 1983-01-14 | 1986-05-06 | General Motors Corporation | Method for more uniformly spacing features in a semiconductor monolithic integrated circuit |
| JPS6066862A (ja) * | 1983-09-22 | 1985-04-17 | Matsushita Electronics Corp | 縦型mosfetの製造方法 |
| JPS60128622A (ja) * | 1983-12-16 | 1985-07-09 | Hitachi Ltd | エツチング法 |
| US4644637A (en) * | 1983-12-30 | 1987-02-24 | General Electric Company | Method of making an insulated-gate semiconductor device with improved shorting region |
| US4543706A (en) * | 1984-02-24 | 1985-10-01 | Gte Laboratories Incorporated | Fabrication of junction field effect transistor with filled grooves |
| US4566172A (en) * | 1984-02-24 | 1986-01-28 | Gte Laboratories Incorporated | Method of fabricating a static induction type recessed junction field effect transistor |
| US4573257A (en) * | 1984-09-14 | 1986-03-04 | Motorola, Inc. | Method of forming self-aligned implanted channel-stop and buried layer utilizing non-single crystal alignment key |
| US4558508A (en) * | 1984-10-15 | 1985-12-17 | International Business Machines Corporation | Process of making dual well CMOS semiconductor structure with aligned field-dopings using single masking step |
-
1986
- 1986-03-21 US US06/842,771 patent/US4748103A/en not_active Expired - Lifetime
-
1987
- 1987-03-20 CA CA000532581A patent/CA1253262A/en not_active Expired
- 1987-03-21 KR KR1019870002615A patent/KR960000387B1/ko not_active Expired - Fee Related
- 1987-03-23 DE DE3750909T patent/DE3750909T2/de not_active Expired - Lifetime
- 1987-03-23 AT AT87302480T patent/ATE116479T1/de not_active IP Right Cessation
- 1987-03-23 JP JP62068747A patent/JP2575378B2/ja not_active Expired - Fee Related
- 1987-03-23 EP EP87302480A patent/EP0238362B1/de not_active Expired - Lifetime
-
1989
- 1989-04-24 CA CA000597651A patent/CA1277437C/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US4748103A (en) | 1988-05-31 |
| JPS62279677A (ja) | 1987-12-04 |
| KR870009492A (ko) | 1987-10-27 |
| CA1253262A (en) | 1989-04-25 |
| EP0238362A2 (de) | 1987-09-23 |
| DE3750909D1 (de) | 1995-02-09 |
| CA1277437C (en) | 1990-12-04 |
| DE3750909T2 (de) | 1995-05-11 |
| KR960000387B1 (ko) | 1996-01-05 |
| JP2575378B2 (ja) | 1997-01-22 |
| EP0238362A3 (en) | 1988-11-30 |
| EP0238362B1 (de) | 1994-12-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| ATE116479T1 (de) | Halbleiterherstellungsverfahren unter verwendung eines maskenersatzes und dotierstoffundurchlässiger gebiete. | |
| NO963557L (no) | Omröringsprosesser for fremstilling av biologisk nedbrytbare fibriller, ikke-vevede stoffer omfattende de biologisk nedbrytbare fibriller, og gjenstander omfattende de ikke-vevede stoffer | |
| DE3674762D1 (de) | Erdloses kultursubstrat mit superabsorbierenden teilchen und herstellungsverfahren. | |
| SE7610473L (sv) | Absorptionsytan hos en solfangare | |
| ES8402693A1 (es) | Un metodo de cultivar hidroponicamente una planta. | |
| JPS6449039A (en) | Method for forming positive resist pattern | |
| BR8503211A (pt) | Processo para produzir diol e furano e microorganismo capaz do mesmo | |
| DE3585115D1 (de) | Verfahren zur herstellung und einstellung von eingegrabenen schichten. | |
| ATE33649T1 (de) | Gegen magengeschwuer wirkende 2-guanidino-4-(2substituierte-amino-4-imidazolyl)thiazole und verfahren zu deren herstellung. | |
| DE3852881D1 (de) | Dotierungsfolie und Methoden zur Diffusion von Verunreinigungen und Herstellung eines Halbleiterplättchens. | |
| ES8101143A1 (es) | Procedimiento para la obtencion de lineas de contorno de pa-trones en tejidos de pelo | |
| JPS53126866A (en) | Production of semiconductor wafers | |
| JPS52144973A (en) | Positioning method of semiconductor wafers | |
| JPS5233658A (en) | Process for preparation of 2-(omega-aminoalkoxy)diphenylmethanes | |
| JPS5244569A (en) | Process for production of semiconductor element | |
| DK0407246T3 (da) | Indlæg bestemt til beklædningsindustrien | |
| JPS52117557A (en) | Soft x-ray exposure mask and its manufacturing method | |
| JPS53115181A (en) | Production of semiconductor device | |
| JPS56130914A (en) | Manufacture of semiconductor device | |
| JPS51140561A (en) | Liquid phase epitaxial growing method | |
| JPS5342675A (en) | Single crystal device and its production | |
| JPS5226943A (en) | Manufacturingmethod of structural member of footwear | |
| JPS57153438A (en) | Manufacture of semiconductor substrate | |
| JPS54130877A (en) | Production of semiconductor device | |
| JPS56131925A (en) | Shape of semiconductor wafer |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |