ATE129351T1 - Seitentabellen in einem virtuellen speicher. - Google Patents

Seitentabellen in einem virtuellen speicher.

Info

Publication number
ATE129351T1
ATE129351T1 AT89109655T AT89109655T ATE129351T1 AT E129351 T1 ATE129351 T1 AT E129351T1 AT 89109655 T AT89109655 T AT 89109655T AT 89109655 T AT89109655 T AT 89109655T AT E129351 T1 ATE129351 T1 AT E129351T1
Authority
AT
Austria
Prior art keywords
page
virtual
translation
address
page table
Prior art date
Application number
AT89109655T
Other languages
English (en)
Inventor
E Stewart Robert
E Leonard Timothy
Tsi-Chuan Lee Sherry
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Application granted granted Critical
Publication of ATE129351T1 publication Critical patent/ATE129351T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/68—Details of translation look-aside buffer [TLB]
    • G06F2212/684—TLB miss handling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Debugging And Monitoring (AREA)
  • Steroid Compounds (AREA)
AT89109655T 1988-06-06 1989-05-29 Seitentabellen in einem virtuellen speicher. ATE129351T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US20288688A 1988-06-06 1988-06-06

Publications (1)

Publication Number Publication Date
ATE129351T1 true ATE129351T1 (de) 1995-11-15

Family

ID=22751629

Family Applications (1)

Application Number Title Priority Date Filing Date
AT89109655T ATE129351T1 (de) 1988-06-06 1989-05-29 Seitentabellen in einem virtuellen speicher.

Country Status (7)

Country Link
EP (1) EP0345589B1 (de)
JP (1) JP2537550B2 (de)
KR (1) KR930001885B1 (de)
AT (1) ATE129351T1 (de)
AU (1) AU607615B2 (de)
CA (1) CA1319448C (de)
DE (1) DE68924557T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1016743B (zh) * 1988-12-03 1992-05-20 国际商业机器公司 虚拟存储器管理系统和方法
JP3261708B2 (ja) * 1991-09-12 2002-03-04 富士ゼロックス株式会社 仮想計算機のアドレス変換方式
KR100737418B1 (ko) * 2001-10-31 2007-07-09 주식회사 포스코 교반기의 교반날개 자동 위치조정장치
US9280473B2 (en) 2004-12-02 2016-03-08 Intel Corporation Method and apparatus for accessing physical memory from a CPU or processing element in a high performance manner
CN101645043B (zh) * 2009-09-08 2012-01-04 成都市华为赛门铁克科技有限公司 写数据的方法、读数据的方法及存储设备
US10261916B2 (en) * 2016-03-25 2019-04-16 Advanced Micro Devices, Inc. Adaptive extension of leases for entries in a translation lookaside buffer
US10324838B2 (en) 2017-10-12 2019-06-18 International Business Machines Corporation Virtually addressable hardware global kernel segment table

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1988002148A1 (en) * 1986-09-15 1988-03-24 Motorola, Inc. A transparent translation method and apparatus for use in a memory management unit
JPS63197255A (ja) * 1987-02-12 1988-08-16 Matsushita Electric Ind Co Ltd アドレス変換装置

Also Published As

Publication number Publication date
KR900000774A (ko) 1990-01-31
KR930001885B1 (ko) 1993-03-19
AU3591989A (en) 1989-12-07
EP0345589A2 (de) 1989-12-13
EP0345589B1 (de) 1995-10-18
CA1319448C (en) 1993-06-22
JPH02236652A (ja) 1990-09-19
DE68924557D1 (de) 1995-11-23
DE68924557T2 (de) 1996-06-27
JP2537550B2 (ja) 1996-09-25
AU607615B2 (en) 1991-03-07
EP0345589A3 (de) 1991-08-07

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties