ATE139355T1 - Zusammengesetzte elektrische bauteile - Google Patents

Zusammengesetzte elektrische bauteile

Info

Publication number
ATE139355T1
ATE139355T1 AT91302622T AT91302622T ATE139355T1 AT E139355 T1 ATE139355 T1 AT E139355T1 AT 91302622 T AT91302622 T AT 91302622T AT 91302622 T AT91302622 T AT 91302622T AT E139355 T1 ATE139355 T1 AT E139355T1
Authority
AT
Austria
Prior art keywords
circuit
output
test data
electrical components
circuits
Prior art date
Application number
AT91302622T
Other languages
English (en)
Inventor
David Victor Stephens
Christopher Michael Thomas
James Curry Green
David John Vallins
Original Assignee
Smiths Industries Plc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Smiths Industries Plc filed Critical Smiths Industries Plc
Application granted granted Critical
Publication of ATE139355T1 publication Critical patent/ATE139355T1/de

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318536—Scan chain arrangements, e.g. connections, test bus, analog signals
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/3167—Testing of combined analog and digital circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Insulated Conductors (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Non-Reversible Transmitting Devices (AREA)
  • Hard Magnetic Materials (AREA)
AT91302622T 1990-04-17 1991-03-26 Zusammengesetzte elektrische bauteile ATE139355T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB909008544A GB9008544D0 (en) 1990-04-17 1990-04-17 Electrical assemblies

Publications (1)

Publication Number Publication Date
ATE139355T1 true ATE139355T1 (de) 1996-06-15

Family

ID=10674486

Family Applications (1)

Application Number Title Priority Date Filing Date
AT91302622T ATE139355T1 (de) 1990-04-17 1991-03-26 Zusammengesetzte elektrische bauteile

Country Status (6)

Country Link
US (1) US5134638A (de)
EP (1) EP0453106B1 (de)
JP (2) JPH0792229A (de)
AT (1) ATE139355T1 (de)
DE (1) DE69120142T2 (de)
GB (2) GB9008544D0 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5761214A (en) * 1992-10-16 1998-06-02 International Business Machines Corporation Method for testing integrated circuit devices
US5477545A (en) * 1993-02-09 1995-12-19 Lsi Logic Corporation Method and apparatus for testing of core-cell based integrated circuits
US5951703A (en) * 1993-06-28 1999-09-14 Tandem Computers Incorporated System and method for performing improved pseudo-random testing of systems having multi driver buses
US5600257A (en) * 1995-08-09 1997-02-04 International Business Machines Corporation Semiconductor wafer test and burn-in
US5644609A (en) * 1996-07-31 1997-07-01 Hewlett-Packard Company Apparatus and method for reading and writing remote registers on an integrated circuit chip using a minimum of interconnects
US5793778A (en) * 1997-04-11 1998-08-11 National Semiconductor Corporation Method and apparatus for testing analog and digital circuitry within a larger circuit
DE19744818B4 (de) * 1997-04-11 2006-06-01 National Semiconductor Corp.(N.D.Ges.D.Staates Delaware), Santa Clara Verfahren zum Prüfen einer Mischsignalschaltung und Mischsignalschaltung
JP4067578B2 (ja) * 1998-04-23 2008-03-26 コーニンクレッカ、フィリップス、エレクトロニクス、エヌ、ヴィ アナログ回路及びディジタル回路を有する試験可能なｉｃ
WO2017164872A1 (en) * 2016-03-24 2017-09-28 Intel Corporation System-on-chip devices and methods for testing system-on-chip devices

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1524231A1 (de) * 1966-03-17 1970-04-30 Telefunken Patent Rechenmaschine mit einem Verzoegerungs-Umlaufspeicher
US3849634A (en) * 1969-06-21 1974-11-19 Olivetti & Co Spa Electronic computer
DE2131272B1 (de) * 1971-06-24 1972-05-25 Kienzle Apparate Gmbh Vorrichtung an elektronischen Taxametern
US3973108A (en) * 1974-01-21 1976-08-03 Coulter Electronics, Inc. Pulse storing and retrieval circuit
US3974457A (en) * 1975-09-19 1976-08-10 The United States Of America As Represented By The Secretary Of The Navy Time and frequency control unit
US4377757A (en) * 1980-02-11 1983-03-22 Siemens Aktiengesellschaft Logic module for integrated digital circuits
US4433426A (en) * 1980-06-16 1984-02-21 Veb Kombinat Polygraph "Werner Lamberz" Control system for printing machines
GB8511187D0 (en) * 1985-05-02 1985-06-12 Int Computers Ltd Testing digital integrated circuits
US4639557A (en) * 1985-09-27 1987-01-27 Communications Technology Corporation Remote testing system for electrical circuits
FR2595474B1 (fr) * 1986-03-04 1988-06-24 Texas Instruments France Dispositif de controle et de verification du fonctionnement de blocs internes a un circuit integre
JPH06105285B2 (ja) * 1986-08-22 1994-12-21 三菱電機株式会社 半導体集積回路装置
GB2200465B (en) * 1987-01-16 1991-10-02 Teradyne Inc Automatic test equipment
US4829236A (en) * 1987-10-30 1989-05-09 Teradyne, Inc. Digital-to-analog calibration system
JP2594130B2 (ja) * 1988-09-02 1997-03-26 三菱電機株式会社 半導体回路

Also Published As

Publication number Publication date
JPH0792229A (ja) 1995-04-07
GB2245105B (en) 1994-01-05
EP0453106B1 (de) 1996-06-12
DE69120142T2 (de) 1996-10-10
GB2245105A (en) 1991-12-18
JP2001000042U (ja) 2001-12-07
GB9008544D0 (en) 1990-06-13
EP0453106A1 (de) 1991-10-23
GB9106479D0 (en) 1991-05-15
US5134638A (en) 1992-07-28
DE69120142D1 (de) 1996-07-18

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Legal Events

Date Code Title Description
UEP Publication of translation of european patent specification
EEFA Change of the company name
REN Ceased due to non-payment of the annual fee