ATE146614T1 - Integrierte digitale verarbeitungsvorrichtung - Google Patents

Integrierte digitale verarbeitungsvorrichtung

Info

Publication number
ATE146614T1
ATE146614T1 AT91306692T AT91306692T ATE146614T1 AT E146614 T1 ATE146614 T1 AT E146614T1 AT 91306692 T AT91306692 T AT 91306692T AT 91306692 T AT91306692 T AT 91306692T AT E146614 T1 ATE146614 T1 AT E146614T1
Authority
AT
Austria
Prior art keywords
integrated digital
accommodating
bus
digital processing
processing device
Prior art date
Application number
AT91306692T
Other languages
English (en)
Inventor
Douglas D Gephardt
James R Macdonald
Govinda V Kamath
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ATE146614T1 publication Critical patent/ATE146614T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7842—Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Communication Control (AREA)
  • Image Processing (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Power Sources (AREA)
AT91306692T 1990-08-31 1991-07-23 Integrierte digitale verarbeitungsvorrichtung ATE146614T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US57601290A 1990-08-31 1990-08-31

Publications (1)

Publication Number Publication Date
ATE146614T1 true ATE146614T1 (de) 1997-01-15

Family

ID=24302623

Family Applications (1)

Application Number Title Priority Date Filing Date
AT91306692T ATE146614T1 (de) 1990-08-31 1991-07-23 Integrierte digitale verarbeitungsvorrichtung

Country Status (5)

Country Link
US (1) US5369777A (de)
EP (1) EP0473276B1 (de)
JP (1) JPH05314062A (de)
AT (1) ATE146614T1 (de)
DE (1) DE69123665T2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5542055A (en) * 1993-05-28 1996-07-30 International Business Machines Corp. System for counting the number of peripheral buses in each hierarch connected to primary bus for creating map of peripheral buses to locate peripheral devices
US5566325A (en) * 1994-06-30 1996-10-15 Digital Equipment Corporation Method and apparatus for adaptive memory access
US6122747A (en) * 1997-09-05 2000-09-19 First Pass Inc. Intelligent subsystem interface for modular hardware system
US6014729A (en) * 1997-09-29 2000-01-11 Firstpass, Inc. Shared memory arbitration apparatus and method

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3680054A (en) * 1970-07-06 1972-07-25 Ibm Input/output channel
US3996564A (en) * 1974-06-26 1976-12-07 International Business Machines Corporation Input/output port control
US4053950A (en) * 1976-04-30 1977-10-11 International Business Machines Corporation Residual status reporting during chained cycle steal input/output operations
US4349870A (en) * 1979-09-05 1982-09-14 Motorola, Inc. Microcomputer with programmable multi-function port
US4396980A (en) * 1980-07-11 1983-08-02 Fairchild Camera & Instrument Corp. Combined integrated injection logic and transistor-transistor logic microprocessor integrated circuit design
US4644496A (en) * 1983-01-11 1987-02-17 Iowa State University Research Foundation, Inc. Apparatus, methods, and systems for computer information transfer
US4571671A (en) * 1983-05-13 1986-02-18 International Business Machines Corporation Data processor having multiple-buffer adapter between a system channel and an input/output bus
US4688170A (en) * 1983-09-22 1987-08-18 Tau Systems Corporation Communications network for communicating with computers provided with disparate protocols
US4847750A (en) * 1986-02-13 1989-07-11 Intelligent Instrumentation, Inc. Peripheral DMA controller for data acquisition system
US4969121A (en) * 1987-03-02 1990-11-06 Altera Corporation Programmable integrated circuit logic array device having improved microprocessor connectability
US5058001A (en) * 1987-03-05 1991-10-15 International Business Machines Corporation Two-dimensional array of processing elements for emulating a multi-dimensional network
US4855730A (en) * 1987-05-08 1989-08-08 Rca Licensing Corporation Component audio/video system with timed control of plural peripheral devices
EP0293517B1 (de) * 1987-06-02 1992-11-25 Deutsche ITT Industries GmbH Steuerprozessor
US4933845A (en) * 1987-09-04 1990-06-12 Digital Equipment Corporation Reconfigurable bus
US4965801A (en) * 1987-09-28 1990-10-23 Ncr Corporation Architectural arrangement for a SCSI disk controller integrated circuit
US5129090A (en) * 1988-05-26 1992-07-07 Ibm Corporation System bus preempt for 80386 when running in an 80386/82385 microcomputer system with arbitration
US4964033A (en) * 1989-01-03 1990-10-16 Honeywell Inc. Microprocessor controlled interconnection apparatus for very high speed integrated circuits
JPH02219254A (ja) * 1989-02-20 1990-08-31 Hitachi Ltd 半導体集積回路装置
US5123107A (en) * 1989-06-20 1992-06-16 Mensch Jr William D Topography of CMOS microcomputer integrated circuit chip including core processor and memory, priority, and I/O interface circuitry coupled thereto

Also Published As

Publication number Publication date
JPH05314062A (ja) 1993-11-26
US5369777A (en) 1994-11-29
DE69123665T2 (de) 1997-07-10
EP0473276B1 (de) 1996-12-18
DE69123665D1 (de) 1997-01-30
EP0473276A1 (de) 1992-03-04

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties