ATE161360T1 - Verfahren und apparat zur herstellung eines seitenwandkontakts in einer elektrisch veränderbaren nichtflüchtigen speicherzelle - Google Patents

Verfahren und apparat zur herstellung eines seitenwandkontakts in einer elektrisch veränderbaren nichtflüchtigen speicherzelle

Info

Publication number
ATE161360T1
ATE161360T1 AT89909313T AT89909313T ATE161360T1 AT E161360 T1 ATE161360 T1 AT E161360T1 AT 89909313 T AT89909313 T AT 89909313T AT 89909313 T AT89909313 T AT 89909313T AT E161360 T1 ATE161360 T1 AT E161360T1
Authority
AT
Austria
Prior art keywords
memory cell
floating gate
producing
volatile memory
polysilicon
Prior art date
Application number
AT89909313T
Other languages
English (en)
Inventor
Bing Yeh
Original Assignee
Xicor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xicor Inc filed Critical Xicor Inc
Application granted granted Critical
Publication of ATE161360T1 publication Critical patent/ATE161360T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0411—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/683—Floating-gate IGFETs having only two programming levels programmed by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures

Landscapes

  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Physical Or Chemical Processes And Apparatus (AREA)
AT89909313T 1988-08-03 1989-07-21 Verfahren und apparat zur herstellung eines seitenwandkontakts in einer elektrisch veränderbaren nichtflüchtigen speicherzelle ATE161360T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/227,811 US5023694A (en) 1988-08-03 1988-08-03 Side wall contact in a nonvolatile electrically alterable memory cell

Publications (1)

Publication Number Publication Date
ATE161360T1 true ATE161360T1 (de) 1998-01-15

Family

ID=22854565

Family Applications (1)

Application Number Title Priority Date Filing Date
AT89909313T ATE161360T1 (de) 1988-08-03 1989-07-21 Verfahren und apparat zur herstellung eines seitenwandkontakts in einer elektrisch veränderbaren nichtflüchtigen speicherzelle

Country Status (7)

Country Link
US (1) US5023694A (de)
EP (1) EP0429509B1 (de)
JP (1) JP2512181B2 (de)
KR (1) KR0165855B1 (de)
AT (1) ATE161360T1 (de)
DE (1) DE68928501T2 (de)
WO (1) WO1990001804A1 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5153143A (en) * 1990-02-26 1992-10-06 Delco Electronics Corporation Method of manufacturing CMOS integrated circuit with EEPROM
US5409568A (en) * 1992-08-04 1995-04-25 Vasche; Gregory S. Method of fabricating a microelectronic vacuum triode structure
DE69531349D1 (de) * 1995-10-31 2003-08-28 St Microelectronics Srl Spannungsgenerator für nichtflüchtige elektrisch-programmierbare Speicherzellen
US6492678B1 (en) * 2000-05-03 2002-12-10 Linear Technology Corporation High voltage MOS transistor with gate extension
US7754552B2 (en) * 2003-07-29 2010-07-13 Intel Corporation Preventing silicide formation at the gate electrode in a replacement metal gate technology
JP4670243B2 (ja) * 2004-01-29 2011-04-13 ヤマハ株式会社 Ｅｅｐｒｏｍの製法
US8541622B2 (en) 2009-06-30 2013-09-24 Nalco Company Acid gas scrubbing composition
US8461335B2 (en) 2009-06-30 2013-06-11 Nalco Company Acid gas scrubbing composition
US9555364B2 (en) 2009-06-30 2017-01-31 Nalco Company Acid gas scrubbing composition
US8318114B2 (en) 2010-04-16 2012-11-27 Nalco Company Composition for treating acid gas
JP5588293B2 (ja) * 2010-09-30 2014-09-10 セイコーインスツル株式会社 半導体不揮発性メモリ装置
US8765083B2 (en) 2010-11-19 2014-07-01 Nalco Company Acid gas absorbent composition
CN102214702B (zh) * 2011-05-23 2016-02-17 上海华虹宏力半导体制造有限公司 半导体电容器结构及其形成方法
CN103426728B (zh) * 2013-08-29 2017-06-09 上海华虹宏力半导体制造有限公司 电容器结构及其制作方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4274012A (en) * 1979-01-24 1981-06-16 Xicor, Inc. Substrate coupled floating gate memory cell
US4373250A (en) * 1980-11-17 1983-02-15 Signetics Corporation Process for fabricating a high capacity memory cell
JPS5846678A (ja) * 1981-09-14 1983-03-18 Oki Electric Ind Co Ltd Ｐｎｐｎ半導体スイツチ
NL8200756A (nl) * 1982-02-25 1983-09-16 Philips Nv Halfgeleiderinrichting en werkwijze ter vervaardiging daarvan.
JPS60226281A (ja) * 1984-04-25 1985-11-11 Hitachi Ltd ビデオカメラの信号処理装置
JPS61131486A (ja) * 1984-11-29 1986-06-19 Res Dev Corp Of Japan 半導体不揮発性メモリ
JPS61208865A (ja) * 1985-03-13 1986-09-17 Mitsubishi Electric Corp 半導体記憶装置
US4752912A (en) * 1985-05-14 1988-06-21 Xicor, Inc. Nonvolatile electrically alterable memory and method
US4599706A (en) * 1985-05-14 1986-07-08 Xicor, Inc. Nonvolatile electrically alterable memory
US4764801A (en) * 1985-10-08 1988-08-16 Motorola Inc. Poly-sidewall contact transistors
US4706102A (en) * 1985-11-07 1987-11-10 Sprague Electric Company Memory device with interconnected polysilicon layers and method for making
IT1191566B (it) * 1986-06-27 1988-03-23 Sgs Microelettronica Spa Dispositivo di memoria non labile a semiconduttore del tipo a porta non connessa (floating gate) alterabile elettricamente con area di tunnel ridotta e procedimento di fabbricazione
US4872050A (en) * 1988-03-15 1989-10-03 Mitsubishi Denki Kabushiki Kaisha Interconnection structure in semiconductor device and manufacturing method of the same

Also Published As

Publication number Publication date
US5023694A (en) 1991-06-11
JP2512181B2 (ja) 1996-07-03
DE68928501D1 (de) 1998-01-29
EP0429509B1 (de) 1997-12-17
KR0165855B1 (ko) 1999-01-15
KR900702577A (ko) 1990-12-07
WO1990001804A1 (en) 1990-02-22
EP0429509A1 (de) 1991-06-05
EP0429509A4 (en) 1992-07-08
DE68928501T2 (de) 1998-05-07
JPH04502232A (ja) 1992-04-16

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