ATE177272T1 - In standard-cmos-technologie realisierte, zwischen einer logikschaltung mit niedriger versorgungsspannung und einer ausgangsstufe mit hoher versorgungsspannung, liegende schaltung - Google Patents

In standard-cmos-technologie realisierte, zwischen einer logikschaltung mit niedriger versorgungsspannung und einer ausgangsstufe mit hoher versorgungsspannung, liegende schaltung

Info

Publication number
ATE177272T1
ATE177272T1 AT93911722T AT93911722T ATE177272T1 AT E177272 T1 ATE177272 T1 AT E177272T1 AT 93911722 T AT93911722 T AT 93911722T AT 93911722 T AT93911722 T AT 93911722T AT E177272 T1 ATE177272 T1 AT E177272T1
Authority
AT
Austria
Prior art keywords
supply voltage
circuit
output stage
cmos technology
standard cmos
Prior art date
Application number
AT93911722T
Other languages
English (en)
Inventor
Michel Declerq
Martin Schubert
Original Assignee
Ecole Polytech
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ecole Polytech filed Critical Ecole Polytech
Application granted granted Critical
Publication of ATE177272T1 publication Critical patent/ATE177272T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
AT93911722T 1992-05-18 1993-05-18 In standard-cmos-technologie realisierte, zwischen einer logikschaltung mit niedriger versorgungsspannung und einer ausgangsstufe mit hoher versorgungsspannung, liegende schaltung ATE177272T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9206030A FR2691307A1 (fr) 1992-05-18 1992-05-18 Circuit intermédiaire entre un circuit logique à basse tension et un étage de sortie à haute tension réalisés dans une technologie CMOS standard.

Publications (1)

Publication Number Publication Date
ATE177272T1 true ATE177272T1 (de) 1999-03-15

Family

ID=9429906

Family Applications (1)

Application Number Title Priority Date Filing Date
AT93911722T ATE177272T1 (de) 1992-05-18 1993-05-18 In standard-cmos-technologie realisierte, zwischen einer logikschaltung mit niedriger versorgungsspannung und einer ausgangsstufe mit hoher versorgungsspannung, liegende schaltung

Country Status (6)

Country Link
US (1) US5473268A (de)
EP (1) EP0594834B1 (de)
AT (1) ATE177272T1 (de)
DE (2) DE4231415C1 (de)
FR (1) FR2691307A1 (de)
WO (1) WO1993023926A1 (de)

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US5894227A (en) * 1996-03-15 1999-04-13 Translogic Technology, Inc. Level restoration circuit for pass logic devices
US5952847A (en) * 1996-06-25 1999-09-14 Actel Corporation Multiple logic family compatible output driver
US5929656A (en) * 1997-05-16 1999-07-27 Motorola, Inc. Method and apparatus for driving a capacitive display device
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JP3731322B2 (ja) * 1997-11-04 2006-01-05 ソニー株式会社 レベルシフト回路
US6111425A (en) * 1998-10-15 2000-08-29 International Business Machines Corporation Very low power logic circuit family with enhanced noise immunity
US6731151B1 (en) 1999-09-30 2004-05-04 Interuniversitar Micro-Elektronica Centrum (Imec Vzw) Method and apparatus for level shifting
US6331797B1 (en) 1999-11-23 2001-12-18 Philips Electronics North America Corporation Voltage translator circuit
US6362652B1 (en) 1999-12-20 2002-03-26 Fujitsu Microelectronics, Inc. High voltage buffer for submicron CMOS
US20030001628A1 (en) * 2001-06-29 2003-01-02 Intel Corporation Voltage-level converter
US6774667B1 (en) 2002-05-09 2004-08-10 Actel Corporation Method and apparatus for a flexible chargepump scheme for field-programmable gate arrays
US7378867B1 (en) * 2002-06-04 2008-05-27 Actel Corporation Field-programmable gate array low voltage differential signaling driver utilizing two complimentary output buffers
US6891394B1 (en) 2002-06-04 2005-05-10 Actel Corporation Field-programmable gate array low voltage differential signaling driver utilizing two complimentary output buffers
US6765427B1 (en) 2002-08-08 2004-07-20 Actel Corporation Method and apparatus for bootstrapping a programmable antifuse circuit
US7434080B1 (en) 2002-09-03 2008-10-07 Actel Corporation Apparatus for interfacing and testing a phase locked loop in a field programmable gate array
US6750674B1 (en) 2002-10-02 2004-06-15 Actel Corporation Carry chain for use between logic modules in a field programmable gate array
US6885218B1 (en) 2002-10-08 2005-04-26 Actel Corporation Parallel programmable antifuse field programmable gate array device (FPGA) and a method for programming and testing an antifuse FPGA
US7269814B1 (en) 2002-10-08 2007-09-11 Actel Corporation Parallel programmable antifuse field programmable gate array device (FPGA) and a method for programming and testing an antifuse FPGA
US6727726B1 (en) 2002-11-12 2004-04-27 Actel Corporation Field programmable gate array architecture including a buffer module and a method of distributing buffer modules in a field programmable gate array
US6946871B1 (en) * 2002-12-18 2005-09-20 Actel Corporation Multi-level routing architecture in a field programmable gate array having transmitters and receivers
US7385420B1 (en) 2002-12-27 2008-06-10 Actel Corporation Repeatable block producing a non-uniform routing architecture in a field programmable gate array having segmented tracks
US6891396B1 (en) 2002-12-27 2005-05-10 Actel Corporation Repeatable block producing a non-uniform routing architecture in a field programmable gate array having segmented tracks
US6838902B1 (en) 2003-05-28 2005-01-04 Actel Corporation Synchronous first-in/first-out block memory for a field programmable gate array
US6825690B1 (en) 2003-05-28 2004-11-30 Actel Corporation Clock tree network in a field programmable gate array
US7375553B1 (en) 2003-05-28 2008-05-20 Actel Corporation Clock tree network in a field programmable gate array
US6867615B1 (en) 2003-05-30 2005-03-15 Actel Corporation Dedicated input/output first in/first out module for a field programmable gate array
US7385419B1 (en) 2003-05-30 2008-06-10 Actel Corporation Dedicated input/output first in/first out module for a field programmable gate array
US20070063758A1 (en) * 2005-09-22 2007-03-22 Honeywell International Inc. Voltage divider and method for minimizing higher than rated voltages
KR100925034B1 (ko) * 2006-12-05 2009-11-03 한국전자통신연구원 비동기 디지털 신호레벨 변환회로
US20100102851A1 (en) * 2008-10-27 2010-04-29 Microchip Technology Incorporated P-Type Source Bias Virtual Ground Restoration Apparatus
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Also Published As

Publication number Publication date
DE4231415C1 (de) 1993-12-23
EP0594834A1 (de) 1994-05-04
US5473268A (en) 1995-12-05
FR2691307A1 (fr) 1993-11-19
EP0594834B1 (de) 1999-03-03
FR2691307B1 (de) 1997-02-14
WO1993023926A1 (fr) 1993-11-25
DE69323683D1 (de) 1999-04-08

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