ATE190146T1 - Speicherplattenanordnung-steuerungsvorrichtung mit paritätsfähigkeiten - Google Patents

Speicherplattenanordnung-steuerungsvorrichtung mit paritätsfähigkeiten

Info

Publication number
ATE190146T1
ATE190146T1 AT90120978T AT90120978T ATE190146T1 AT E190146 T1 ATE190146 T1 AT E190146T1 AT 90120978 T AT90120978 T AT 90120978T AT 90120978 T AT90120978 T AT 90120978T AT E190146 T1 ATE190146 T1 AT E190146T1
Authority
AT
Austria
Prior art keywords
interface
disk
buffer memory
control device
dma
Prior art date
Application number
AT90120978T
Other languages
English (en)
Inventor
Ryan A Callison
Thomas W Grieff
Kenneth L Bush
Original Assignee
Compaq Computer Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Compaq Computer Corp filed Critical Compaq Computer Corp
Application granted granted Critical
Publication of ATE190146T1 publication Critical patent/ATE190146T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Human Computer Interaction (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Detection And Correction Of Errors (AREA)
  • Bus Control (AREA)
  • Record Information Processing For Printing (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
AT90120978T 1989-11-03 1990-11-02 Speicherplattenanordnung-steuerungsvorrichtung mit paritätsfähigkeiten ATE190146T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/431,735 US5206943A (en) 1989-11-03 1989-11-03 Disk array controller with parity capabilities

Publications (1)

Publication Number Publication Date
ATE190146T1 true ATE190146T1 (de) 2000-03-15

Family

ID=23713202

Family Applications (1)

Application Number Title Priority Date Filing Date
AT90120978T ATE190146T1 (de) 1989-11-03 1990-11-02 Speicherplattenanordnung-steuerungsvorrichtung mit paritätsfähigkeiten

Country Status (7)

Country Link
US (1) US5206943A (de)
EP (1) EP0427119B1 (de)
JP (1) JP3076596B2 (de)
KR (1) KR0167556B1 (de)
AT (1) ATE190146T1 (de)
CA (1) CA2026769A1 (de)
DE (1) DE69033472D1 (de)

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US5287462A (en) * 1991-12-20 1994-02-15 Ncr Corporation Bufferless SCSI to SCSI data transfer scheme for disk array applications
JP3160106B2 (ja) * 1991-12-23 2001-04-23 ヒュンダイ エレクトロニクス アメリカ ディスクアレーの区分け方法
US5745789A (en) * 1992-01-23 1998-04-28 Hitachi, Ltd. Disc system for holding data in a form of a plurality of data blocks dispersed in a plurality of disc units connected by a common data bus
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ATE172038T1 (de) * 1992-06-05 1998-10-15 Compaq Computer Corp Plattenantriebsteuergerät mit nachschreibcachespeicher
US5408644A (en) * 1992-06-05 1995-04-18 Compaq Computer Corporation Method and apparatus for improving the performance of partial stripe operations in a disk array subsystem
US5448719A (en) * 1992-06-05 1995-09-05 Compaq Computer Corp. Method and apparatus for maintaining and retrieving live data in a posted write cache in case of power failure
US5734926A (en) * 1992-07-15 1998-03-31 Advanced Hardware Architectures Direct memory access controller in an integrated circuit
US5471586A (en) * 1992-09-22 1995-11-28 Unisys Corporation Interface system having plurality of channels and associated independent controllers for transferring data between shared buffer and peripheral devices independently
US5448709A (en) * 1992-10-13 1995-09-05 Compaq Computer Corporation Disk array controller having command descriptor blocks utilized by bus master and bus slave for respectively performing data transfer operations
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US5761402A (en) * 1993-03-08 1998-06-02 Hitachi, Ltd. Array type disk system updating redundant data asynchronously with data access
US5649162A (en) * 1993-05-24 1997-07-15 Micron Electronics, Inc. Local bus interface
US5664224A (en) * 1993-07-23 1997-09-02 Escom Ag Apparatus for selectively loading data blocks from CD-ROM disks to buffer segments using DMA operations
US5878280A (en) * 1993-09-23 1999-03-02 Philips Electronics North America Corp. Data buffering system for plural data memory arrays
US5594862A (en) * 1994-07-20 1997-01-14 Emc Corporation XOR controller for a storage subsystem
US5548788A (en) * 1994-10-27 1996-08-20 Emc Corporation Disk controller having host processor controls the time for transferring data to disk drive by modifying contents of the memory to indicate data is stored in the memory
EP0716370A3 (de) * 1994-12-06 2005-02-16 International Business Machines Corporation Ein Plattenzugangsverfahren, um Multimedia- und Videoinformation auf Wunsch über Grossraumnetze zu liefern
US5634033A (en) * 1994-12-16 1997-05-27 At&T Global Information Solutions Company Disk array storage system architecture for parity operations simultaneous with other data operations
JPH08263225A (ja) * 1995-03-22 1996-10-11 Mitsubishi Electric Corp データストレージシステム及びストレージ管理方法
US5768551A (en) * 1995-09-29 1998-06-16 Emc Corporation Inter connected loop channel for reducing electrical signal jitter
US5841997A (en) * 1995-09-29 1998-11-24 Emc Corporation Apparatus for effecting port switching of fibre channel loops
US5893138A (en) * 1995-10-02 1999-04-06 International Business Machines Corporation System and method for improving channel hardware performance for an array controller
US5737744A (en) * 1995-10-13 1998-04-07 Compaq Computer Corporation Disk array controller for performing exclusive or operations
US5838892A (en) * 1995-12-29 1998-11-17 Emc Corporation Method and apparatus for calculating an error detecting code block in a disk drive controller
US5856989A (en) * 1996-08-13 1999-01-05 Hewlett-Packard Company Method and apparatus for parity block generation
US6161165A (en) * 1996-11-14 2000-12-12 Emc Corporation High performance data path with XOR on the fly
US6098121A (en) * 1996-12-03 2000-08-01 Matsushita Electric Industrial Co., Ltd. Data transfer apparatus with improved throughput due to reduced processing overhead in interrupt process
US6654853B1 (en) 1996-12-23 2003-11-25 Lsi Logic Corporation Method of secondary to secondary data transfer with mirroring
US6151641A (en) * 1997-09-30 2000-11-21 Lsi Logic Corporation DMA controller of a RAID storage controller with integrated XOR parity computation capability adapted to compute parity in parallel with the transfer of data segments
US6085285A (en) * 1997-11-13 2000-07-04 International Business Machines Corporation Intermixing different devices along a single data communication link by placing a strobe signal in a parity bit slot
US6134630A (en) * 1997-11-14 2000-10-17 3Ware High-performance bus architecture for disk array system
US6138176A (en) * 1997-11-14 2000-10-24 3Ware Disk array controller with automated processor which routes I/O data according to addresses and commands received from disk drive controllers
US6370605B1 (en) 1999-03-04 2002-04-09 Sun Microsystems, Inc. Switch based scalable performance storage architecture
US6397267B1 (en) 1999-03-04 2002-05-28 Sun Microsystems, Inc. Redirected I/O for scalable performance storage architecture
US6349357B1 (en) * 1999-03-04 2002-02-19 Sun Microsystems, Inc. Storage architecture providing scalable performance through independent control and data transfer paths
AU1444601A (en) * 1999-10-28 2001-05-08 Ramot University Authority For Applied Research And Industrial Development Ltd. Caching techniques for improving system performance in raid applications
US6604155B1 (en) 1999-11-09 2003-08-05 Sun Microsystems, Inc. Storage architecture employing a transfer node to achieve scalable performance
US6370616B1 (en) 2000-04-04 2002-04-09 Compaq Computer Corporation Memory interface controller for datum raid operations with a datum multiplier
US6675253B1 (en) 2000-04-04 2004-01-06 Hewlett-Packard Development Company, L.P. Dynamic routing of data across multiple data paths from a source controller to a destination controller
JP2002244995A (ja) * 2001-02-20 2002-08-30 Nec Eng Ltd 入出力処理装置
US6918007B2 (en) * 2002-09-09 2005-07-12 Hewlett-Packard Development Company, L.P. Memory controller interface with XOR operations on memory read to accelerate RAID operations
US7606969B2 (en) * 2003-12-05 2009-10-20 Davinder Aggarwal Programmable logic devices
US7467238B2 (en) * 2004-02-10 2008-12-16 Hitachi, Ltd. Disk controller and storage system
JP4405277B2 (ja) * 2004-02-16 2010-01-27 株式会社日立製作所 ディスク制御装置
JP4441286B2 (ja) * 2004-02-10 2010-03-31 株式会社日立製作所 ストレージシステム
US8205019B2 (en) * 2005-09-30 2012-06-19 Intel Corporation DMA transfers of sets of data and an exclusive or (XOR) of the sets of data
US7869153B1 (en) * 2007-11-16 2011-01-11 Marvell International Ltd. Self servo write tune feature for preamps

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Also Published As

Publication number Publication date
CA2026769A1 (en) 1991-05-04
JP3076596B2 (ja) 2000-08-14
EP0427119B1 (de) 2000-03-01
KR0167556B1 (ko) 1999-01-15
EP0427119A2 (de) 1991-05-15
EP0427119A3 (en) 1993-08-04
US5206943A (en) 1993-04-27
JPH03154917A (ja) 1991-07-02
KR910010328A (ko) 1991-06-29
DE69033472D1 (de) 2000-04-06

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties