ATE210893T1 - Verfahren zur herstellung von einem halbleiterbauelement - Google Patents

Verfahren zur herstellung von einem halbleiterbauelement

Info

Publication number
ATE210893T1
ATE210893T1 AT96920938T AT96920938T ATE210893T1 AT E210893 T1 ATE210893 T1 AT E210893T1 AT 96920938 T AT96920938 T AT 96920938T AT 96920938 T AT96920938 T AT 96920938T AT E210893 T1 ATE210893 T1 AT E210893T1
Authority
AT
Austria
Prior art keywords
trench
producing
semiconductor component
filled
doped
Prior art date
Application number
AT96920938T
Other languages
English (en)
Inventor
Jonathan Leslie Evans
Original Assignee
Totem Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Totem Semiconductor Ltd filed Critical Totem Semiconductor Ltd
Application granted granted Critical
Publication of ATE210893T1 publication Critical patent/ATE210893T1/de

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • H10D30/668Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00Bonding of wafers, substrates or parts of devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01Manufacture or treatment
    • H10D12/031Manufacture or treatment of IGBTs
    • H10D12/032Manufacture or treatment of IGBTs of vertical IGBTs
    • H10D12/038Manufacture or treatment of IGBTs of vertical IGBTs having a recessed gate, e.g. trench-gate IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • H10D12/441Vertical IGBTs
    • H10D12/461Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149Source or drain regions of field-effect devices
    • H10D62/151Source or drain regions of field-effect devices of IGFETs 
    • H10D62/152Source regions of DMOS transistors
    • H10D62/154Dispositions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149Source or drain regions of field-effect devices
    • H10D62/151Source or drain regions of field-effect devices of IGFETs 
    • H10D62/152Source regions of DMOS transistors
    • H10D62/155Shapes 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/025Manufacture or treatment forming recessed gates, e.g. by using local oxidation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/025Manufacture or treatment forming recessed gates, e.g. by using local oxidation
    • H10D64/027Manufacture or treatment forming recessed gates, e.g. by using local oxidation by etching at gate locations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/512Disposition of the gate electrodes, e.g. buried gates
    • H10D64/513Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/222Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the angle between the ion beam and the crystal planes or the main crystal surface

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Memories (AREA)
  • Glass Compositions (AREA)
  • Transition And Organic Metals Composition Catalysts For Addition Polymerization (AREA)
  • Bipolar Transistors (AREA)
  • Led Devices (AREA)
  • Element Separation (AREA)
  • Electrodes Of Semiconductors (AREA)
AT96920938T 1995-06-14 1996-06-14 Verfahren zur herstellung von einem halbleiterbauelement ATE210893T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB9512089.5A GB9512089D0 (en) 1995-06-14 1995-06-14 Semiconductor device fabrication
PCT/GB1996/001445 WO1997000536A1 (en) 1995-06-14 1996-06-14 Semiconductor device fabrication

Publications (1)

Publication Number Publication Date
ATE210893T1 true ATE210893T1 (de) 2001-12-15

Family

ID=10776051

Family Applications (1)

Application Number Title Priority Date Filing Date
AT96920938T ATE210893T1 (de) 1995-06-14 1996-06-14 Verfahren zur herstellung von einem halbleiterbauelement

Country Status (12)

Country Link
US (1) US6274437B1 (de)
EP (1) EP0834194B1 (de)
JP (1) JPH11508087A (de)
KR (1) KR19990022910A (de)
AT (1) ATE210893T1 (de)
AU (1) AU6232296A (de)
CA (1) CA2220643A1 (de)
DE (1) DE69617952T2 (de)
ES (1) ES2170862T3 (de)
GB (1) GB9512089D0 (de)
MX (1) MX9710043A (de)
WO (1) WO1997000536A1 (de)

Families Citing this family (51)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2323703B (en) * 1997-03-13 2002-02-13 United Microelectronics Corp Method to inhibit the formation of ion implantation induced edge defects
JP3281844B2 (ja) * 1997-08-26 2002-05-13 三洋電機株式会社 半導体装置の製造方法
JP3281847B2 (ja) * 1997-09-26 2002-05-13 三洋電機株式会社 半導体装置の製造方法
GB9723468D0 (en) 1997-11-07 1998-01-07 Zetex Plc Method of semiconductor device fabrication
DE19908809B4 (de) * 1999-03-01 2007-02-01 Infineon Technologies Ag Verfahren zur Herstellung einer MOS-Transistorstruktur mit einstellbarer Schwellspannung
US6316806B1 (en) * 1999-03-31 2001-11-13 Fairfield Semiconductor Corporation Trench transistor with a self-aligned source
JP4091242B2 (ja) * 1999-10-18 2008-05-28 セイコーインスツル株式会社 縦形mosトランジスタ及びその製造方法
DE10009345C1 (de) * 2000-02-28 2001-07-19 Infineon Technologies Ag Feldeffekt-Transistoranordnung mit hoher Latch-up-Festigkeit und Verfahren zu deren Herstellung
US6509240B2 (en) * 2000-05-15 2003-01-21 International Rectifier Corporation Angle implant process for cellular deep trench sidewall doping
US6627949B2 (en) * 2000-06-02 2003-09-30 General Semiconductor, Inc. High voltage power MOSFET having low on-resistance
US6818946B1 (en) * 2000-08-28 2004-11-16 Semiconductor Components Industries, L.L.C. Trench MOSFET with increased channel density
GB0022149D0 (en) * 2000-09-09 2000-10-25 Zetex Plc Implantation method
US7132712B2 (en) 2002-11-05 2006-11-07 Fairchild Semiconductor Corporation Trench structure having one or more diodes embedded therein adjacent a PN junction
US6489204B1 (en) * 2001-08-20 2002-12-03 Episil Technologies, Inc. Save MOS device
US7061066B2 (en) 2001-10-17 2006-06-13 Fairchild Semiconductor Corporation Schottky diode using charge balance structure
DE10210138B4 (de) * 2002-03-07 2005-07-21 Infineon Technologies Ag Durch Feldeffekt steuerbares vertikales Halbleiterbauelement und Verfahren zu seiner Herstellung
US7091573B2 (en) 2002-03-19 2006-08-15 Infineon Technologies Ag Power transistor
DE10234996B4 (de) * 2002-03-19 2008-01-03 Infineon Technologies Ag Verfahren zur Herstellung einer Transistoranordnung mit Trench-Transistorzellen mit Feldelektrode
TWI248136B (en) 2002-03-19 2006-01-21 Infineon Technologies Ag Method for fabricating a transistor arrangement having trench transistor cells having a field electrode
US6919248B2 (en) * 2003-03-14 2005-07-19 International Rectifier Corporation Angled implant for shorter trench emitter
US7416948B2 (en) * 2003-12-30 2008-08-26 Fairchild Semiconductor Corporation Trench FET with improved body to gate alignment
US7352036B2 (en) 2004-08-03 2008-04-01 Fairchild Semiconductor Corporation Semiconductor power device having a top-side drain using a sinker trench
JP2006173429A (ja) * 2004-12-17 2006-06-29 Elpida Memory Inc 半導体装置の製造方法
US7285822B2 (en) * 2005-02-11 2007-10-23 Alpha & Omega Semiconductor, Inc. Power MOS device
US8362547B2 (en) 2005-02-11 2013-01-29 Alpha & Omega Semiconductor Limited MOS device with Schottky barrier controlling layer
DE112006000832B4 (de) 2005-04-06 2018-09-27 Fairchild Semiconductor Corporation Trenched-Gate-Feldeffekttransistoren und Verfahren zum Bilden derselben
DE102005047058B4 (de) * 2005-09-30 2009-09-24 Qimonda Ag Herstellungsverfahren für einen Graben-Transistor und entsprechender Graben-Transistor
US7446374B2 (en) 2006-03-24 2008-11-04 Fairchild Semiconductor Corporation High density trench FET with integrated Schottky diode and method of manufacture
EP1892750B1 (de) * 2006-08-23 2012-11-28 Imec Verfahren zum Dotieren eines Halbleiterbauelements vom Fin-Typ
US7544571B2 (en) * 2006-09-20 2009-06-09 Fairchild Semiconductor Corporation Trench gate FET with self-aligned features
JP4229165B2 (ja) * 2006-10-13 2009-02-25 トヨタ自動車株式会社 車両およびその制御方法
US8174067B2 (en) 2008-12-08 2012-05-08 Fairchild Semiconductor Corporation Trench-based power semiconductor devices with increased breakdown voltage characteristics
US8304829B2 (en) 2008-12-08 2012-11-06 Fairchild Semiconductor Corporation Trench-based power semiconductor devices with increased breakdown voltage characteristics
US8227855B2 (en) 2009-02-09 2012-07-24 Fairchild Semiconductor Corporation Semiconductor devices with stable and controlled avalanche characteristics and methods of fabricating the same
US8148749B2 (en) 2009-02-19 2012-04-03 Fairchild Semiconductor Corporation Trench-shielded semiconductor device
US8049276B2 (en) 2009-06-12 2011-11-01 Fairchild Semiconductor Corporation Reduced process sensitivity of electrode-semiconductor rectifiers
KR101186011B1 (ko) 2009-11-27 2012-09-25 에스케이하이닉스 주식회사 반도체 소자 및 그의 형성 방법
JP2011134985A (ja) * 2009-12-25 2011-07-07 Fuji Electric Co Ltd トレンチゲート型半導体装置とその製造方法
WO2011108191A1 (ja) * 2010-03-05 2011-09-09 パナソニック株式会社 半導体装置の製造方法および半導体装置
US9553185B2 (en) 2010-05-27 2017-01-24 Fuji Electric Co., Ltd. MOS-driven semiconductor device and method for manufacturing MOS-driven semiconductor device
JP5537359B2 (ja) * 2010-09-15 2014-07-02 株式会社東芝 半導体装置
JP5767869B2 (ja) * 2011-06-22 2015-08-26 新電元工業株式会社 半導体装置の製造方法
JP5661583B2 (ja) * 2011-09-21 2015-01-28 株式会社東芝 半導体装置の製造方法
TWI455246B (zh) * 2012-01-02 2014-10-01 華亞科技股份有限公司 隔離區的形成方法及其結構
KR101862345B1 (ko) * 2012-02-27 2018-07-05 삼성전자주식회사 모오스 전계효과 트랜지스터를 포함하는 반도체 장치 및 그 제조 방법
CN104241356B (zh) * 2013-06-17 2017-05-24 北大方正集团有限公司 一种dmos器件及其制作方法
US10505028B2 (en) 2015-09-16 2019-12-10 Fuji Electric Co., Ltd. Semiconductor device including a shoulder portion and manufacturing method
JP6822088B2 (ja) * 2016-11-15 2021-01-27 富士電機株式会社 炭化珪素半導体装置および炭化珪素半導体装置の製造方法
CN108346665B (zh) * 2017-01-23 2021-03-09 联华电子股份有限公司 半导体元件及其制作方法
JP7056163B2 (ja) 2018-01-17 2022-04-19 富士電機株式会社 半導体装置
KR102789286B1 (ko) * 2019-03-29 2025-04-01 삼성전자주식회사 캐패시터를 포함하는 반도체 소자 및 그 제조 방법

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2341154C2 (de) * 1973-08-14 1975-06-26 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung einer Zweiphasen-Ladungsverschiebeanordnung
US4140558A (en) * 1978-03-02 1979-02-20 Bell Telephone Laboratories, Incorporated Isolation of integrated circuits utilizing selective etching and diffusion
US4415371A (en) * 1980-12-29 1983-11-15 Rockwell International Corporation Method of making sub-micron dimensioned NPN lateral transistor
US4824793A (en) * 1984-09-27 1989-04-25 Texas Instruments Incorporated Method of making DRAM cell with trench capacitor
US4939104A (en) * 1984-10-31 1990-07-03 Texas Instruments, Incorporated Method for forming a buried lateral contact
US4698104A (en) * 1984-12-06 1987-10-06 Xerox Corporation Controlled isotropic doping of semiconductor materials
NL8502765A (nl) * 1985-10-10 1987-05-04 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting.
EP0234244A3 (de) * 1986-01-24 1989-11-15 Siemens Aktiengesellschaft Verfahren um vertikale Seitenwände und Böden von Vertiefungen zu dotieren
JPS62279666A (ja) * 1986-05-28 1987-12-04 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
US4861729A (en) * 1987-08-24 1989-08-29 Matsushita Electric Industrial Co., Ltd. Method of doping impurities into sidewall of trench by use of plasma source
JP2506830B2 (ja) * 1987-10-21 1996-06-12 松下電器産業株式会社 半導体装置の製造方法
US5100823A (en) * 1988-02-29 1992-03-31 Motorola, Inc. Method of making buried stacked transistor-capacitor
JPH01227468A (ja) * 1988-03-08 1989-09-11 Oki Electric Ind Co Ltd 半導体記憶装置
US5283201A (en) * 1988-05-17 1994-02-01 Advanced Power Technology, Inc. High density power device fabrication process
US5108938A (en) * 1989-03-21 1992-04-28 Grumman Aerospace Corporation Method of making a trench gate complimentary metal oxide semiconductor transistor
JP2689606B2 (ja) * 1989-05-24 1997-12-10 富士電機株式会社 絶縁ゲート電界効果型トランジスタの製造方法
JPH0410640A (ja) 1990-04-27 1992-01-14 Mitsubishi Electric Corp 半導体装置の製造方法
MY107475A (en) * 1990-05-31 1995-12-30 Canon Kk Semiconductor device and method for producing the same.
KR930002673B1 (ko) * 1990-07-05 1993-04-07 삼성전자 주식회사 고융점금속 성장방법
KR940006679B1 (ko) * 1991-09-26 1994-07-25 현대전자산업 주식회사 수직형 트랜지스터를 갖는 dram셀 및 그 제조방법
US5391506A (en) * 1992-01-31 1995-02-21 Kawasaki Steel Corporation Manufacturing method for semiconductor devices with source/drain formed in substrate projection.
JP2837014B2 (ja) * 1992-02-17 1998-12-14 三菱電機株式会社 半導体装置及びその製造方法
JP3311070B2 (ja) * 1993-03-15 2002-08-05 株式会社東芝 半導体装置

Also Published As

Publication number Publication date
CA2220643A1 (en) 1997-01-03
KR19990022910A (ko) 1999-03-25
EP0834194A1 (de) 1998-04-08
EP0834194B1 (de) 2001-12-12
ES2170862T3 (es) 2002-08-16
GB9512089D0 (en) 1995-08-09
WO1997000536A1 (en) 1997-01-03
MX9710043A (es) 1998-03-31
DE69617952T2 (de) 2002-08-22
US6274437B1 (en) 2001-08-14
JPH11508087A (ja) 1999-07-13
AU6232296A (en) 1997-01-15
DE69617952D1 (de) 2002-01-24

Similar Documents

Publication Publication Date Title
ATE210893T1 (de) Verfahren zur herstellung von einem halbleiterbauelement
DE60036410D1 (de) Methoden zur herstellung einer feldeffekttransistor-struktur mit teilweise isolierten source/drain-übergängen
ATE374435T1 (de) Verfahren zur herstellung einer halbleiteranordnung mit einer versenkten isolierschicht mit veränderlicher dicke
ATE515063T1 (de) Vertikale leistungshalbleiteranordnung und verfahren zu deren herstellung
DE69535441D1 (de) Verfahren zur herstellung eines mos gesteuerten bauelements mit reduzierter maskenzahl
DE3582845D1 (de) Verfahren zur herstellung von halbleiterstrukturen und anordnungen mit organischen dielektrischen materialien gefuellten graeben.
DE69431385D1 (de) Verfahren zur Herstellung von Silizium-Halbleiterplättchen
CA2206346A1 (en) Contoured-tub fermi-threshold field effect transistor and method of forming same
DE3587617D1 (de) Verfahren zur herstellung von bipolaren halbleiteranordnungen.
DE69525444D1 (de) Verfahren zur herstellung von biologisch aktiven siliziumverbindungen in konzentrierter form
DE69727303D1 (de) Verfahren zur herstellung von halbleiterscheiben grosser abmessungen
DE69806155D1 (de) Verfahren zur epoxidierung von olefinen mit wasserstoffperoxid
WO2000030181A3 (de) Feldeffektgesteuerter transistor und verfahren zu dessen herstellung
EA199900509A1 (ru) Способ герметизации микросхемы на кристаллодержателе
DE60232855D1 (de) Verfahren zur Herstellung von Halbleiteranordnungen mit Graben-Gate
DE69934384D1 (de) Verfahren zur herstellung von seitlich dielektrisch isolierten halbleiterbauelementen
DE3686132D1 (de) Verfahren zur herstellung von selbstalignierten halbleiterstrukturen.
DE59912665D1 (de) Verfahren zur Herstellung von Leistungshalbleiterbauelementen
DE59913157D1 (de) Verfahren zur Herstellung einer MOS-Transistoranordnung
EP0148595A3 (de) Verfahren zum Herstellen eines Mesa-MOSFET unter Verwendung von Überhangmasken und daraus resultierende Anordnung
DE59309740D1 (de) Lyopilisierte, wirkstoffhaltige emulsion
DE69507077D1 (de) Lichtgesteuerter Heterostruktur-Halbleiterbaustein zur Erzeugung von Mikrowellen
JPS5418684A (en) Manufacture of semiconductor device
JPS53118981A (en) Semiconductor device
JPS53125778A (en) Semiconductor device

Legal Events

Date Code Title Description
UEP Publication of translation of european patent specification
REN Ceased due to non-payment of the annual fee