ATE223105T1 - Mehrpegeldaten durch eine einzige eingangs- /ausgangspinne - Google Patents

Mehrpegeldaten durch eine einzige eingangs- /ausgangspinne

Info

Publication number
ATE223105T1
ATE223105T1 AT99934361T AT99934361T ATE223105T1 AT E223105 T1 ATE223105 T1 AT E223105T1 AT 99934361 T AT99934361 T AT 99934361T AT 99934361 T AT99934361 T AT 99934361T AT E223105 T1 ATE223105 T1 AT E223105T1
Authority
AT
Austria
Prior art keywords
data
output pin
pins
single input
cycle
Prior art date
Application number
AT99934361T
Other languages
English (en)
Inventor
Scott J Derner
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Application granted granted Critical
Publication of ATE223105T1 publication Critical patent/ATE223105T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/066—Means for reducing external access-lines for a semiconductor memory clip, e.g. by multiplexing at least address and data signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Radio Relay Systems (AREA)
  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
  • Logic Circuits (AREA)
  • Static Random-Access Memory (AREA)
  • Microcomputers (AREA)
AT99934361T 1998-02-23 1999-02-23 Mehrpegeldaten durch eine einzige eingangs- /ausgangspinne ATE223105T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/027,978 US5896337A (en) 1998-02-23 1998-02-23 Circuits and methods for multi-level data through a single input/ouput pin
PCT/US1999/003822 WO1999043003A1 (en) 1998-02-23 1999-02-23 Multi-level data through a single input/output pin

Publications (1)

Publication Number Publication Date
ATE223105T1 true ATE223105T1 (de) 2002-09-15

Family

ID=21840885

Family Applications (1)

Application Number Title Priority Date Filing Date
AT99934361T ATE223105T1 (de) 1998-02-23 1999-02-23 Mehrpegeldaten durch eine einzige eingangs- /ausgangspinne

Country Status (8)

Country Link
US (5) US5896337A (de)
EP (1) EP1066637B1 (de)
JP (1) JP3866036B2 (de)
KR (1) KR100372499B1 (de)
AT (1) ATE223105T1 (de)
AU (1) AU3306099A (de)
DE (1) DE69902642T2 (de)
WO (1) WO1999043003A1 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5896337A (en) 1998-02-23 1999-04-20 Micron Technology, Inc. Circuits and methods for multi-level data through a single input/ouput pin
KR100321745B1 (ko) * 1998-06-29 2002-06-20 박종섭 외부메모리액세스를위한마이크로컨트롤러유닛
KR100297716B1 (ko) * 1998-09-03 2001-08-07 윤종용 높은멀티비트자유도의반도체메모리장치
JP2002237195A (ja) * 2001-02-13 2002-08-23 Mitsubishi Electric Corp 半導体記憶装置
KR100411394B1 (ko) * 2001-06-29 2003-12-18 주식회사 하이닉스반도체 메모리장치의 데이터출력회로
US6967591B1 (en) * 2002-04-15 2005-11-22 Linear Technology Corporation Multi-bit digital input using a single pin
KR100527529B1 (ko) * 2002-12-13 2005-11-09 주식회사 하이닉스반도체 입출력 대역폭을 조절할 수 있는 메모리 장치
KR100506936B1 (ko) * 2003-04-15 2005-08-05 삼성전자주식회사 집적 회로의 입출력 인터페이스 회로 및 방법
US6999370B2 (en) * 2003-08-06 2006-02-14 International Business Machines Corporation Low power circuits with small voltage swing transmission, voltage regeneration, and wide bandwidth architecture
EP2380985B1 (de) 2003-09-23 2014-01-01 University of North Carolina at Chapel Hill Vitamin-K-Epoxid-Reduktase exprimierende Zellen und deren Verwendung
DE602004026897D1 (de) 2003-10-14 2010-06-10 Baxter Healthcare Sa Vkorc1 (vitamin k epoxide recycling polypeptide), ein therapeutisches ziel für coumarin und deren derivate
US7885402B2 (en) * 2003-11-21 2011-02-08 Hewlett-Packard Development Company, L.P. Gain control
US20060140007A1 (en) * 2004-12-29 2006-06-29 Raul-Adrian Cernea Non-volatile memory and method with shared processing for an aggregate of read/write circuits
US20090325226A1 (en) 2005-03-15 2009-12-31 Stafford Darrel W Methods and Compositions for Producing Active Vitamin K-Dependent Proteins
US7721616B2 (en) * 2005-12-05 2010-05-25 Gm Global Technology Operations, Inc. Sprung gear set and method
KR100837270B1 (ko) * 2006-06-07 2008-06-11 삼성전자주식회사 스마트 카드 및 그것의 데이터 보안 방법
US8250940B2 (en) * 2006-07-20 2012-08-28 Steering Solutions Ip Holding Corporation System and method for controlling contact between members in operable communication
US20080315917A1 (en) * 2007-06-21 2008-12-25 Micron Technology, Inc. Programmable computing array
US8347251B2 (en) * 2007-12-31 2013-01-01 Sandisk Corporation Integrated circuit and manufacturing process facilitating selective configuration for electromagnetic compatibility
KR100943137B1 (ko) * 2008-05-13 2010-02-18 주식회사 하이닉스반도체 불휘발성 메모리 장치의 테스트 방법
US9631002B2 (en) 2010-12-21 2017-04-25 The University Of North Carolina At Chapel Hill Methods and compositions for producing active vitamin K-dependent proteins

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US3935476A (en) 1974-12-13 1976-01-27 Mostek Corporation Combination output/input logic for integrated circuit
US4434474A (en) 1981-05-15 1984-02-28 Rockwell International Corporation Single pin time-sharing for serially inputting and outputting data from state machine register apparatus
JPS58115547A (ja) 1981-12-29 1983-07-09 Fujitsu Ltd マイクロプロセツサの動作モ−ド設定方式
US4774422A (en) 1987-05-01 1988-09-27 Digital Equipment Corporation High speed low pin count bus interface
JPH0362246A (ja) 1989-07-31 1991-03-18 Nec Corp 半導体集積回路
US5228000A (en) * 1990-08-02 1993-07-13 Mitsubishi Denki Kabushiki Kaisha Test circuit of semiconductor memory device
US5230196A (en) 1990-09-05 1993-07-27 World Shelters, Inc. Polyhedron building system
US5218569A (en) * 1991-02-08 1993-06-08 Banks Gerald J Electrically alterable non-volatile memory with n-bits per memory cell
GB2253078A (en) * 1991-02-21 1992-08-26 Radamec Group Plc Apparatus for the storage and playback of spoken messages
KR930008042B1 (ko) * 1991-04-03 1993-08-25 삼성전자 주식회사 마이크로 콘트롤러 유닛
US5175450A (en) * 1991-08-23 1992-12-29 Micron Technology, Inc. Apparatus for providing multi-level potentials at a sense node
DE4135220C1 (de) * 1991-10-25 1993-04-08 Smartdiskette Gmbh, 6270 Idstein, De
US5367655A (en) * 1991-12-23 1994-11-22 Motorola, Inc. Memory and associated method including an operating mode for simultaneously selecting multiple rows of cells
US5339079A (en) 1992-03-30 1994-08-16 Motorola, Inc. Digital-to-analog converter with a flexible data interface
JPH0784870A (ja) * 1993-06-30 1995-03-31 Sanyo Electric Co Ltd 記憶回路
JP3179943B2 (ja) * 1993-07-12 2001-06-25 株式会社東芝 半導体記憶装置
US5689462A (en) * 1995-12-22 1997-11-18 Townsend And Townsend And Crew, Llp Parallel output buffers in memory circuits
US5675336A (en) * 1996-02-15 1997-10-07 General Electric Company Analog memory unit
US5777488A (en) 1996-04-19 1998-07-07 Seeq Technology, Inc. Integrated circuit I/O node useable for configuration input at reset and normal output at other times
JPH10223000A (ja) 1997-02-04 1998-08-21 Mitsubishi Electric Corp 半導体記憶装置
JPH1185403A (ja) 1997-09-12 1999-03-30 Takatori Ikueikai:Kk データ入力回路
US5896337A (en) * 1998-02-23 1999-04-20 Micron Technology, Inc. Circuits and methods for multi-level data through a single input/ouput pin

Also Published As

Publication number Publication date
AU3306099A (en) 1999-09-06
KR100372499B1 (ko) 2003-02-15
US6525958B2 (en) 2003-02-25
WO1999043003A1 (en) 1999-08-26
JP3866036B2 (ja) 2007-01-10
US6307800B1 (en) 2001-10-23
KR20010041215A (ko) 2001-05-15
US20020080671A1 (en) 2002-06-27
US5896337A (en) 1999-04-20
US20020089880A1 (en) 2002-07-11
DE69902642D1 (de) 2002-10-02
US20020075742A1 (en) 2002-06-20
US6519190B2 (en) 2003-02-11
EP1066637A1 (de) 2001-01-10
JP2002504735A (ja) 2002-02-12
US6515915B2 (en) 2003-02-04
EP1066637B1 (de) 2002-08-28
DE69902642T2 (de) 2003-04-24

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties