ATE230161T1 - Silizium auf porösen silizium, verfahren zur herstellung und produkt - Google Patents
Silizium auf porösen silizium, verfahren zur herstellung und produktInfo
- Publication number
- ATE230161T1 ATE230161T1 AT91920076T AT91920076T ATE230161T1 AT E230161 T1 ATE230161 T1 AT E230161T1 AT 91920076 T AT91920076 T AT 91920076T AT 91920076 T AT91920076 T AT 91920076T AT E230161 T1 ATE230161 T1 AT E230161T1
- Authority
- AT
- Austria
- Prior art keywords
- silicon
- porous
- porous silicon
- pct
- date
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
- H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2901—Materials
- H10P14/2902—Materials being Group IVA materials
- H10P14/2905—Silicon, silicon germanium or germanium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3202—Materials thereof
- H10P14/3204—Materials thereof being Group IVA semiconducting materials
- H10P14/3211—Silicon, silicon germanium or germanium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
- H10P14/3411—Silicon, silicon germanium or germanium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
- H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
- H10P90/191—Preparing SOI wafers using full isolation by porous oxide silicon [FIPOS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S118/00—Coating apparatus
- Y10S118/01—Anti-offset
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S118/00—Coating apparatus
- Y10S118/03—Container-related coater
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/96—Porous semiconductor
Landscapes
- Element Separation (AREA)
- Recrystallisation Techniques (AREA)
- Silicon Compounds (AREA)
- Thin Film Transistor (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB909025236A GB9025236D0 (en) | 1990-11-20 | 1990-11-20 | Silicon-on porous-silicon;method of production |
| PCT/GB1991/002029 WO1992009104A1 (en) | 1990-11-20 | 1991-11-18 | Silicon-on-porous-silicon; method of production and material |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE230161T1 true ATE230161T1 (de) | 2003-01-15 |
Family
ID=10685692
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT91920076T ATE230161T1 (de) | 1990-11-20 | 1991-11-18 | Silizium auf porösen silizium, verfahren zur herstellung und produkt |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US5387541A (de) |
| EP (1) | EP0558554B1 (de) |
| JP (1) | JP3143473B2 (de) |
| AT (1) | ATE230161T1 (de) |
| CA (1) | CA2094237A1 (de) |
| DE (1) | DE69133183T2 (de) |
| GB (2) | GB9025236D0 (de) |
| WO (1) | WO1992009104A1 (de) |
Families Citing this family (40)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7148119B1 (en) | 1994-03-10 | 2006-12-12 | Canon Kabushiki Kaisha | Process for production of semiconductor substrate |
| CN1132223C (zh) | 1995-10-06 | 2003-12-24 | 佳能株式会社 | 半导体衬底及其制造方法 |
| SG55413A1 (en) * | 1996-11-15 | 1998-12-21 | Method Of Manufacturing Semico | Method of manufacturing semiconductor article |
| EP0996967B1 (de) * | 1997-06-30 | 2008-11-19 | Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V. | Verfahren zur Herstellung von schichtartigen Gebilden auf einem Halbleitersubstrat, Halbleitersubstrat sowie mittels des Verfahrens hergestellte Halbleiterbauelemente |
| DE19802131B4 (de) * | 1998-01-21 | 2007-03-15 | Robert Bosch Gmbh | Verfahren zur Herstellung einer monokristallinen Schicht aus einem leitenden oder halbleitenden Material |
| US6197654B1 (en) * | 1998-08-21 | 2001-03-06 | Texas Instruments Incorporated | Lightly positively doped silicon wafer anodization process |
| AU2001248861A1 (en) * | 2000-11-30 | 2002-06-11 | Telephus, Inc. | Fabrication method of selectively oxidized porous silicon (sops) layer and multi-chip package using the same |
| US6717212B2 (en) * | 2001-06-12 | 2004-04-06 | Advanced Micro Devices, Inc. | Leaky, thermally conductive insulator material (LTCIM) in semiconductor-on-insulator (SOI) structure |
| KR20030064536A (ko) * | 2002-01-28 | 2003-08-02 | 텔레포스 주식회사 | 산화된 다공성 실리콘층을 이용한 고주파 소자 |
| KR20050013108A (ko) * | 2002-05-29 | 2005-02-02 | 더 보드 오브 트러스티스 오브 더 리랜드 스탠포드 주니어 유니버시티 | 금속막의 산화로 형성된 나노급 다공성기판상의 전해질 박막 |
| US6908833B1 (en) * | 2003-02-14 | 2005-06-21 | National Semiconductor Corporation | Shallow self isolated doped implanted silicon process |
| US7566482B2 (en) * | 2003-09-30 | 2009-07-28 | International Business Machines Corporation | SOI by oxidation of porous silicon |
| KR100773555B1 (ko) * | 2006-07-21 | 2007-11-06 | 삼성전자주식회사 | 저결함 반도체 기판 및 그 제조방법 |
| SG11201600853UA (en) | 2013-08-05 | 2016-03-30 | Twist Bioscience Corp | De novo synthesized gene libraries |
| US10669304B2 (en) | 2015-02-04 | 2020-06-02 | Twist Bioscience Corporation | Methods and devices for de novo oligonucleic acid assembly |
| CA2975855C (en) | 2015-02-04 | 2025-09-23 | Twist Bioscience Corporation | SYNTHETIC GENE COMPOSITIONS AND ASSEMBLY METHODS |
| US9899274B2 (en) | 2015-03-16 | 2018-02-20 | International Business Machines Corporation | Low-cost SOI FinFET technology |
| US9981239B2 (en) | 2015-04-21 | 2018-05-29 | Twist Bioscience Corporation | Devices and methods for oligonucleic acid library synthesis |
| EP3350314A4 (de) | 2015-09-18 | 2019-02-06 | Twist Bioscience Corporation | Oligonukleinsäurevariantenbibliotheken variante und synthese davon |
| KR102794025B1 (ko) | 2015-09-22 | 2025-04-09 | 트위스트 바이오사이언스 코포레이션 | 핵산 합성을 위한 가요성 기판 |
| CN115920796A (zh) | 2015-12-01 | 2023-04-07 | 特韦斯特生物科学公司 | 功能化表面及其制备 |
| EP3500672A4 (de) | 2016-08-22 | 2020-05-20 | Twist Bioscience Corporation | De-novo-synthetisierte nukleinsäure-bibliotheken |
| US10417457B2 (en) | 2016-09-21 | 2019-09-17 | Twist Bioscience Corporation | Nucleic acid based data storage |
| GB2573069A (en) | 2016-12-16 | 2019-10-23 | Twist Bioscience Corp | Variant libraries of the immunological synapse and synthesis thereof |
| EP4556433A3 (de) | 2017-02-22 | 2025-08-06 | Twist Bioscience Corporation | Nukleinsäurebasierte datenspeicherung |
| WO2018170169A1 (en) | 2017-03-15 | 2018-09-20 | Twist Bioscience Corporation | Variant libraries of the immunological synapse and synthesis thereof |
| WO2018231872A1 (en) | 2017-06-12 | 2018-12-20 | Twist Bioscience Corporation | Methods for seamless nucleic acid assembly |
| WO2018231864A1 (en) | 2017-06-12 | 2018-12-20 | Twist Bioscience Corporation | Methods for seamless nucleic acid assembly |
| US11407837B2 (en) | 2017-09-11 | 2022-08-09 | Twist Bioscience Corporation | GPCR binding proteins and synthesis thereof |
| CN111565834B (zh) | 2017-10-20 | 2022-08-26 | 特韦斯特生物科学公司 | 用于多核苷酸合成的加热的纳米孔 |
| KR102804057B1 (ko) | 2018-01-04 | 2025-05-07 | 트위스트 바이오사이언스 코포레이션 | Dna 기반 디지털 정보 저장 |
| CA3100739A1 (en) | 2018-05-18 | 2019-11-21 | Twist Bioscience Corporation | Polynucleotides, reagents, and methods for nucleic acid hybridization |
| WO2020139871A1 (en) | 2018-12-26 | 2020-07-02 | Twist Bioscience Corporation | Highly accurate de novo polynucleotide synthesis |
| JP2022522668A (ja) | 2019-02-26 | 2022-04-20 | ツイスト バイオサイエンス コーポレーション | 抗体を最適化するための変異体核酸ライブラリ |
| CN113766930B (zh) | 2019-02-26 | 2025-07-22 | 特韦斯特生物科学公司 | Glp1受体的变异核酸文库 |
| US11332738B2 (en) | 2019-06-21 | 2022-05-17 | Twist Bioscience Corporation | Barcode-based nucleic acid sequence assembly |
| JP2022548783A (ja) | 2019-09-23 | 2022-11-21 | ツイスト バイオサイエンス コーポレーション | 単一ドメイン抗体のバリアント核酸ライブラリー |
| EP4034566A4 (de) | 2019-09-23 | 2024-01-24 | Twist Bioscience Corporation | Variante nukleinsäurebibliotheken für crth2 |
| BR112022011235A2 (pt) | 2019-12-09 | 2022-12-13 | Twist Bioscience Corp | Bibliotecas de variantes de ácido nucleico para receptores de adenosina |
| US20250062157A1 (en) * | 2023-08-17 | 2025-02-20 | Murata Manufacturing Co., Ltd. | Shallow Trench Isolation using Porous Semiconductor |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE220814C (de) * | 1900-01-01 | |||
| DE220812C (de) * | ||||
| JPS56648A (en) * | 1979-06-14 | 1981-01-07 | Shibaura Denshi Seisakusho:Kk | Humidity measuring method |
| JPS61177744A (ja) * | 1985-02-01 | 1986-08-09 | Toko Inc | 半導体集積回路用基板の製造方法 |
| FR2620571B1 (fr) * | 1987-09-11 | 1990-01-12 | France Etat | Procede de fabrication d'une structure de silicium sur isolant |
| US5238858A (en) * | 1988-10-31 | 1993-08-24 | Sharp Kabushiki Kaisha | Ion implantation method |
| US5023200A (en) * | 1988-11-22 | 1991-06-11 | The United States Of America As Represented By The United States Department Of Energy | Formation of multiple levels of porous silicon for buried insulators and conductors in silicon device technologies |
-
1990
- 1990-11-20 GB GB909025236A patent/GB9025236D0/en active Pending
-
1991
- 1991-11-18 EP EP91920076A patent/EP0558554B1/de not_active Expired - Lifetime
- 1991-11-18 JP JP03518117A patent/JP3143473B2/ja not_active Expired - Fee Related
- 1991-11-18 CA CA002094237A patent/CA2094237A1/en not_active Abandoned
- 1991-11-18 US US08/050,401 patent/US5387541A/en not_active Expired - Lifetime
- 1991-11-18 AT AT91920076T patent/ATE230161T1/de not_active IP Right Cessation
- 1991-11-18 DE DE69133183T patent/DE69133183T2/de not_active Expired - Fee Related
- 1991-11-18 WO PCT/GB1991/002029 patent/WO1992009104A1/en not_active Ceased
-
1993
- 1993-04-06 GB GB9307147A patent/GB2271465B/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| GB2271465B (en) | 1994-10-26 |
| EP0558554A1 (de) | 1993-09-08 |
| JPH06502280A (ja) | 1994-03-10 |
| GB2271465A (en) | 1994-04-13 |
| GB9307147D0 (en) | 1993-06-09 |
| GB9025236D0 (en) | 1991-01-02 |
| US5387541A (en) | 1995-02-07 |
| CA2094237A1 (en) | 1992-05-21 |
| DE69133183T2 (de) | 2003-08-21 |
| DE69133183D1 (de) | 2003-01-30 |
| JP3143473B2 (ja) | 2001-03-07 |
| WO1992009104A1 (en) | 1992-05-29 |
| EP0558554B1 (de) | 2002-12-18 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |