ATE231308T1 - Verfahren zum phasenvergleich und phasenkomparator - Google Patents
Verfahren zum phasenvergleich und phasenkomparatorInfo
- Publication number
- ATE231308T1 ATE231308T1 AT98939667T AT98939667T ATE231308T1 AT E231308 T1 ATE231308 T1 AT E231308T1 AT 98939667 T AT98939667 T AT 98939667T AT 98939667 T AT98939667 T AT 98939667T AT E231308 T1 ATE231308 T1 AT E231308T1
- Authority
- AT
- Austria
- Prior art keywords
- signal
- state machine
- phase
- compared
- handshaking
- Prior art date
Links
- 230000004913 activation Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D13/00—Circuits for comparing the phase or frequency of two mutually-independent oscillations
- H03D13/003—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means
- H03D13/004—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means the logic means delivering pulses at more than one terminal, e.g. up and down pulses
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
- Pyrane Compounds (AREA)
- Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
- Heterocyclic Carbon Compounds Containing A Hetero Ring Having Oxygen Or Sulfur (AREA)
- Measuring Phase Differences (AREA)
- Control Of Electric Motors In General (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
- Information Transfer Systems (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FI973421A FI103538B (fi) | 1997-08-20 | 1997-08-20 | Menetelmä vaihevertailun suorittamiseksi ja vaihevertailija |
| PCT/FI1998/000634 WO1999009654A2 (en) | 1997-08-20 | 1998-08-18 | Method for performing phase comparison, and phase comparator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE231308T1 true ATE231308T1 (de) | 2003-02-15 |
Family
ID=8549392
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT98939667T ATE231308T1 (de) | 1997-08-20 | 1998-08-18 | Verfahren zum phasenvergleich und phasenkomparator |
Country Status (11)
| Country | Link |
|---|---|
| US (1) | US6532257B1 (de) |
| EP (1) | EP0938779B1 (de) |
| JP (1) | JP4166841B2 (de) |
| CN (1) | CN1169297C (de) |
| AT (1) | ATE231308T1 (de) |
| AU (1) | AU745305B2 (de) |
| DE (1) | DE69810748T2 (de) |
| ES (1) | ES2191956T3 (de) |
| FI (1) | FI103538B (de) |
| NO (1) | NO991859L (de) |
| WO (1) | WO1999009654A2 (de) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6873183B1 (en) * | 2003-05-12 | 2005-03-29 | Xilinx, Inc. | Method and circuit for glitchless clock control |
| US7129765B2 (en) | 2004-04-30 | 2006-10-31 | Xilinx, Inc. | Differential clock tree in an integrated circuit |
| CN115800992B (zh) * | 2023-02-07 | 2023-06-02 | 浪潮电子信息产业股份有限公司 | 一种握手信号的拆分电路、方法、装置、设备及存储介质 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3130156C2 (de) | 1981-07-30 | 1986-11-27 | Siemens AG, 1000 Berlin und 8000 München | Digitaler Frequenz-Phasenkomparator |
| US4814726A (en) | 1987-08-17 | 1989-03-21 | National Semiconductor Corporation | Digital phase comparator/charge pump with zero deadband and minimum offset |
| EP0520558A1 (de) | 1991-06-27 | 1992-12-30 | Philips Electronics N.V. | Phasenverriegelungsschleife und Digital-Phasenkomparator zur Verwendung in einer Phasenverriegelungsschleife |
| GB2262415B (en) * | 1991-12-13 | 1995-08-16 | Digital Equipment Int | Handshake synchronization system |
| US5744983A (en) * | 1995-05-03 | 1998-04-28 | Intel Corporation | Phase detector with edge-sensitive enable and disable |
| US5583458A (en) * | 1995-05-03 | 1996-12-10 | Intel Corporation | Phase detector with edge-sensitive enable and disable |
| BR9612025A (pt) | 1995-12-15 | 1999-06-29 | Ericsson Telefon Ab L M | Circuito em anel de retenção de fase digital e estação base |
| US5920207A (en) * | 1997-11-05 | 1999-07-06 | Hewlett Packard Company | Asynchronous phase detector having a variable dead zone |
| US6239626B1 (en) * | 2000-01-07 | 2001-05-29 | Cisco Technology, Inc. | Glitch-free clock selector |
-
1997
- 1997-08-20 FI FI973421A patent/FI103538B/fi not_active IP Right Cessation
-
1998
- 1998-08-18 ES ES98939667T patent/ES2191956T3/es not_active Expired - Lifetime
- 1998-08-18 CN CNB988011905A patent/CN1169297C/zh not_active Expired - Fee Related
- 1998-08-18 AT AT98939667T patent/ATE231308T1/de not_active IP Right Cessation
- 1998-08-18 DE DE69810748T patent/DE69810748T2/de not_active Expired - Lifetime
- 1998-08-18 JP JP51285299A patent/JP4166841B2/ja not_active Expired - Fee Related
- 1998-08-18 WO PCT/FI1998/000634 patent/WO1999009654A2/en not_active Ceased
- 1998-08-18 EP EP98939667A patent/EP0938779B1/de not_active Expired - Lifetime
- 1998-08-18 US US09/269,978 patent/US6532257B1/en not_active Expired - Lifetime
- 1998-08-18 AU AU88095/98A patent/AU745305B2/en not_active Ceased
-
1999
- 1999-04-19 NO NO991859A patent/NO991859L/no unknown
Also Published As
| Publication number | Publication date |
|---|---|
| EP0938779B1 (de) | 2003-01-15 |
| JP2001505028A (ja) | 2001-04-10 |
| FI103538B1 (fi) | 1999-07-15 |
| FI973421A7 (fi) | 1999-02-21 |
| EP0938779A2 (de) | 1999-09-01 |
| NO991859D0 (no) | 1999-04-19 |
| ES2191956T3 (es) | 2003-09-16 |
| NO991859L (no) | 1999-04-19 |
| CN1169297C (zh) | 2004-09-29 |
| AU8809598A (en) | 1999-03-08 |
| FI973421A0 (fi) | 1997-08-20 |
| WO1999009654A3 (en) | 1999-06-03 |
| JP4166841B2 (ja) | 2008-10-15 |
| DE69810748T2 (de) | 2003-10-02 |
| AU745305B2 (en) | 2002-03-21 |
| WO1999009654A2 (en) | 1999-02-25 |
| DE69810748D1 (de) | 2003-02-20 |
| CN1237289A (zh) | 1999-12-01 |
| FI103538B (fi) | 1999-07-15 |
| US6532257B1 (en) | 2003-03-11 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |