ATE249676T1 - Prüfungsschaltung zum trimmen von referenzzellen - Google Patents

Prüfungsschaltung zum trimmen von referenzzellen

Info

Publication number
ATE249676T1
ATE249676T1 AT01920327T AT01920327T ATE249676T1 AT E249676 T1 ATE249676 T1 AT E249676T1 AT 01920327 T AT01920327 T AT 01920327T AT 01920327 T AT01920327 T AT 01920327T AT E249676 T1 ATE249676 T1 AT E249676T1
Authority
AT
Austria
Prior art keywords
voltage
logic level
drain
current
drain current
Prior art date
Application number
AT01920327T
Other languages
English (en)
Inventor
Feng Pan
Colin S Bill
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ATE249676T1 publication Critical patent/ATE249676T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells

Landscapes

  • Read Only Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
AT01920327T 2000-03-14 2001-03-12 Prüfungsschaltung zum trimmen von referenzzellen ATE249676T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/524,897 US6205056B1 (en) 2000-03-14 2000-03-14 Automated reference cell trimming verify
PCT/US2001/007983 WO2001069604A2 (en) 2000-03-14 2001-03-12 Automated reference cell trimming verify

Publications (1)

Publication Number Publication Date
ATE249676T1 true ATE249676T1 (de) 2003-09-15

Family

ID=24091097

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01920327T ATE249676T1 (de) 2000-03-14 2001-03-12 Prüfungsschaltung zum trimmen von referenzzellen

Country Status (10)

Country Link
US (1) US6205056B1 (de)
EP (1) EP1264315B1 (de)
JP (1) JP2003527725A (de)
KR (1) KR20030014367A (de)
CN (1) CN1418365A (de)
AT (1) ATE249676T1 (de)
BR (1) BR0109213A (de)
DE (1) DE60100752T2 (de)
TW (1) TW519655B (de)
WO (1) WO2001069604A2 (de)

Families Citing this family (74)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL125604A (en) * 1997-07-30 2004-03-28 Saifun Semiconductors Ltd Non-volatile electrically erasable and programmble semiconductor memory cell utilizing asymmetrical charge
US6768165B1 (en) * 1997-08-01 2004-07-27 Saifun Semiconductors Ltd. Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
US6490204B2 (en) * 2000-05-04 2002-12-03 Saifun Semiconductors Ltd. Programming and erasing methods for a reference cell of an NROM array
US6928001B2 (en) 2000-12-07 2005-08-09 Saifun Semiconductors Ltd. Programming and erasing methods for a non-volatile memory cell
US6396741B1 (en) * 2000-05-04 2002-05-28 Saifun Semiconductors Ltd. Programming of nonvolatile memory cells
US6501681B1 (en) * 2000-08-15 2002-12-31 Advanced Micro Devices, Inc. Using a low drain bias during erase verify to ensure complete removal of residual charge in the nitride in sonos non-volatile memories
JP2002184190A (ja) * 2000-12-11 2002-06-28 Toshiba Corp 不揮発性半導体記憶装置
US7071771B2 (en) * 2000-12-11 2006-07-04 Kabushiki Kaisha Toshiba Current difference divider circuit
US6697283B2 (en) 2001-01-03 2004-02-24 Micron Technology, Inc. Temperature and voltage compensated reference current generator
US6449190B1 (en) * 2001-01-17 2002-09-10 Advanced Micro Devices, Inc. Adaptive reference cells for a memory device
US6614692B2 (en) * 2001-01-18 2003-09-02 Saifun Semiconductors Ltd. EEPROM array and method for operation thereof
US6466480B2 (en) * 2001-03-27 2002-10-15 Micron Technology, Inc. Method and apparatus for trimming non-volatile memory cells
US6584017B2 (en) 2001-04-05 2003-06-24 Saifun Semiconductors Ltd. Method for programming a reference cell
US6490203B1 (en) * 2001-05-24 2002-12-03 Edn Silicon Devices, Inc. Sensing scheme of flash EEPROM
US6700818B2 (en) * 2002-01-31 2004-03-02 Saifun Semiconductors Ltd. Method for operating a memory device
US6975536B2 (en) * 2002-01-31 2005-12-13 Saifun Semiconductors Ltd. Mass storage array and methods for operation thereof
US7190620B2 (en) * 2002-01-31 2007-03-13 Saifun Semiconductors Ltd. Method for operating a memory device
JP3964344B2 (ja) * 2002-03-29 2007-08-22 カルソニックカンセイ株式会社 エアバック装置のカバー構造
US6917544B2 (en) 2002-07-10 2005-07-12 Saifun Semiconductors Ltd. Multiple use memory chip
US6826107B2 (en) * 2002-08-01 2004-11-30 Saifun Semiconductors Ltd. High voltage insertion in flash memory cards
US6963505B2 (en) 2002-10-29 2005-11-08 Aifun Semiconductors Ltd. Method circuit and system for determining a reference voltage
US7136304B2 (en) 2002-10-29 2006-11-14 Saifun Semiconductor Ltd Method, system and circuit for programming a non-volatile memory array
US6992932B2 (en) 2002-10-29 2006-01-31 Saifun Semiconductors Ltd Method circuit and system for read error detection in a non-volatile memory array
JP4113423B2 (ja) * 2002-12-04 2008-07-09 シャープ株式会社 半導体記憶装置及びリファレンスセルの補正方法
US6967896B2 (en) * 2003-01-30 2005-11-22 Saifun Semiconductors Ltd Address scramble
US7178004B2 (en) 2003-01-31 2007-02-13 Yan Polansky Memory array programming circuit and a method for using the circuit
US7142464B2 (en) * 2003-04-29 2006-11-28 Saifun Semiconductors Ltd. Apparatus and methods for multi-level sensing in a memory array
US7236394B2 (en) * 2003-06-18 2007-06-26 Macronix International Co., Ltd. Transistor-free random access memory
CN100428102C (zh) * 2003-08-29 2008-10-22 中芯国际集成电路制造(上海)有限公司 一种电压基准电路
US7123532B2 (en) 2003-09-16 2006-10-17 Saifun Semiconductors Ltd. Operating array cells with matched reference cells
US6954393B2 (en) * 2003-09-16 2005-10-11 Saifun Semiconductors Ltd. Reading array cell with matched reference cell
KR101035580B1 (ko) * 2004-03-03 2011-05-19 매그나칩 반도체 유한회사 플래시 메모리 장치의 기준 셀 트리밍 방법
US7652930B2 (en) * 2004-04-01 2010-01-26 Saifun Semiconductors Ltd. Method, circuit and system for erasing one or more non-volatile memory cells
US7755938B2 (en) * 2004-04-19 2010-07-13 Saifun Semiconductors Ltd. Method for reading a memory array with neighbor effect cancellation
US7366025B2 (en) * 2004-06-10 2008-04-29 Saifun Semiconductors Ltd. Reduced power programming of non-volatile cells
US7317633B2 (en) 2004-07-06 2008-01-08 Saifun Semiconductors Ltd Protection of NROM devices from charge damage
US7095655B2 (en) * 2004-08-12 2006-08-22 Saifun Semiconductors Ltd. Dynamic matching of signal path and reference path for sensing
FR2874732A1 (fr) * 2004-08-31 2006-03-03 St Microelectronics Sa Procede de programmation de cellules memoire incluant une detection des degradations de transconductance
US20060068551A1 (en) * 2004-09-27 2006-03-30 Saifun Semiconductors, Ltd. Method for embedding NROM
US7638850B2 (en) 2004-10-14 2009-12-29 Saifun Semiconductors Ltd. Non-volatile memory structure and method of fabrication
US7257025B2 (en) * 2004-12-09 2007-08-14 Saifun Semiconductors Ltd Method for reading non-volatile memory cells
US7535765B2 (en) 2004-12-09 2009-05-19 Saifun Semiconductors Ltd. Non-volatile memory device and method for reading cells
CN1838323A (zh) 2005-01-19 2006-09-27 赛芬半导体有限公司 可预防固定模式编程的方法
WO2006082619A1 (ja) * 2005-01-31 2006-08-10 Spansion Llc 記憶装置、および該記憶装置のリファレンスセル調整方法
US8053812B2 (en) 2005-03-17 2011-11-08 Spansion Israel Ltd Contact in planar NROM technology
US20070141788A1 (en) * 2005-05-25 2007-06-21 Ilan Bloom Method for embedding non-volatile memory with logic circuitry
US8400841B2 (en) * 2005-06-15 2013-03-19 Spansion Israel Ltd. Device to program adjacent storage cells of different NROM cells
US7184313B2 (en) * 2005-06-17 2007-02-27 Saifun Semiconductors Ltd. Method circuit and system for compensating for temperature induced margin loss in non-volatile memory cells
EP1746645A3 (de) 2005-07-18 2009-01-21 Saifun Semiconductors Ltd. Speicherzellenanordnung mit sub-minimalem Wortleitungsabstand und Verfahren zu deren Herstellung
US20070036007A1 (en) * 2005-08-09 2007-02-15 Saifun Semiconductors, Ltd. Sticky bit buffer
US7668017B2 (en) 2005-08-17 2010-02-23 Saifun Semiconductors Ltd. Method of erasing non-volatile memory cells
US7221138B2 (en) 2005-09-27 2007-05-22 Saifun Semiconductors Ltd Method and apparatus for measuring charge pump output current
US7352627B2 (en) 2006-01-03 2008-04-01 Saifon Semiconductors Ltd. Method, system, and circuit for operating a non-volatile memory array
US7808818B2 (en) 2006-01-12 2010-10-05 Saifun Semiconductors Ltd. Secondary injection for NROM
US7760554B2 (en) 2006-02-21 2010-07-20 Saifun Semiconductors Ltd. NROM non-volatile memory and mode of operation
US8253452B2 (en) 2006-02-21 2012-08-28 Spansion Israel Ltd Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same
US7692961B2 (en) 2006-02-21 2010-04-06 Saifun Semiconductors Ltd. Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection
US7638835B2 (en) 2006-02-28 2009-12-29 Saifun Semiconductors Ltd. Double density NROM with nitride strips (DDNS)
US20070255889A1 (en) * 2006-03-22 2007-11-01 Yoav Yogev Non-volatile memory device and method of operating the device
US7701779B2 (en) 2006-04-27 2010-04-20 Sajfun Semiconductors Ltd. Method for programming a reference cell
US7605579B2 (en) 2006-09-18 2009-10-20 Saifun Semiconductors Ltd. Measuring and controlling current consumption and output current of charge pumps
KR100808947B1 (ko) * 2006-12-07 2008-03-04 삼성전자주식회사 반도체 메모리 장치의 기준 셀을 트리밍하기 위한 방법 및장치
US20080239599A1 (en) * 2007-04-01 2008-10-02 Yehuda Yizraeli Clamping Voltage Events Such As ESD
US7630249B2 (en) 2007-06-21 2009-12-08 Sandisk Corporation Intelligent control of program pulse duration
US7580290B2 (en) 2007-06-21 2009-08-25 Sandisk Corporation Non-volatile storage system with intelligent control of program pulse duration
US7663926B2 (en) * 2007-07-27 2010-02-16 Micron Technology, Inc. Cell deterioration warning apparatus and method
US7978520B2 (en) 2007-09-27 2011-07-12 Sandisk Corporation Compensation of non-volatile memory chip non-idealities by program pulse adjustment
US7859911B2 (en) * 2008-07-21 2010-12-28 Triune Ip Llc Circuit and system for programming a floating gate
CN102800356A (zh) * 2011-05-26 2012-11-28 北京兆易创新科技有限公司 非易失存储器的参考单元编程方法和系统
US8693266B2 (en) * 2011-10-19 2014-04-08 Seoul National University Industry Foundation Apparatus and method for trimming reference cell in semiconductor memory device
TWI466122B (zh) * 2012-05-18 2014-12-21 Elite Semiconductor Esmt 具有參考晶胞調整電路的半導體記憶體元件以及包含此元件的並列調整裝置
WO2017076918A1 (en) 2015-11-03 2017-05-11 Koninklijke Philips N.V. Ultrasound probe, system and method for measuring arterial parameters using non-imaging ultrasound
KR102648785B1 (ko) * 2017-01-11 2024-03-19 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그 동작 방법
US10388382B2 (en) * 2017-08-31 2019-08-20 Micron Technology, Inc. Methods and apparatus for programming memory

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5172338B1 (en) * 1989-04-13 1997-07-08 Sandisk Corp Multi-state eeprom read and write circuits and techniques
US5163021A (en) * 1989-04-13 1992-11-10 Sundisk Corporation Multi-state EEprom read and write circuits and techniques
US5608679A (en) * 1994-06-02 1997-03-04 Intel Corporation Fast internal reference cell trimming for flash EEPROM memory
US5444656A (en) * 1994-06-02 1995-08-22 Intel Corporation Apparatus for fast internal reference cell trimming
US5822250A (en) * 1996-08-30 1998-10-13 Texas Instruments Incorporated Circuit and process for autotrim of embedded threshold voltage reference bit

Also Published As

Publication number Publication date
US6205056B1 (en) 2001-03-20
WO2001069604A3 (en) 2002-04-11
EP1264315A2 (de) 2002-12-11
EP1264315B1 (de) 2003-09-10
JP2003527725A (ja) 2003-09-16
WO2001069604A2 (en) 2001-09-20
TW519655B (en) 2003-02-01
DE60100752D1 (de) 2003-10-16
DE60100752T2 (de) 2004-07-15
KR20030014367A (ko) 2003-02-17
CN1418365A (zh) 2003-05-14
BR0109213A (pt) 2003-06-03

Similar Documents

Publication Publication Date Title
ATE249676T1 (de) Prüfungsschaltung zum trimmen von referenzzellen
US5424993A (en) Programming method for the selective healing of over-erased cells on a flash erasable programmable read-only memory device
KR970023451A (ko) 불휘발성 반도체 메모리 장치
EP0753859B1 (de) Verfahren zur Einstellung der Schwellspannung einer Referenzspeicherzelle
TW334568B (en) Erase method for page mode multiple bits-per-cell flash EEPROM
ATE492882T1 (de) Schnelles programmiersystem mit verringerter überprogrammierung
TW200616148A (en) Method for programming charge store memory cell and integrated circuit
TW200643961A (en) Faster programming of higher level states in multi-level cell flash memory
TW200713289A (en) One time programmable memory and method of operation
EP0347909A3 (de) Nichtflüchtige Speichereinrichtung, die in einem weiten Bereich des Spannungspegels der Leistungsquelle stabil arbeitet
KR980005018A (ko) 불휘발성 메모리 셀과 불휘발성 메모리에서의 2진 상태 프로그래밍 방법
KR960039014A (ko) 블럭 단위로 스트레스 가능한 회로
US20030007383A1 (en) Memory device with non-volatile reference memory cell trimming capabilities
US20080232172A1 (en) Flash memory device and method of controlling program voltage
US5619454A (en) Programming method for healing over-erased cells for a flash memory device
TW200629057A (en) System and method for programing reference cells in memory device
US6385110B1 (en) Multilevel non-volatile semiconductor memory device
JPS5769584A (en) Non-volatile semiconductor memory
KR930020430A (ko) 불휘발성 반도체 기억장치
KR970029864A (ko) 비휘발성 메모리 장치의 스냅 프로그래밍 프리콘디셔닝 공정
KR0179857B1 (ko) 멀티저장형 메모리
KR100661670B1 (ko) 플래쉬 메모리 소자의 소거 방법 및 그 장치
KR101035580B1 (ko) 플래시 메모리 장치의 기준 셀 트리밍 방법
KR100463585B1 (ko) 플래쉬메모리의센스앰프
KR100624284B1 (ko) 플래시 셀의 사이클링 테스트 회로 및 그 방법

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties