ATE251319T1 - Programmierbares system und verfahren zum vorhersagen von verzweigungen für computersysteme - Google Patents

Programmierbares system und verfahren zum vorhersagen von verzweigungen für computersysteme

Info

Publication number
ATE251319T1
ATE251319T1 AT97935174T AT97935174T ATE251319T1 AT E251319 T1 ATE251319 T1 AT E251319T1 AT 97935174 T AT97935174 T AT 97935174T AT 97935174 T AT97935174 T AT 97935174T AT E251319 T1 ATE251319 T1 AT E251319T1
Authority
AT
Austria
Prior art keywords
prediction
predicting
computer systems
branch prediction
programmable system
Prior art date
Application number
AT97935174T
Other languages
English (en)
Inventor
Jackie A Freeman
Original Assignee
Jackie A Freeman
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jackie A Freeman filed Critical Jackie A Freeman
Application granted granted Critical
Publication of ATE251319T1 publication Critical patent/ATE251319T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3842—Speculative instruction execution
    • G06F9/3844—Speculative instruction execution using dynamic branch prediction, e.g. using branch history tables

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Hardware Redundancy (AREA)
  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Executing Machine-Instructions (AREA)
AT97935174T 1996-08-02 1997-07-25 Programmierbares system und verfahren zum vorhersagen von verzweigungen für computersysteme ATE251319T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/691,785 US5949995A (en) 1996-08-02 1996-08-02 Programmable branch prediction system and method for inserting prediction operation which is independent of execution of program code
PCT/US1997/013307 WO1998006032A1 (en) 1996-08-02 1997-07-25 Programmable branch prediction system and method for computer systems

Publications (1)

Publication Number Publication Date
ATE251319T1 true ATE251319T1 (de) 2003-10-15

Family

ID=24777970

Family Applications (1)

Application Number Title Priority Date Filing Date
AT97935174T ATE251319T1 (de) 1996-08-02 1997-07-25 Programmierbares system und verfahren zum vorhersagen von verzweigungen für computersysteme

Country Status (7)

Country Link
US (1) US5949995A (de)
EP (1) EP0855058B1 (de)
JP (2) JPH11513164A (de)
AT (1) ATE251319T1 (de)
AU (1) AU3817797A (de)
DE (1) DE69725278T2 (de)
WO (1) WO1998006032A1 (de)

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US6079005A (en) * 1997-11-20 2000-06-20 Advanced Micro Devices, Inc. Microprocessor including virtual address branch prediction and current page register to provide page portion of virtual and physical fetch address
US6079003A (en) 1997-11-20 2000-06-20 Advanced Micro Devices, Inc. Reverse TLB for providing branch target address in a microprocessor having a physically-tagged cache
US6266764B1 (en) * 1998-03-17 2001-07-24 Matsushita Electric Industrial Co., Ltd. Program controller for switching between first program and second program
US6205545B1 (en) * 1998-04-30 2001-03-20 Hewlett-Packard Company Method and apparatus for using static branch predictions hints with dynamically translated code traces to improve performance
US6189141B1 (en) * 1998-05-04 2001-02-13 Hewlett-Packard Company Control path evaluating trace designator with dynamically adjustable thresholds for activation of tracing for high (hot) activity and low (cold) activity of flow control
US6243805B1 (en) 1998-08-11 2001-06-05 Advanced Micro Devices, Inc. Programming paradigm and microprocessor architecture for exact branch targeting
US6430682B1 (en) * 1998-09-11 2002-08-06 Agere Systems Guardian Corp. Reliable branch predictions for real-time applications
US6611910B2 (en) * 1998-10-12 2003-08-26 Idea Corporation Method for processing branch operations
US6185669B1 (en) * 1999-02-18 2001-02-06 Hewlett-Packard Company System for fetching mapped branch target instructions of optimized code placed into a trace memory
US6481008B1 (en) * 1999-06-30 2002-11-12 Microsoft Corporation Instrumentation and optimization tools for heterogeneous programs
US6446197B1 (en) * 1999-10-01 2002-09-03 Hitachi, Ltd. Two modes for executing branch instructions of different lengths and use of branch control instruction and register set loaded with target instructions
US6725335B2 (en) * 2000-02-09 2004-04-20 Hewlett-Packard Development Company, L.P. Method and system for fast unlinking of a linked branch in a caching dynamic translator
US20020066081A1 (en) * 2000-02-09 2002-05-30 Evelyn Duesterwald Speculative caching scheme for fast emulation through statically predicted execution traces in a caching dynamic translator
US6859875B1 (en) * 2000-06-12 2005-02-22 Freescale Semiconductor, Inc. Processor having selective branch prediction
US7278136B2 (en) * 2002-07-09 2007-10-02 University Of Massachusetts Reducing processor energy consumption using compile-time information
US6934865B2 (en) * 2002-07-09 2005-08-23 University Of Massachusetts Controlling a processor resource based on a compile-time prediction of number of instructions-per-cycle that will be executed across plural cycles by the processor
US7493607B2 (en) 2002-07-09 2009-02-17 Bluerisc Inc. Statically speculative compilation and execution
US20050114850A1 (en) 2003-10-29 2005-05-26 Saurabh Chheda Energy-focused re-compilation of executables and hardware mechanisms based on compiler-architecture interaction and compiler-inserted control
US7996671B2 (en) 2003-11-17 2011-08-09 Bluerisc Inc. Security of program executables and microprocessors based on compiler-architecture interaction
US8607209B2 (en) 2004-02-04 2013-12-10 Bluerisc Inc. Energy-focused compiler-assisted branch prediction
JP4134179B2 (ja) * 2005-02-04 2008-08-13 株式会社ソニー・コンピュータエンタテインメント ソフトウエアによる動的予測方法および装置
US7487340B2 (en) * 2006-06-08 2009-02-03 International Business Machines Corporation Local and global branch prediction information storage
US8301871B2 (en) * 2006-06-08 2012-10-30 International Business Machines Corporation Predicated issue for conditional branch instructions
US20080126766A1 (en) 2006-11-03 2008-05-29 Saurabh Chheda Securing microprocessors against information leakage and physical tampering
JP4526560B2 (ja) * 2007-12-05 2010-08-18 日本テキサス・インスツルメンツ株式会社 プロセッサおよび信号処理方法
WO2012127589A1 (ja) * 2011-03-18 2012-09-27 富士通株式会社 マルチコアプロセッサシステム、および分岐予測方法
US8935694B2 (en) 2012-01-23 2015-01-13 International Business Machines Corporation System and method for selectively saving and restoring state of branch prediction logic through separate hypervisor-mode and guest-mode and/or user-mode instructions
US9032191B2 (en) 2012-01-23 2015-05-12 International Business Machines Corporation Virtualization support for branch prediction logic enable / disable at hypervisor and guest operating system levels
JP2013250593A (ja) * 2012-05-30 2013-12-12 Renesas Electronics Corp 半導体装置
CN113672232B (zh) * 2021-07-09 2024-06-11 华为技术有限公司 程序编译方法和装置

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US5471593A (en) * 1989-12-11 1995-11-28 Branigin; Michael H. Computer processor with an efficient means of executing many instructions simultaneously
US5226130A (en) * 1990-02-26 1993-07-06 Nexgen Microsystems Method and apparatus for store-into-instruction-stream detection and maintaining branch prediction cache consistency
US5276882A (en) * 1990-07-27 1994-01-04 International Business Machines Corp. Subroutine return through branch history table
JPH04229337A (ja) * 1990-12-27 1992-08-18 Hitachi Ltd エミュレータ
JPH04264923A (ja) * 1991-02-20 1992-09-21 Nec Corp 情報処理装置
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JP3499252B2 (ja) * 1993-03-19 2004-02-23 株式会社ルネサステクノロジ コンパイル装置及びデータ処理装置
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IE940855A1 (en) * 1993-12-20 1995-06-28 Motorola Inc Data processor with speculative instruction fetching and¹method of operation
JP3599409B2 (ja) * 1994-06-14 2004-12-08 株式会社ルネサステクノロジ 分岐予測装置
US5664191A (en) * 1994-06-30 1997-09-02 Microsoft Corporation Method and system for improving the locality of memory references during execution of a computer program
US5742804A (en) * 1996-07-24 1998-04-21 Institute For The Development Of Emerging Architectures, L.L.C. Instruction prefetch mechanism utilizing a branch predict instruction

Also Published As

Publication number Publication date
JPH11513164A (ja) 1999-11-09
DE69725278T2 (de) 2004-08-26
DE69725278D1 (de) 2003-11-06
WO1998006032A1 (en) 1998-02-12
EP0855058A4 (de) 2000-01-12
US5949995A (en) 1999-09-07
EP0855058A1 (de) 1998-07-29
EP0855058B1 (de) 2003-10-01
AU3817797A (en) 1998-02-25
JP2007058875A (ja) 2007-03-08

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