ATE281667T1 - Methode und vorrichtung zur ankopplung von single master geräten an eine multimaster wired-and busumgebung - Google Patents

Methode und vorrichtung zur ankopplung von single master geräten an eine multimaster wired-and busumgebung

Info

Publication number
ATE281667T1
ATE281667T1 AT01959184T AT01959184T ATE281667T1 AT E281667 T1 ATE281667 T1 AT E281667T1 AT 01959184 T AT01959184 T AT 01959184T AT 01959184 T AT01959184 T AT 01959184T AT E281667 T1 ATE281667 T1 AT E281667T1
Authority
AT
Austria
Prior art keywords
multimaster
bus
firewall
firewall apparatus
bus master
Prior art date
Application number
AT01959184T
Other languages
English (en)
Inventor
Joseph J Ervin
Jorge E Lach
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Application granted granted Critical
Publication of ATE281667T1 publication Critical patent/ATE281667T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/4031—Coupling between buses using bus bridges with arbitration

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Small-Scale Networks (AREA)
  • Information Transfer Systems (AREA)
AT01959184T 2000-08-01 2001-07-26 Methode und vorrichtung zur ankopplung von single master geräten an eine multimaster wired-and busumgebung ATE281667T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/630,099 US6591322B1 (en) 2000-08-01 2000-08-01 Method and apparatus for connecting single master devices to a multimaster wired-and bus environment
PCT/US2001/023407 WO2002010933A1 (en) 2000-08-01 2001-07-26 Method and apparatus for connecting single master devices to a multimaster wired-and bus environment

Publications (1)

Publication Number Publication Date
ATE281667T1 true ATE281667T1 (de) 2004-11-15

Family

ID=24525752

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01959184T ATE281667T1 (de) 2000-08-01 2001-07-26 Methode und vorrichtung zur ankopplung von single master geräten an eine multimaster wired-and busumgebung

Country Status (6)

Country Link
US (1) US6591322B1 (de)
EP (1) EP1305718B1 (de)
AT (1) ATE281667T1 (de)
AU (1) AU2001280768A1 (de)
DE (1) DE60106929T2 (de)
WO (1) WO2002010933A1 (de)

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MXPA03005445A (es) * 2000-12-20 2003-09-10 Thomson Licensing Sa Barra colectora 12c para aislar los circuitos integrados seleccionados para una comunicacion rapida de barra colectora 12c.
US6859853B2 (en) * 2001-05-01 2005-02-22 Sun Microsystems, Inc. Method and apparatus for driving signals on a bus
US7149838B2 (en) * 2001-05-29 2006-12-12 Sun Microsystems, Inc. Method and apparatus for configuring multiple segment wired-AND bus systems
WO2002097642A1 (en) * 2001-05-29 2002-12-05 Sun Microsystems, Inc. Method and apparatus for constructing and configuring multiple segment wired-and bus systems
US6842806B2 (en) * 2001-05-29 2005-01-11 Sun Microsystems, Inc. Method and apparatus for interconnecting wired-AND buses
US20040225814A1 (en) * 2001-05-29 2004-11-11 Ervin Joseph J. Method and apparatus for constructing wired-AND bus systems
US6799233B1 (en) * 2001-06-29 2004-09-28 Koninklijke Philips Electronics N.V. Generalized I2C slave transmitter/receiver state machine
US7039734B2 (en) * 2002-09-24 2006-05-02 Hewlett-Packard Development Company, L.P. System and method of mastering a serial bus
CN101482749A (zh) * 2008-01-11 2009-07-15 鸿富锦精密工业（深圳）有限公司 主设备对从设备的自动定址系统
US7801141B2 (en) * 2008-07-25 2010-09-21 Micrel, Inc. True ring networks with gateway connections using MAC source address filtering
US8812760B1 (en) * 2011-12-22 2014-08-19 Cisco Technology, Inc. System and method for monitoring two-wire communication in a network environment
DE102016120668A1 (de) * 2016-10-28 2018-05-03 Infineon Technologies Ag Datenkommunikationssystem
EP3336710B1 (de) 2016-12-15 2019-10-02 Iristick nv I²c-brückenvorrichtung
US10169273B2 (en) 2017-01-11 2019-01-01 Qualcomm Incorporated Forced compression of single I2C writes
TWI834603B (zh) * 2017-02-14 2024-03-11 日商索尼半導體解決方案公司 通信裝置、通信方法、通信程式及通信系統
KR102450296B1 (ko) * 2017-12-26 2022-10-04 삼성전자주식회사 동기식 및 비동기식 혼합 방식의 디지털 인터페이스를 포함하는 장치, 이를 포함하는 디지털 처리 시스템, 및 이들에 의해 수행되는 디지털 처리 방법
US11762799B2 (en) 2019-08-21 2023-09-19 Infineon Technologies Ag Watchdog for addressing deadlocked states
US11494329B2 (en) * 2020-02-27 2022-11-08 Advantest Corporation NVMe-MI over SMBus multi-master controller with other SMBus and I2C masters in a single FPGA chip
CN116028089A (zh) * 2023-02-21 2023-04-28 苏州忆联信息系统有限公司 固态硬盘固件更新方法、装置、计算机设备及介质

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US5376928A (en) * 1992-09-18 1994-12-27 Thomson Consumer Electronics, Inc. Exchanging data and clock lines on multiple format data buses
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JP3460736B2 (ja) * 1994-04-06 2003-10-27 三菱電機株式会社 クロック制御回路
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US6477609B1 (en) * 2000-01-31 2002-11-05 Koninklijke Philips Electronics N.V. Bridge state-machine progression for data transfers requested by a host bus and responded to by an external bus

Also Published As

Publication number Publication date
US6591322B1 (en) 2003-07-08
WO2002010933A1 (en) 2002-02-07
DE60106929T2 (de) 2005-11-10
DE60106929D1 (de) 2004-12-09
EP1305718A1 (de) 2003-05-02
EP1305718B1 (de) 2004-11-03
AU2001280768A1 (en) 2002-02-13

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