ATE294988T1 - Dekodierungsschaltung - Google Patents

Dekodierungsschaltung

Info

Publication number
ATE294988T1
ATE294988T1 AT01902461T AT01902461T ATE294988T1 AT E294988 T1 ATE294988 T1 AT E294988T1 AT 01902461 T AT01902461 T AT 01902461T AT 01902461 T AT01902461 T AT 01902461T AT E294988 T1 ATE294988 T1 AT E294988T1
Authority
AT
Austria
Prior art keywords
decode
node
potential
operable
circuitry
Prior art date
Application number
AT01902461T
Other languages
English (en)
Inventor
Robert Beat
Original Assignee
Broadcom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Broadcom Corp filed Critical Broadcom Corp
Application granted granted Critical
Publication of ATE294988T1 publication Critical patent/ATE294988T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/418—Address circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Electronic Switches (AREA)
  • Amplifiers (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
  • Dram (AREA)
  • Analogue/Digital Conversion (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Valve Device For Special Equipments (AREA)
  • Liquid Crystal (AREA)
AT01902461T 2000-01-13 2001-01-12 Dekodierungsschaltung ATE294988T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB0000738.5A GB0000738D0 (en) 2000-01-13 2000-01-13 Decoder circuit
PCT/GB2001/000116 WO2001052265A2 (en) 2000-01-13 2001-01-12 Decoder circuit

Publications (1)

Publication Number Publication Date
ATE294988T1 true ATE294988T1 (de) 2005-05-15

Family

ID=9883621

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01902461T ATE294988T1 (de) 2000-01-13 2001-01-12 Dekodierungsschaltung

Country Status (7)

Country Link
US (3) US6456118B2 (de)
EP (1) EP1249020B1 (de)
AT (1) ATE294988T1 (de)
AU (1) AU2001230323A1 (de)
DE (1) DE60110545T2 (de)
GB (2) GB0000738D0 (de)
WO (1) WO2001052265A2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6750677B2 (en) * 2001-06-04 2004-06-15 Matsushita Electric Industrial Co., Ltd. Dynamic semiconductor integrated circuit
TWI226638B (en) * 2003-10-30 2005-01-11 Via Tech Inc Output device for static random access memory
US7176725B2 (en) * 2005-02-04 2007-02-13 International Business Machines Corporation Fast pulse powered NOR decode apparatus for semiconductor devices
US7170320B2 (en) * 2005-02-04 2007-01-30 International Business Machines Corporation Fast pulse powered NOR decode apparatus with pulse stretching and redundancy steering
US20060181950A1 (en) * 2005-02-11 2006-08-17 International Business Machines Corporation Apparatus and method for SRAM decoding with single signal synchronization
US7734094B2 (en) * 2006-06-28 2010-06-08 Microsoft Corporation Techniques for filtering handwriting recognition results
US8279704B2 (en) * 2006-07-31 2012-10-02 Sandisk 3D Llc Decoder circuitry providing forward and reverse modes of memory array operation and method for biasing same
US7542370B2 (en) * 2006-12-31 2009-06-02 Sandisk 3D Llc Reversible polarity decoder circuit
US7525869B2 (en) * 2006-12-31 2009-04-28 Sandisk 3D Llc Method for using a reversible polarity decoder circuit
WO2008082995A1 (en) * 2006-12-31 2008-07-10 Sandisk 3D Llc Reversible polarity decoder circuit and related methods
US20090109772A1 (en) 2007-10-24 2009-04-30 Esin Terzioglu Ram with independent local clock
US8301912B2 (en) 2007-12-31 2012-10-30 Sandisk Technologies Inc. System, method and memory device providing data scrambling compatible with on-chip copy operation
KR102205513B1 (ko) * 2014-12-24 2021-01-21 에스케이하이닉스 주식회사 디코딩 회로

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51139247A (en) * 1975-05-28 1976-12-01 Hitachi Ltd Mos logic circuit
JP2768298B2 (ja) 1995-03-30 1998-06-25 日本電気株式会社 論理回路
US5737270A (en) * 1996-07-15 1998-04-07 International Business Machines Corporation Precharged wordline decoder with locally-controlled clock
US6081136A (en) * 1997-12-19 2000-06-27 Advanced Micro Devices, Inc. Dynamic NOR gates for NAND decode

Also Published As

Publication number Publication date
US7049851B2 (en) 2006-05-23
US20050141329A1 (en) 2005-06-30
US6456118B2 (en) 2002-09-24
WO2001052265A3 (en) 2001-12-27
GB0029185D0 (en) 2001-01-17
DE60110545T2 (de) 2006-01-19
WO2001052265A2 (en) 2001-07-19
AU2001230323A1 (en) 2001-07-24
EP1249020A2 (de) 2002-10-16
US6864721B2 (en) 2005-03-08
DE60110545D1 (de) 2005-06-09
US20010022749A1 (en) 2001-09-20
GB0000738D0 (en) 2000-03-08
US20030006802A1 (en) 2003-01-09
EP1249020B1 (de) 2005-05-04

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties