ATE300763T1 - Vorrichtung und verfahren zur effizienten zuteilung von speicherbandbreite in einem netzwerkprozessor - Google Patents

Vorrichtung und verfahren zur effizienten zuteilung von speicherbandbreite in einem netzwerkprozessor

Info

Publication number
ATE300763T1
ATE300763T1 AT02708513T AT02708513T ATE300763T1 AT E300763 T1 ATE300763 T1 AT E300763T1 AT 02708513 T AT02708513 T AT 02708513T AT 02708513 T AT02708513 T AT 02708513T AT E300763 T1 ATE300763 T1 AT E300763T1
Authority
AT
Austria
Prior art keywords
memory
memory bandwidth
bandwidth
network processor
requesters
Prior art date
Application number
AT02708513T
Other languages
English (en)
Inventor
Peter Barri
Jean Calvignac
Marco Heddes
Joseph Logan
Alex Niemegeers
Fabrice Verplanken
Miroslav Vrana
Original Assignee
Ibm
Cit Alcatel
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm, Cit Alcatel filed Critical Ibm
Application granted granted Critical
Publication of ATE300763T1 publication Critical patent/ATE300763T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Computer And Data Communications (AREA)
  • Communication Control (AREA)
  • Bus Control (AREA)
AT02708513T 2001-04-03 2002-03-28 Vorrichtung und verfahren zur effizienten zuteilung von speicherbandbreite in einem netzwerkprozessor ATE300763T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US28106301P 2001-04-03 2001-04-03
US10/068,392 US6757795B2 (en) 2001-04-03 2002-02-05 Apparatus and method for efficiently sharing memory bandwidth in a network processor
PCT/GB2002/001484 WO2002082286A2 (en) 2001-04-03 2002-03-28 Apparatus and method for efficiently sharing memory bandwidth in a network processor

Publications (1)

Publication Number Publication Date
ATE300763T1 true ATE300763T1 (de) 2005-08-15

Family

ID=26748923

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02708513T ATE300763T1 (de) 2001-04-03 2002-03-28 Vorrichtung und verfahren zur effizienten zuteilung von speicherbandbreite in einem netzwerkprozessor

Country Status (10)

Country Link
US (1) US6757795B2 (de)
EP (1) EP1374072B1 (de)
JP (1) JP4336108B2 (de)
KR (1) KR100590387B1 (de)
CN (1) CN1251102C (de)
AT (1) ATE300763T1 (de)
AU (1) AU2002242874A1 (de)
DE (1) DE60205231T2 (de)
TW (1) TW563028B (de)
WO (1) WO2002082286A2 (de)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7353288B1 (en) * 2001-10-17 2008-04-01 Ciena Corporation SONET/SDH payload re-mapping and cross-connect
JP3970581B2 (ja) * 2001-11-09 2007-09-05 富士通株式会社 伝送装置および伝送システム
US7346067B2 (en) * 2001-11-16 2008-03-18 Force 10 Networks, Inc. High efficiency data buffering in a computer network device
JP3864250B2 (ja) * 2002-10-31 2006-12-27 インターナショナル・ビジネス・マシーンズ・コーポレーション 排他制御装置、排他制御方法、プログラム、及び記録媒体
US6954387B2 (en) * 2003-07-15 2005-10-11 International Business Machines Corporation Dynamic random access memory with smart refresh scheduler
US20050160188A1 (en) * 2004-01-20 2005-07-21 Zohar Bogin Method and apparatus to manage memory access requests
US7137091B1 (en) * 2004-02-13 2006-11-14 Sun Microsystems, Inc. Hierarchical repeater insertion
US7602777B2 (en) 2004-12-17 2009-10-13 Michael Ho Cascaded connection matrices in a distributed cross-connection system
US8254411B2 (en) * 2005-02-10 2012-08-28 International Business Machines Corporation Data processing system, method and interconnect fabric having a flow governor
CN100432957C (zh) * 2005-02-12 2008-11-12 美国博通公司 一种管理存储器的方法
CN100438693C (zh) * 2005-03-21 2008-11-26 华为技术有限公司 一种分组域的业务接入方法
US7987306B2 (en) * 2005-04-04 2011-07-26 Oracle America, Inc. Hiding system latencies in a throughput networking system
US7882280B2 (en) * 2005-04-18 2011-02-01 Integrated Device Technology, Inc. Packet processing switch and methods of operation thereof
US7474662B2 (en) * 2005-04-29 2009-01-06 International Business Machines Corporation Systems and methods for rate-limited weighted best effort scheduling
US20070011287A1 (en) * 2005-05-16 2007-01-11 Charbel Khawand Systems and methods for seamless handover in a streaming data application
WO2007123542A1 (en) * 2006-04-21 2007-11-01 Sun Microsystems, Inc. Hiding system latencies in a throughput networking system
US7817652B1 (en) * 2006-05-12 2010-10-19 Integrated Device Technology, Inc. System and method of constructing data packets in a packet switch
US7747904B1 (en) 2006-05-12 2010-06-29 Integrated Device Technology, Inc. Error management system and method for a packet switch
US7706387B1 (en) 2006-05-31 2010-04-27 Integrated Device Technology, Inc. System and method for round robin arbitration
US7693040B1 (en) 2007-05-01 2010-04-06 Integrated Device Technology, Inc. Processing switch for orthogonal frequency division multiplexing
US8433859B2 (en) * 2008-11-25 2013-04-30 Mediatek Inc. Apparatus and method for buffer management for a memory operating
US20110320699A1 (en) * 2010-06-24 2011-12-29 International Business Machines Corporation System Refresh in Cache Memory
US8490107B2 (en) 2011-08-08 2013-07-16 Arm Limited Processing resource allocation within an integrated circuit supporting transaction requests of different priority levels
US12401911B2 (en) 2014-11-07 2025-08-26 Duelight Llc Systems and methods for generating a high-dynamic range (HDR) pixel stream
US12401912B2 (en) 2014-11-17 2025-08-26 Duelight Llc System and method for generating a digital image
US9998935B2 (en) 2014-11-18 2018-06-12 Duelight Llc System and method for sharing data based on a combined bandwidth consumption
US12445736B2 (en) 2015-05-01 2025-10-14 Duelight Llc Systems and methods for generating a digital image
KR102364382B1 (ko) * 2017-12-20 2022-02-16 한국전기연구원 듀얼 포트 메모리 및 그 제어 방법
US20230367785A1 (en) * 2022-05-10 2023-11-16 Huawei Technologies Co., Ltd. System, method for improving efficiency of yang data model-based network devices

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4325116A (en) 1979-08-21 1982-04-13 International Business Machines Corporation Parallel storage access by multiprocessors
US4633434A (en) 1984-04-02 1986-12-30 Sperry Corporation High performance storage unit
US4797815A (en) 1985-11-22 1989-01-10 Paradyne Corporation Interleaved synchronous bus access protocol for a shared memory multi-processor system
US4761736A (en) 1986-01-02 1988-08-02 Commodore Business Machines, Inc. Memory management unit for addressing an expanded memory in groups of non-contiguous blocks
US5034914A (en) 1986-05-15 1991-07-23 Aquidneck Systems International, Inc. Optical disk data storage method and apparatus with buffered interface
EP0407697A1 (de) 1989-07-10 1991-01-16 Seiko Epson Corporation Speichereinrichtung
US5603061A (en) 1991-07-23 1997-02-11 Ncr Corporation Method for prioritizing memory access requests using a selected priority code
US5559953A (en) 1994-07-01 1996-09-24 Digital Equipment Corporation Method for increasing the performance of lines drawn into a framebuffer memory
US5581310A (en) 1995-01-26 1996-12-03 Hitachi America, Ltd. Architecture for a high definition video frame memory and an accompanying data organization for use therewith and efficient access therefrom
US5781201A (en) 1996-05-01 1998-07-14 Digital Equipment Corporation Method for providing improved graphics performance through atypical pixel storage in video memory
US5907863A (en) 1996-08-16 1999-05-25 Unisys Corporation Memory control unit using preloaded values to generate optimal timing of memory control sequences between different memory segments
US5920898A (en) 1996-08-16 1999-07-06 Unisys Corporation Memory control unit providing optimal timing of memory control sequences between different memory segments by optimally selecting among a plurality of memory requests
US6031842A (en) 1996-09-11 2000-02-29 Mcdata Corporation Low latency shared memory switch architecture
US5966143A (en) 1997-10-14 1999-10-12 Motorola, Inc. Data allocation into multiple memories for concurrent access
US5870325A (en) 1998-04-14 1999-02-09 Silicon Graphics, Inc. Memory system with multiple addressing and control busses
DE69935852T2 (de) 1999-06-09 2007-12-20 Texas Instruments Inc., Dallas Host-Zugriff zu gemeinschaftlichem Speicher mit Hochprioritätsbetriebsart

Also Published As

Publication number Publication date
US6757795B2 (en) 2004-06-29
KR20040028725A (ko) 2004-04-03
CN1498374A (zh) 2004-05-19
TW563028B (en) 2003-11-21
AU2002242874A1 (en) 2002-10-21
EP1374072A2 (de) 2004-01-02
DE60205231T2 (de) 2006-05-24
WO2002082286A2 (en) 2002-10-17
JP4336108B2 (ja) 2009-09-30
CN1251102C (zh) 2006-04-12
US20020141256A1 (en) 2002-10-03
JP2004523853A (ja) 2004-08-05
EP1374072B1 (de) 2005-07-27
DE60205231D1 (de) 2005-09-01
KR100590387B1 (ko) 2006-06-15
WO2002082286A3 (en) 2003-10-30

Similar Documents

Publication Publication Date Title
ATE300763T1 (de) Vorrichtung und verfahren zur effizienten zuteilung von speicherbandbreite in einem netzwerkprozessor
EP1398696A3 (de) System und Verfahren zur Vermittlung von Klienten in einem hierarchischen Echtzeit DRAM-system
CN104714851B (zh) 一种实现资源分配的方法及装置
TW200617784A (en) System for dynamic arbitration of a shared resource on a device
US7577780B2 (en) Fine-grained bandwidth control arbiter and the method thereof
ATE435456T1 (de) Verschiedene verfahren und vorrichtungen zur arbitrierung zwischen funktionalitätsblöcken
DE69702708D1 (de) Verfahren und vorrichtung für klientverwaltete flusssteuerung in einem rechnersystem mit begrenztem speicher
EP1403773A3 (de) Betriebsmittelverwaltungsgerät
DE60300907D1 (de) Verfahren und System für Ressourcenallokation in Echtzeit zwischen mehreren Einheiten
US20190155655A1 (en) Resource allocation method and resource manager
DE60227291D1 (de) Vorrichtung und verfahren zur betriebsmittelzuteilung
ATE285088T1 (de) Planung von speicherzugriffen für raten- garantierte und nicht-raten-garantierte anforderungen
MY149417A (en) System architecture and related methods for dynamically adding software components to extend functionality of system processes
ATE308842T1 (de) Methode und vorrichtung zur bereitstellung von kommunikationsbandbreite an benutzer mit garantierter datenrate basierend auf prioritätszuweisung
ATE499657T1 (de) Verfahren und vorrichtung zur verwaltung der lizenzkapazität in einem telekommunikationsnetz
CN104239150B (zh) 一种硬件资源调整的方法及装置
JPH10307748A (ja) 共用資源へのアクセスを制御するための方法及びシステム
CN101547150A (zh) 数据通信输入端口调度的方法及装置
CN104426790A (zh) 对多队列的缓存空间进行分配控制的方法及装置
TW200708972A (en) Systems, methods, and computer program products for arbitrating access to a shared resource based on quality-of service information associated with a resource request
US20030172213A1 (en) Artificially intelligent arbitration system and process for optimizing multiple processes sharing a resource
WO2005119467A3 (en) System for application priority based on device operating mode
CN103761192A (zh) 一种内存分配的方法和装置
CN106506594B (zh) 一种并行计算资源分配方法及装置
ATE401728T1 (de) Verfahren und vorrichtung zur verzögerten zuteilung von betriebsmitteln

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties