ATE435456T1 - Verschiedene verfahren und vorrichtungen zur arbitrierung zwischen funktionalitätsblöcken - Google Patents
Verschiedene verfahren und vorrichtungen zur arbitrierung zwischen funktionalitätsblöckenInfo
- Publication number
- ATE435456T1 ATE435456T1 AT04749899T AT04749899T ATE435456T1 AT E435456 T1 ATE435456 T1 AT E435456T1 AT 04749899 T AT04749899 T AT 04749899T AT 04749899 T AT04749899 T AT 04749899T AT E435456 T1 ATE435456 T1 AT E435456T1
- Authority
- AT
- Austria
- Prior art keywords
- arbitration
- transactions
- blocks
- functionality
- shared resource
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
- G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
- G06F9/526—Mutual exclusion algorithms
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2209/00—Indexing scheme relating to G06F9/00
- G06F2209/52—Indexing scheme relating to G06F9/52
- G06F2209/522—Manager
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Bus Control (AREA)
- Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/418,370 US7149829B2 (en) | 2003-04-18 | 2003-04-18 | Various methods and apparatuses for arbitration among blocks of functionality |
| PCT/US2004/010864 WO2004095295A2 (en) | 2003-04-18 | 2004-04-08 | Various methods and apparatuses for arbitration among blocks of functionality |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE435456T1 true ATE435456T1 (de) | 2009-07-15 |
Family
ID=33159091
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT04749899T ATE435456T1 (de) | 2003-04-18 | 2004-04-08 | Verschiedene verfahren und vorrichtungen zur arbitrierung zwischen funktionalitätsblöcken |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7149829B2 (de) |
| EP (1) | EP1616262B1 (de) |
| JP (1) | JP4852413B2 (de) |
| KR (1) | KR100943104B1 (de) |
| AT (1) | ATE435456T1 (de) |
| DE (1) | DE602004021792D1 (de) |
| WO (1) | WO2004095295A2 (de) |
Families Citing this family (91)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7266786B2 (en) | 2002-11-05 | 2007-09-04 | Sonics, Inc. | Method and apparatus for configurable address mapping and protection architecture and hardware for on-chip systems |
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| US7350003B2 (en) * | 2003-09-25 | 2008-03-25 | Intel Corporation | Method, system, and apparatus for an adaptive weighted arbiter |
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| US9087036B1 (en) | 2004-08-12 | 2015-07-21 | Sonics, Inc. | Methods and apparatuses for time annotated transaction level modeling |
| US8504992B2 (en) | 2003-10-31 | 2013-08-06 | Sonics, Inc. | Method and apparatus for establishing a quality of service model |
| US7665069B2 (en) * | 2003-10-31 | 2010-02-16 | Sonics, Inc. | Method and apparatus for establishing a quality of service model |
| US7099975B2 (en) * | 2003-12-09 | 2006-08-29 | International Business Machines Corporation | Method of resource arbitration |
| US20060242406A1 (en) | 2005-04-22 | 2006-10-26 | Microsoft Corporation | Protected computing environment |
| US7584502B2 (en) * | 2004-05-03 | 2009-09-01 | Microsoft Corporation | Policy engine and methods and systems for protecting data |
| US7606983B2 (en) * | 2004-06-21 | 2009-10-20 | Nxp B.V. | Sequential ordering of transactions in digital systems with multiple requestors |
| JP2006079394A (ja) * | 2004-09-10 | 2006-03-23 | Renesas Technology Corp | データ処理装置 |
| US7739436B2 (en) * | 2004-11-01 | 2010-06-15 | Sonics, Inc. | Method and apparatus for round robin resource arbitration with a fast request to grant response |
| US9363481B2 (en) | 2005-04-22 | 2016-06-07 | Microsoft Technology Licensing, Llc | Protected media pipeline |
| US9436804B2 (en) | 2005-04-22 | 2016-09-06 | Microsoft Technology Licensing, Llc | Establishing a unique session key using a hardware functionality scan |
| KR100739716B1 (ko) * | 2005-08-11 | 2007-07-13 | 삼성전자주식회사 | 공유 자원들의 네트워킹을 제어하는 방법 및 장치 |
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| US20090037635A1 (en) * | 2006-03-17 | 2009-02-05 | Shanghai Magima Digital Information Co., Ltd. | Bus arbitration device |
| EP1863232A1 (de) * | 2006-05-29 | 2007-12-05 | Stmicroelectronics Sa | Bandbreitenzuteiler auf einem Chip |
| US20080059674A1 (en) * | 2006-09-01 | 2008-03-06 | Jiaxiang Shi | Apparatus and method for chained arbitration of a plurality of inputs |
| US20080091866A1 (en) * | 2006-10-12 | 2008-04-17 | International Business Machines Corporation | Maintaining forward progress in a shared L2 by detecting and breaking up requestor starvation |
| US8868397B2 (en) | 2006-11-20 | 2014-10-21 | Sonics, Inc. | Transaction co-validation across abstraction layers |
| US7664901B2 (en) * | 2007-03-27 | 2010-02-16 | Arm Limited | Data processing apparatus and method for arbitrating access to a shared resource |
| US8452907B2 (en) * | 2007-03-27 | 2013-05-28 | Arm Limited | Data processing apparatus and method for arbitrating access to a shared resource |
| US7814243B2 (en) * | 2007-06-01 | 2010-10-12 | Sonics, Inc. | Shared storage for multi-threaded ordered queues in an interconnect |
| KR101077514B1 (ko) * | 2007-06-19 | 2011-10-28 | 후지쯔 가부시끼가이샤 | 캐시 제어장치 및 제어방법 |
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| US8438320B2 (en) * | 2007-06-25 | 2013-05-07 | Sonics, Inc. | Various methods and apparatus for address tiling and channel interleaving throughout the integrated system |
| US8108648B2 (en) * | 2007-06-25 | 2012-01-31 | Sonics, Inc. | Various methods and apparatus for address tiling |
| US8229723B2 (en) * | 2007-12-07 | 2012-07-24 | Sonics, Inc. | Performance software instrumentation and analysis for electronic design automation |
| JP5127470B2 (ja) * | 2008-01-15 | 2013-01-23 | 三菱電機株式会社 | バス装置 |
| TWI337517B (en) * | 2008-03-04 | 2011-02-11 | Inventec Corp | Trace carrier |
| US8073820B2 (en) | 2008-04-07 | 2011-12-06 | Sonics, Inc. | Method and system for a database to monitor and analyze performance of an electronic design |
| US8032329B2 (en) * | 2008-09-04 | 2011-10-04 | Sonics, Inc. | Method and system to monitor, debug, and analyze performance of an electronic design |
| EP2192496B1 (de) * | 2008-11-28 | 2013-01-23 | Telefonaktiebolaget LM Ericsson (publ) | Arbitrierung in einer Multiprozessorvorrichtung |
| US8190804B1 (en) * | 2009-03-12 | 2012-05-29 | Sonics, Inc. | Various methods and apparatus for a memory scheduler with an arbiter |
| US8972995B2 (en) | 2010-08-06 | 2015-03-03 | Sonics, Inc. | Apparatus and methods to concurrently perform per-thread as well as per-tag memory access scheduling within a thread and across two or more threads |
| US8904115B2 (en) * | 2010-09-28 | 2014-12-02 | Texas Instruments Incorporated | Cache with multiple access pipelines |
| KR101662029B1 (ko) | 2010-11-12 | 2016-10-06 | 삼성전자주식회사 | 버스 중재 장치 및 방법 |
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| US10387343B2 (en) * | 2015-04-07 | 2019-08-20 | International Business Machines Corporation | Processing of events for accelerators utilized for parallel processing |
| US10394743B2 (en) * | 2015-05-28 | 2019-08-27 | Dell Products, L.P. | Interchangeable I/O modules with individual and shared personalities |
| EP3268886A4 (de) * | 2015-07-24 | 2018-11-21 | Hewlett-Packard Enterprise Development LP | Verriegelungsverwalter |
| US10838883B2 (en) * | 2015-08-31 | 2020-11-17 | Via Alliance Semiconductor Co., Ltd. | System and method of accelerating arbitration by approximating relative ages |
| GB2557225A (en) * | 2016-11-30 | 2018-06-20 | Nordic Semiconductor Asa | Interconnect system |
| US10243882B1 (en) | 2017-04-13 | 2019-03-26 | Xilinx, Inc. | Network on chip switch interconnect |
| US10673745B2 (en) | 2018-02-01 | 2020-06-02 | Xilinx, Inc. | End-to-end quality-of-service in a network-on-chip |
| US10503690B2 (en) | 2018-02-23 | 2019-12-10 | Xilinx, Inc. | Programmable NOC compatible with multiple interface communication protocol |
| US10621129B2 (en) | 2018-03-27 | 2020-04-14 | Xilinx, Inc. | Peripheral interconnect for configurable slave endpoint circuits |
| US11080188B1 (en) | 2018-03-28 | 2021-08-03 | Apple Inc. | Method to ensure forward progress of a processor in the presence of persistent external cache/TLB maintenance requests |
| US10505548B1 (en) | 2018-05-25 | 2019-12-10 | Xilinx, Inc. | Multi-chip structure having configurable network-on-chip |
| WO2020005597A1 (en) * | 2018-06-28 | 2020-01-02 | Microsoft Technology Licensing, Llc | Managing global and local execution phases |
| GB201810644D0 (en) | 2018-06-28 | 2018-08-15 | Microsoft Technology Licensing Llc | Managing global and local execution phases |
| US10838908B2 (en) | 2018-07-20 | 2020-11-17 | Xilinx, Inc. | Configurable network-on-chip for a programmable device |
| US10824505B1 (en) | 2018-08-21 | 2020-11-03 | Xilinx, Inc. | ECC proxy extension and byte organization for multi-master systems |
| US10963460B2 (en) | 2018-12-06 | 2021-03-30 | Xilinx, Inc. | Integrated circuits and methods to accelerate data queries |
| US11068303B2 (en) | 2019-02-19 | 2021-07-20 | International Business Machines Corporation | Adjusting thread balancing in response to disruptive complex instruction |
| US10936486B1 (en) | 2019-02-21 | 2021-03-02 | Xilinx, Inc. | Address interleave support in a programmable device |
| US10942775B2 (en) | 2019-03-01 | 2021-03-09 | International Business Machines Corporation | Modified central serialization of requests in multiprocessor systems |
| CN112219197B (zh) | 2019-03-08 | 2024-01-23 | 御眼视觉技术有限公司 | 基于优先级的共享资源访问管理 |
| US10680615B1 (en) | 2019-03-27 | 2020-06-09 | Xilinx, Inc. | Circuit for and method of configuring and partially reconfiguring function blocks of an integrated circuit device |
| US10891414B2 (en) | 2019-05-23 | 2021-01-12 | Xilinx, Inc. | Hardware-software design flow for heterogeneous and programmable devices |
| US10891132B2 (en) | 2019-05-23 | 2021-01-12 | Xilinx, Inc. | Flow convergence during hardware-software design for heterogeneous and programmable devices |
| US11188312B2 (en) | 2019-05-23 | 2021-11-30 | Xilinx, Inc. | Hardware-software design flow with high-level synthesis for heterogeneous and programmable devices |
| US11301295B1 (en) | 2019-05-23 | 2022-04-12 | Xilinx, Inc. | Implementing an application specified as a data flow graph in an array of data processing engines |
| US10977018B1 (en) | 2019-12-05 | 2021-04-13 | Xilinx, Inc. | Development environment for heterogeneous devices |
| US10972408B1 (en) * | 2020-02-10 | 2021-04-06 | Apple Inc. | Configurable packet arbitration with minimum progress guarantees |
| US11496418B1 (en) | 2020-08-25 | 2022-11-08 | Xilinx, Inc. | Packet-based and time-multiplexed network-on-chip |
| US11422946B2 (en) | 2020-08-31 | 2022-08-23 | Apple Inc. | Translation lookaside buffer striping for efficient invalidation operations |
| US11615033B2 (en) | 2020-09-09 | 2023-03-28 | Apple Inc. | Reducing translation lookaside buffer searches for splintered pages |
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| US11489786B2 (en) * | 2020-12-28 | 2022-11-01 | Arteris, Inc. | Queue management system, starvation and latency management system, and methods of use |
| US11336287B1 (en) | 2021-03-09 | 2022-05-17 | Xilinx, Inc. | Data processing engine array architecture with memory tiles |
| US11520717B1 (en) | 2021-03-09 | 2022-12-06 | Xilinx, Inc. | Memory tiles in data processing engine array |
| JP2024531402A (ja) | 2021-08-20 | 2024-08-29 | ザイリンクス インコーポレイテッド | データ処理アレイとともに使用するための多数のオーバーレイ |
| US11848670B2 (en) | 2022-04-15 | 2023-12-19 | Xilinx, Inc. | Multiple partitions in a data processing array |
| US12244518B2 (en) | 2022-05-13 | 2025-03-04 | Xilinx, Inc. | Network-on-chip architecture for handling different data sizes |
| US12164451B2 (en) | 2022-05-17 | 2024-12-10 | Xilinx, Inc. | Data processing array interface having interface tiles with multiple direct memory access circuits |
| US12079158B2 (en) | 2022-07-25 | 2024-09-03 | Xilinx, Inc. | Reconfigurable neural engine with extensible instruction set architecture |
| US12248786B2 (en) | 2022-08-08 | 2025-03-11 | Xilinx, Inc. | Instruction set architecture for data processing array control |
| US12176896B2 (en) | 2022-12-07 | 2024-12-24 | Xilinx, Inc. | Programmable stream switches and functional safety circuits in integrated circuits |
| US12353717B2 (en) | 2022-12-22 | 2025-07-08 | Xilnix, Inc. | Localized and relocatable software placement and NoC-based access to memory controllers |
| CN120892215B (zh) * | 2025-09-30 | 2025-12-02 | 上海壁仞科技股份有限公司 | 处理器以及用于处理器的多路仲裁方法 |
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| US4953081A (en) | 1988-12-21 | 1990-08-28 | International Business Machines Corporation | Least recently used arbiter with programmable high priority mode and performance monitor |
| JPH04102155A (ja) * | 1990-08-21 | 1992-04-03 | Fujitsu Ltd | バス使用権調停方式 |
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| US5440752A (en) * | 1991-07-08 | 1995-08-08 | Seiko Epson Corporation | Microprocessor architecture with a switch network for data transfer between cache, memory port, and IOU |
| US5598542A (en) * | 1994-08-08 | 1997-01-28 | International Business Machines Corporation | Method and apparatus for bus arbitration in a multiple bus information handling system using time slot assignment values |
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-
2003
- 2003-04-18 US US10/418,370 patent/US7149829B2/en not_active Expired - Lifetime
-
2004
- 2004-04-08 KR KR1020057019847A patent/KR100943104B1/ko not_active Expired - Fee Related
- 2004-04-08 EP EP04749899A patent/EP1616262B1/de not_active Expired - Lifetime
- 2004-04-08 WO PCT/US2004/010864 patent/WO2004095295A2/en not_active Ceased
- 2004-04-08 JP JP2006509823A patent/JP4852413B2/ja not_active Expired - Fee Related
- 2004-04-08 AT AT04749899T patent/ATE435456T1/de not_active IP Right Cessation
- 2004-04-08 DE DE602004021792T patent/DE602004021792D1/de not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| WO2004095295A2 (en) | 2004-11-04 |
| EP1616262A2 (de) | 2006-01-18 |
| WO2004095295A3 (en) | 2005-03-24 |
| KR100943104B1 (ko) | 2010-02-18 |
| KR20060008908A (ko) | 2006-01-27 |
| EP1616262B1 (de) | 2009-07-01 |
| US20040210695A1 (en) | 2004-10-21 |
| JP4852413B2 (ja) | 2012-01-11 |
| JP2006523895A (ja) | 2006-10-19 |
| US7149829B2 (en) | 2006-12-12 |
| DE602004021792D1 (de) | 2009-08-13 |
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