ATE304220T1 - Verfahren zur herstellung einer t-förmigen elektrode - Google Patents
Verfahren zur herstellung einer t-förmigen elektrodeInfo
- Publication number
- ATE304220T1 ATE304220T1 AT02001998T AT02001998T ATE304220T1 AT E304220 T1 ATE304220 T1 AT E304220T1 AT 02001998 T AT02001998 T AT 02001998T AT 02001998 T AT02001998 T AT 02001998T AT E304220 T1 ATE304220 T1 AT E304220T1
- Authority
- AT
- Austria
- Prior art keywords
- lacquer
- formed body
- producing
- metal
- shaped electrode
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H10D64/01324—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor characterised by the sectional shape, e.g. T or inverted-T
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/012—Manufacture or treatment of electrodes comprising a Schottky barrier to a semiconductor
- H10D64/0124—Manufacture or treatment of electrodes comprising a Schottky barrier to a semiconductor to Group III-V semiconductors
- H10D64/0125—Manufacture or treatment of electrodes comprising a Schottky barrier to a semiconductor to Group III-V semiconductors characterised by the sectional shape, e.g. T or inverted T
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
- H10D64/518—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their lengths or sectional shapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
- H10P76/202—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials for lift-off processes
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/945—Special, e.g. metal
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/948—Radiation resist
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/948—Radiation resist
- Y10S438/951—Lift-off
Landscapes
- Junction Field-Effect Transistors (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Electrodes Of Semiconductors (AREA)
- Battery Electrode And Active Subsutance (AREA)
- Electron Beam Exposure (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP02001998A EP1335418B1 (de) | 2002-02-05 | 2002-02-05 | Verfahren zur Herstellung einer T-förmigen Elektrode |
| DE10204621A DE10204621B8 (de) | 2002-02-05 | 2002-02-05 | Verfahren zur Herstellung einer mit einem vertikalen Profil versehenen Elektrode und eine derartige Elektrode umfassendes Halbleiterbauelement |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE304220T1 true ATE304220T1 (de) | 2005-09-15 |
Family
ID=7713698
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT02001998T ATE304220T1 (de) | 2002-02-05 | 2002-02-05 | Verfahren zur herstellung einer t-förmigen elektrode |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US6881688B2 (de) |
| EP (1) | EP1335418B1 (de) |
| AT (1) | ATE304220T1 (de) |
| DE (2) | DE60206012T2 (de) |
| TW (1) | TWI254992B (de) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7651957B2 (en) | 2003-05-20 | 2010-01-26 | Polymer Vision Limited | Structure for a semiconductor arrangement and a method of manufacturing a semiconductor arrangement |
| US7892903B2 (en) * | 2004-02-23 | 2011-02-22 | Asml Netherlands B.V. | Device manufacturing method and substrate comprising multiple resist layers |
| DE102005002550B4 (de) * | 2005-01-19 | 2007-02-08 | Infineon Technologies Ag | Lift-Off-Verfahren |
| JP4640047B2 (ja) * | 2005-08-30 | 2011-03-02 | 沖電気工業株式会社 | エッチング方法、金属膜構造体の製造方法およびエッチング構造体 |
| KR100795242B1 (ko) * | 2006-11-03 | 2008-01-15 | 학교법인 포항공과대학교 | 반도체 소자의 게이트 형성 방법 및 그 게이트 구조 |
| US8158014B2 (en) * | 2008-06-16 | 2012-04-17 | International Business Machines Corporation | Multi-exposure lithography employing differentially sensitive photoresist layers |
| US8476168B2 (en) * | 2011-01-26 | 2013-07-02 | International Business Machines Corporation | Non-conformal hardmask deposition for through silicon etch |
| JP5768397B2 (ja) * | 2011-02-16 | 2015-08-26 | 三菱電機株式会社 | 半導体装置の製造方法 |
| DE102011075888B4 (de) * | 2011-05-16 | 2014-07-10 | Robert Bosch Gmbh | Halbleitervorrichtung mit mindestens einem Kontakt und Herstellungsverfahren für eine Halbleitervorrichtung mit mindestens einem Kontakt |
| US9059095B2 (en) | 2013-04-22 | 2015-06-16 | International Business Machines Corporation | Self-aligned borderless contacts using a photo-patternable dielectric material as a replacement contact |
| US9548238B2 (en) | 2013-08-12 | 2017-01-17 | Globalfoundries Inc. | Method of manufacturing a semiconductor device using a self-aligned OPL replacement contact and patterned HSQ and a semiconductor device formed by same |
| CN104459854B (zh) * | 2013-09-22 | 2017-12-01 | 清华大学 | 金属光栅的制备方法 |
| KR101736270B1 (ko) * | 2014-02-14 | 2017-05-17 | 한국전자통신연구원 | 안정화된 게이트 구조를 갖는 반도체 소자 및 그의 제조 방법 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4238559A (en) * | 1978-08-24 | 1980-12-09 | International Business Machines Corporation | Two layer resist system |
| US4373018A (en) * | 1981-06-05 | 1983-02-08 | Bell Telephone Laboratories, Incorporated | Multiple exposure microlithography patterning method |
| US5053348A (en) * | 1989-12-01 | 1991-10-01 | Hughes Aircraft Company | Fabrication of self-aligned, t-gate hemt |
| JPH04177738A (ja) * | 1990-11-09 | 1992-06-24 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
| JPH0590300A (ja) * | 1991-09-30 | 1993-04-09 | Fujitsu Ltd | 半導体装置の製造方法 |
| JP2723405B2 (ja) * | 1991-11-12 | 1998-03-09 | 松下電器産業株式会社 | 微細電極の形成方法 |
| FR2684801B1 (fr) * | 1991-12-06 | 1997-01-24 | Picogiga Sa | Procede de realisation de composants semiconducteurs, notamment sur gaas ou inp, avec recuperation du substrat par voie chimique. |
| JPH08172102A (ja) * | 1994-12-20 | 1996-07-02 | Murata Mfg Co Ltd | 半導体装置の製造方法 |
| JP3591762B2 (ja) * | 1998-08-07 | 2004-11-24 | 株式会社村田製作所 | パターンの形成方法 |
-
2002
- 2002-02-05 AT AT02001998T patent/ATE304220T1/de not_active IP Right Cessation
- 2002-02-05 DE DE60206012T patent/DE60206012T2/de not_active Expired - Lifetime
- 2002-02-05 EP EP02001998A patent/EP1335418B1/de not_active Expired - Lifetime
- 2002-02-05 DE DE10204621A patent/DE10204621B8/de not_active Expired - Fee Related
- 2002-12-20 US US10/323,817 patent/US6881688B2/en not_active Expired - Fee Related
-
2003
- 2003-01-13 TW TW092100599A patent/TWI254992B/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| EP1335418B1 (de) | 2005-09-07 |
| EP1335418A1 (de) | 2003-08-13 |
| DE60206012T2 (de) | 2006-06-22 |
| DE60206012D1 (de) | 2005-10-13 |
| US20030153178A1 (en) | 2003-08-14 |
| DE10204621B8 (de) | 2010-03-25 |
| US6881688B2 (en) | 2005-04-19 |
| TW200303056A (en) | 2003-08-16 |
| DE10204621A1 (de) | 2003-08-07 |
| TWI254992B (en) | 2006-05-11 |
| DE10204621B4 (de) | 2009-11-26 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |