ATE306154T1 - Plesiochroner demultiplexer - Google Patents

Plesiochroner demultiplexer

Info

Publication number
ATE306154T1
ATE306154T1 AT02360076T AT02360076T ATE306154T1 AT E306154 T1 ATE306154 T1 AT E306154T1 AT 02360076 T AT02360076 T AT 02360076T AT 02360076 T AT02360076 T AT 02360076T AT E306154 T1 ATE306154 T1 AT E306154T1
Authority
AT
Austria
Prior art keywords
tributary
signal
multiplex signal
buffer memory
data bits
Prior art date
Application number
AT02360076T
Other languages
English (en)
Inventor
Michael Dr Wolf
Original Assignee
Cit Alcatel
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cit Alcatel filed Critical Cit Alcatel
Application granted granted Critical
Publication of ATE306154T1 publication Critical patent/ATE306154T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/07—Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
    • H04J3/076—Bit and byte stuffing, e.g. SDH/PDH desynchronisers, bit-leaking

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Ultra Sonic Daignosis Equipment (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Measurement And Recording Of Electrical Phenomena And Electrical Characteristics Of The Living Body (AREA)
AT02360076T 2002-02-28 2002-02-28 Plesiochroner demultiplexer ATE306154T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP02360076A EP1343261B1 (de) 2002-02-28 2002-02-28 Plesiochroner Demultiplexer

Publications (1)

Publication Number Publication Date
ATE306154T1 true ATE306154T1 (de) 2005-10-15

Family

ID=27741255

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02360076T ATE306154T1 (de) 2002-02-28 2002-02-28 Plesiochroner demultiplexer

Country Status (4)

Country Link
US (1) US7362778B2 (de)
EP (1) EP1343261B1 (de)
AT (1) ATE306154T1 (de)
DE (1) DE60206468T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7564875B2 (en) * 2003-11-11 2009-07-21 Intel Corporation Techniques to map and de-map signals
EP1675291B1 (de) * 2004-12-23 2007-04-18 Alcatel Lucent Digitaltaktfilter
CN1848717B (zh) 2005-04-15 2011-04-06 华为技术有限公司 获得异步解映射时钟的方法及电路
US7839885B2 (en) * 2005-04-25 2010-11-23 Lsi Corporation Connection memory for tributary time-space switches
ATE519286T1 (de) * 2005-12-14 2011-08-15 Alcatel Lucent Verfahren und vorrichtung zur rückabbildung einer untersystemeinheit und zur zurückgewinnung des synchronismus der niedrigen untersystemeinheit
US20070220184A1 (en) * 2006-03-17 2007-09-20 International Business Machines Corporation Latency-locked loop (LLL) circuit, buffer including the circuit, and method of adjusting a data rate
JP4583347B2 (ja) * 2006-07-19 2010-11-17 三洋電機株式会社 光ディスク用信号処理装置
WO2012077805A1 (ja) * 2010-12-10 2012-06-14 日本電信電話株式会社 クライアント信号マッピング回路及びマッピング方法
DE102013020954A1 (de) 2013-12-12 2015-06-18 Northrop Grumman Litef Gmbh Verfahren und Vorrichtung zum Übertragen von Daten an asynchronen Übergängen zwischen Domänen mit unterschiedlichen Taktfrequenzen

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5162047A (en) * 1989-08-28 1992-11-10 Tokyo Electron Sagami Limited Vertical heat treatment apparatus having wafer transfer mechanism and method for transferring wafers
US5297180A (en) * 1989-11-17 1994-03-22 Transwitch Corporation Digital clock dejitter circuits for regenerating clock signals with minimal jitter
DE59006856D1 (de) * 1990-02-16 1994-09-22 Siemens Ag Verfahren und anordnung zur taktrückgewinnung.
US5131013A (en) * 1990-05-30 1992-07-14 At&T Bell Laboratories Asynchronous-synchronous digital transmission signal conversion
DE4108429A1 (de) * 1991-03-15 1992-09-17 Philips Patentverwaltung Uebertragungssystem fuer die digitale synchrone hierarchie
DE4110933A1 (de) * 1991-04-04 1992-10-08 Philips Patentverwaltung Uebertragungssystem fuer die synchrone digitale hierachie
FI95636C (fi) * 1992-02-14 1996-02-26 Nokia Telecommunications Oy Desynkronisaattori ja menetelmä osoitinvärinän vaimentamiseksi desynkronisaattorissa
JP3100252B2 (ja) * 1992-05-26 2000-10-16 東京エレクトロン株式会社 被処理体用ボート及びそれを用いた被処理体の移し換え方法ならびに熱処理装置
DE4326771A1 (de) * 1993-08-10 1995-02-16 Philips Patentverwaltung Übertragungssystem
FR2709898B3 (fr) * 1993-09-10 1995-10-13 Cit Alcatel Dispositif de filtrage de gigue de déjustification positive d'un train numérique et application au filtrage de gigue de déjustification positive et positive-négative d'un train numérique.
US5781597A (en) * 1995-02-16 1998-07-14 Alcatel Sel Aktiengesellschaft Synchronous digital transmission system having justification circuit that counts frame bytes, calculates offsets, compares thresholds, and initiates justification action
US5563891A (en) * 1995-09-05 1996-10-08 Industrial Technology Research Institute Waiting time jitter reduction by synchronizer stuffing threshold modulation
JPH0992625A (ja) * 1995-09-20 1997-04-04 Tokyo Electron Ltd 熱処理用ボ−ト
DE19545675A1 (de) * 1995-12-07 1997-06-12 Sel Alcatel Ag Synchrones digitales Übertragungssystem
KR19990077350A (ko) * 1996-02-29 1999-10-25 히가시 데쓰로 반도체웨이퍼의 열처리용 보트
US6156121A (en) * 1996-12-19 2000-12-05 Tokyo Electron Limited Wafer boat and film formation method
DE19820572A1 (de) * 1998-05-08 1999-11-11 Alcatel Sa Desynchronisiereinrichtung für ein synchrones digitales Nachrichtenübertragungssystem
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JP3478228B2 (ja) * 2000-03-07 2003-12-15 日本電気株式会社 速度変換回路及びその制御方法
CA2307044A1 (en) * 2000-04-28 2001-10-28 Pmc-Sierra Inc. Multi-channel sonet/sdh desynchronizer

Also Published As

Publication number Publication date
EP1343261B1 (de) 2005-10-05
US20030161350A1 (en) 2003-08-28
US7362778B2 (en) 2008-04-22
DE60206468D1 (de) 2005-11-10
EP1343261A1 (de) 2003-09-10
DE60206468T2 (de) 2006-05-11

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Legal Events

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