ATE320168T1 - Leiterplatte - Google Patents

Leiterplatte

Info

Publication number
ATE320168T1
ATE320168T1 AT02732644T AT02732644T ATE320168T1 AT E320168 T1 ATE320168 T1 AT E320168T1 AT 02732644 T AT02732644 T AT 02732644T AT 02732644 T AT02732644 T AT 02732644T AT E320168 T1 ATE320168 T1 AT E320168T1
Authority
AT
Austria
Prior art keywords
circuit board
conductor tracks
filled
printed circuit
interruptions
Prior art date
Application number
AT02732644T
Other languages
English (en)
Inventor
Hermann Hirt
Hubert Heini
Paul-Heinz Wagner
Original Assignee
Thomson Licensing
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Licensing filed Critical Thomson Licensing
Application granted granted Critical
Publication of ATE320168T1 publication Critical patent/ATE320168T1/de

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09881—Coating only between conductors, i.e. flush with the conductors

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
  • Chemical And Physical Treatments For Wood And The Like (AREA)
  • Polysaccharides And Polysaccharide Derivatives (AREA)
  • Manufacturing Of Printed Wiring (AREA)
AT02732644T 2001-05-04 2002-04-22 Leiterplatte ATE320168T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE10121673A DE10121673A1 (de) 2001-05-04 2001-05-04 Gedruckte Leiterplatte

Publications (1)

Publication Number Publication Date
ATE320168T1 true ATE320168T1 (de) 2006-03-15

Family

ID=7683589

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02732644T ATE320168T1 (de) 2001-05-04 2002-04-22 Leiterplatte

Country Status (5)

Country Link
EP (1) EP1425949B1 (de)
AT (1) ATE320168T1 (de)
DE (3) DE10121673A1 (de)
ES (2) ES2258629T3 (de)
WO (1) WO2002091810A2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ES2217952B1 (es) * 2002-12-30 2006-03-16 Lear Automotive (Eeds) Spain, S.L. Procedimiento para la fabricacion de placas de circuito impreso con espacios entre pistas protegidos.
FR2858253A1 (fr) * 2003-07-30 2005-02-04 Novatec Procede et dispositif de remplissage par un produit visqueux de zones situees en creux ou interpistes sur un circut imprime
DE10354118A1 (de) * 2003-11-19 2005-06-02 Ruwel Ag Verfahren zur Herstellung von Leiterplatten und Leiterplatte
DE102004016205B4 (de) * 2004-03-30 2008-02-21 Sefar Ag Multilayer-Leiterplatte sowie Verfahren zum Herstellen einer solchen
DE102004021062A1 (de) * 2004-04-29 2005-11-24 Siemens Ag Verfahren zur Herstellung von Leiterplatten und/oder entsprechenden Konstrukten

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1301379B (de) * 1966-01-28 1969-08-21 Kupfer Asbest Co Verfahren zur Herstellung einer Schalterplatte nach Art der gedruckten Schaltungen
US3972755A (en) * 1972-12-14 1976-08-03 The United States Of America As Represented By The Secretary Of The Navy Dielectric circuit board bonding
DE2312482C3 (de) * 1973-03-13 1981-08-20 Rohde & Schwarz GmbH & Co KG, 8000 München Gedruckte Schaltungsplatte und Verfahren zu deren Herstellung
JPS53149673A (en) * 1977-06-01 1978-12-27 Matsushita Electric Industrial Co Ltd Printed circuit board and method of producing same
JPH02230792A (ja) * 1989-03-03 1990-09-13 Cmk Corp プリント配線板の製造方法におけるソルダランドの形成方法
JPH0383398A (ja) * 1989-08-26 1991-04-09 Shinko Electric Ind Co Ltd 配線基板及びその製造方法
JP2587548B2 (ja) * 1991-05-27 1997-03-05 富山日本電気株式会社 印刷配線板の製造方法
JPH0529752A (ja) * 1991-07-24 1993-02-05 Cmk Corp プリント配線板の製造方法
DE4417245A1 (de) * 1994-04-23 1995-10-26 Lpkf Cad Cam Systeme Gmbh Verfahren zur strukturierten Metallisierung der Oberfläche von Substraten
ES1033401Y (es) * 1996-03-07 1997-01-01 Eurocir S A Placa circuito impreso perfeccionada.
US6210746B1 (en) * 1999-05-28 2001-04-03 Unimicron Taiwan Corp. Method of fabricating a solder resist mask

Also Published As

Publication number Publication date
DE60209712D1 (de) 2006-05-04
WO2002091810A2 (en) 2002-11-14
ES2258629T3 (es) 2006-09-01
ES1051902U (es) 2002-10-16
DE10121673A1 (de) 2002-11-07
WO2002091810A3 (en) 2004-04-01
DE60209712T2 (de) 2006-11-02
EP1425949A2 (de) 2004-06-09
EP1425949B1 (de) 2006-03-08
DE20206463U1 (de) 2002-08-22

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties