ATE345576T1 - Elektronikgehäuse mit kondensator - Google Patents

Elektronikgehäuse mit kondensator

Info

Publication number
ATE345576T1
ATE345576T1 AT00937769T AT00937769T ATE345576T1 AT E345576 T1 ATE345576 T1 AT E345576T1 AT 00937769 T AT00937769 T AT 00937769T AT 00937769 T AT00937769 T AT 00937769T AT E345576 T1 ATE345576 T1 AT E345576T1
Authority
AT
Austria
Prior art keywords
capacitor
electrodes
electronic package
electronic housing
electronic
Prior art date
Application number
AT00937769T
Other languages
English (en)
Inventor
John D Geissinger
Paul M Harvey
Robert R Kieschke
Original Assignee
3M Innovative Properties Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 3M Innovative Properties Co filed Critical 3M Innovative Properties Co
Application granted granted Critical
Publication of ATE345576T1 publication Critical patent/ATE345576T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W44/00—Electrical arrangements for controlling or matching impedance
    • H10W44/601—Capacitive arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/401—Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07554—Controlling the environment, e.g. atmosphere composition or temperature changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Adhesives Or Adhesive Processes (AREA)
AT00937769T 2000-01-25 2000-05-25 Elektronikgehäuse mit kondensator ATE345576T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/491,302 US7064412B2 (en) 2000-01-25 2000-01-25 Electronic package with integrated capacitor

Publications (1)

Publication Number Publication Date
ATE345576T1 true ATE345576T1 (de) 2006-12-15

Family

ID=23951623

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00937769T ATE345576T1 (de) 2000-01-25 2000-05-25 Elektronikgehäuse mit kondensator

Country Status (9)

Country Link
US (2) US7064412B2 (de)
EP (1) EP1250709B1 (de)
JP (1) JP4878100B2 (de)
KR (1) KR100661937B1 (de)
AT (1) ATE345576T1 (de)
AU (1) AU2000252898A1 (de)
DE (1) DE60031887T2 (de)
HK (1) HK1051087B (de)
WO (1) WO2001056054A1 (de)

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US8607445B1 (en) 2005-01-10 2013-12-17 Endicott Interconnect Technologies, Inc. Substrate having internal capacitor and method of making same
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US8955215B2 (en) * 2009-05-28 2015-02-17 Hsio Technologies, Llc High performance surface mount electrical interconnect
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US9536815B2 (en) 2009-05-28 2017-01-03 Hsio Technologies, Llc Semiconductor socket with direct selective metalization
US8912812B2 (en) 2009-06-02 2014-12-16 Hsio Technologies, Llc Compliant printed circuit wafer probe diagnostic tool
WO2012061008A1 (en) 2010-10-25 2012-05-10 Hsio Technologies, Llc High performance electrical circuit structure
US9320133B2 (en) 2009-06-02 2016-04-19 Hsio Technologies, Llc Electrical interconnect IC device socket
US8955216B2 (en) 2009-06-02 2015-02-17 Hsio Technologies, Llc Method of making a compliant printed circuit peripheral lead semiconductor package
US8970031B2 (en) 2009-06-16 2015-03-03 Hsio Technologies, Llc Semiconductor die terminal
US9613841B2 (en) 2009-06-02 2017-04-04 Hsio Technologies, Llc Area array semiconductor device package interconnect structure with optional package-to-package or flexible circuit to package connection
US9196980B2 (en) 2009-06-02 2015-11-24 Hsio Technologies, Llc High performance surface mount electrical interconnect with external biased normal force loading
US9930775B2 (en) 2009-06-02 2018-03-27 Hsio Technologies, Llc Copper pillar full metal via electrical circuit structure
US9184145B2 (en) 2009-06-02 2015-11-10 Hsio Technologies, Llc Semiconductor device package adapter
WO2011002709A1 (en) 2009-06-29 2011-01-06 Hsio Technologies, Llc Compliant printed circuit semiconductor tester interface
US9318862B2 (en) 2009-06-02 2016-04-19 Hsio Technologies, Llc Method of making an electronic interconnect
US8988093B2 (en) 2009-06-02 2015-03-24 Hsio Technologies, Llc Bumped semiconductor wafer or die level electrical interconnect
WO2010141295A1 (en) 2009-06-02 2010-12-09 Hsio Technologies, Llc Compliant printed flexible circuit
WO2010141297A1 (en) 2009-06-02 2010-12-09 Hsio Technologies, Llc Compliant printed circuit wafer level semiconductor package
WO2012074963A1 (en) 2010-12-01 2012-06-07 Hsio Technologies, Llc High performance surface mount electrical interconnect
US9603249B2 (en) 2009-06-02 2017-03-21 Hsio Technologies, Llc Direct metalization of electrical circuit structures
US9699906B2 (en) 2009-06-02 2017-07-04 Hsio Technologies, Llc Hybrid printed circuit assembly with low density main core and embedded high density circuit regions
US9276339B2 (en) 2009-06-02 2016-03-01 Hsio Technologies, Llc Electrical interconnect IC device socket
WO2010141298A1 (en) 2009-06-02 2010-12-09 Hsio Technologies, Llc Composite polymer-metal electrical contacts
US9054097B2 (en) 2009-06-02 2015-06-09 Hsio Technologies, Llc Compliant printed circuit area array semiconductor device package
US8618649B2 (en) 2009-06-02 2013-12-31 Hsio Technologies, Llc Compliant printed circuit semiconductor package
US9231328B2 (en) 2009-06-02 2016-01-05 Hsio Technologies, Llc Resilient conductive electrical interconnect
US8928344B2 (en) 2009-06-02 2015-01-06 Hsio Technologies, Llc Compliant printed circuit socket diagnostic tool
WO2010147782A1 (en) 2009-06-16 2010-12-23 Hsio Technologies, Llc Simulated wirebond semiconductor package
US9320144B2 (en) * 2009-06-17 2016-04-19 Hsio Technologies, Llc Method of forming a semiconductor socket
US8984748B2 (en) 2009-06-29 2015-03-24 Hsio Technologies, Llc Singulated semiconductor device separable electrical interconnect
US10159154B2 (en) 2010-06-03 2018-12-18 Hsio Technologies, Llc Fusion bonded liquid crystal polymer circuit structure
US9689897B2 (en) 2010-06-03 2017-06-27 Hsio Technologies, Llc Performance enhanced semiconductor socket
US9350093B2 (en) 2010-06-03 2016-05-24 Hsio Technologies, Llc Selective metalization of electrical connector or socket housing
US8583850B2 (en) 2011-02-14 2013-11-12 Oracle America, Inc. Micro crossbar switch and on-die data network using the same
US9761520B2 (en) 2012-07-10 2017-09-12 Hsio Technologies, Llc Method of making an electrical connector having electrodeposited terminals
US9552977B2 (en) * 2012-12-10 2017-01-24 Intel Corporation Landside stiffening capacitors to enable ultrathin and other low-Z products
US10506722B2 (en) 2013-07-11 2019-12-10 Hsio Technologies, Llc Fusion bonded liquid crystal polymer electrical circuit structure
US10667410B2 (en) 2013-07-11 2020-05-26 Hsio Technologies, Llc Method of making a fusion bonded circuit structure
US10312731B2 (en) 2014-04-24 2019-06-04 Westrock Shared Services, Llc Powered shelf system for inductively powering electrical components of consumer product packages
US9755335B2 (en) 2015-03-18 2017-09-05 Hsio Technologies, Llc Low profile electrical interconnect with fusion bonded contact retention and solder wick reduction
KR102777475B1 (ko) * 2019-10-17 2025-03-10 에스케이하이닉스 주식회사 반도체 패키지

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Also Published As

Publication number Publication date
WO2001056054A1 (en) 2001-08-02
DE60031887T2 (de) 2007-07-05
EP1250709A1 (de) 2002-10-23
KR20020069020A (ko) 2002-08-28
DE60031887D1 (de) 2006-12-28
HK1051087B (en) 2007-06-29
US20060203458A1 (en) 2006-09-14
EP1250709B1 (de) 2006-11-15
US20030015787A1 (en) 2003-01-23
JP4878100B2 (ja) 2012-02-15
US7388275B2 (en) 2008-06-17
JP2003521119A (ja) 2003-07-08
HK1051087A1 (en) 2003-07-18
US7064412B2 (en) 2006-06-20
AU2000252898A1 (en) 2001-08-07
KR100661937B1 (ko) 2006-12-28

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties