ATE352869T1 - Halbleitervorrichtung und verfahren zu deren herstellung - Google Patents

Halbleitervorrichtung und verfahren zu deren herstellung

Info

Publication number
ATE352869T1
ATE352869T1 AT01927704T AT01927704T ATE352869T1 AT E352869 T1 ATE352869 T1 AT E352869T1 AT 01927704 T AT01927704 T AT 01927704T AT 01927704 T AT01927704 T AT 01927704T AT E352869 T1 ATE352869 T1 AT E352869T1
Authority
AT
Austria
Prior art keywords
passage
metal
organic material
substrate
layer
Prior art date
Application number
AT01927704T
Other languages
English (en)
Inventor
Petrus M Meijer
Cornelis A H A Mutsaers
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=8171227&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=ATE352869(T1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of ATE352869T1 publication Critical patent/ATE352869T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/034—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics bottomless barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42—Vias, e.g. via plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48—Insulating materials thereof

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Die Bonding (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
AT01927704T 2000-03-20 2001-02-23 Halbleitervorrichtung und verfahren zu deren herstellung ATE352869T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP00201006 2000-03-20

Publications (1)

Publication Number Publication Date
ATE352869T1 true ATE352869T1 (de) 2007-02-15

Family

ID=8171227

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01927704T ATE352869T1 (de) 2000-03-20 2001-02-23 Halbleitervorrichtung und verfahren zu deren herstellung

Country Status (8)

Country Link
US (2) US6613668B2 (de)
EP (1) EP1183725B1 (de)
JP (1) JP2003528467A (de)
KR (1) KR100749970B1 (de)
AT (1) ATE352869T1 (de)
DE (1) DE60126207T2 (de)
TW (1) TWI228787B (de)
WO (1) WO2001071801A1 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001071801A1 (en) * 2000-03-20 2001-09-27 Koninklijke Philips Electronics N.V. Semiconductor device and method of manufacturing same
US20030155657A1 (en) 2002-02-14 2003-08-21 Nec Electronics Corporation Manufacturing method of semiconductor device
US6751785B1 (en) * 2002-03-12 2004-06-15 Ubitech, Inc. System and method for limiting increase in capacitance due to dummy metal fills utilized for improving planar profile uniformity
TWI288443B (en) 2002-05-17 2007-10-11 Semiconductor Energy Lab SiN film, semiconductor device, and the manufacturing method thereof
US6853079B1 (en) 2002-08-15 2005-02-08 National Semiconductor Corporation Conductive trace with reduced RF impedance resulting from the skin effect
US6864581B1 (en) 2002-08-15 2005-03-08 National Semiconductor Corporation Etched metal trace with reduced RF impendance resulting from the skin effect
US6703710B1 (en) 2002-08-15 2004-03-09 National Semiconductor Corporation Dual damascene metal trace with reduced RF impedance resulting from the skin effect
US6740956B1 (en) * 2002-08-15 2004-05-25 National Semiconductor Corporation Metal trace with reduced RF impedance resulting from the skin effect
US20040222527A1 (en) * 2003-05-06 2004-11-11 Dostalik William W. Dual damascene pattern liner
WO2005041280A1 (en) * 2003-10-28 2005-05-06 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
JP2005167081A (ja) 2003-12-04 2005-06-23 Renesas Technology Corp 半導体装置およびその製造方法
US7341935B2 (en) * 2004-06-25 2008-03-11 Taiwan Semiconductor Manufacturing Co., Ltd. Alternative interconnect structure for semiconductor devices
TWI462179B (zh) * 2006-09-28 2014-11-21 東京威力科創股份有限公司 用以形成氧化矽膜之成膜方法與裝置
US8298628B2 (en) 2008-06-02 2012-10-30 Air Products And Chemicals, Inc. Low temperature deposition of silicon-containing films
CN102047386B (zh) * 2008-06-03 2013-06-19 气体产品与化学公司 含硅薄膜的低温沉积
CN102376633A (zh) * 2010-08-26 2012-03-14 中国科学院微电子研究所 一种半导体结构及其制造方法
US10930548B2 (en) * 2019-01-17 2021-02-23 Micron Technology, Inc. Methods of forming an apparatus for making semiconductor dieves
US20230066891A1 (en) * 2021-08-30 2023-03-02 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure having verticle conductive graphene and method for forming the same

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4962414A (en) * 1988-02-11 1990-10-09 Sgs-Thomson Microelectronics, Inc. Method for forming a contact VIA
JPH10284600A (ja) 1997-03-31 1998-10-23 Sony Corp 半導体装置及びその製造方法
US5985762A (en) * 1997-05-19 1999-11-16 International Business Machines Corporation Method of forming a self-aligned copper diffusion barrier in vias
US5904565A (en) 1997-07-17 1999-05-18 Sharp Microelectronics Technology, Inc. Low resistance contact between integrated circuit metal levels and method for same
US6025264A (en) * 1998-02-09 2000-02-15 United Microelectronics Corp. Fabricating method of a barrier layer
US6245662B1 (en) * 1998-07-23 2001-06-12 Applied Materials, Inc. Method of producing an interconnect structure for an integrated circuit
WO2001071801A1 (en) * 2000-03-20 2001-09-27 Koninklijke Philips Electronics N.V. Semiconductor device and method of manufacturing same
TW486801B (en) * 2000-04-07 2002-05-11 Taiwan Semiconductor Mfg Method of fabricating dual damascene structure

Also Published As

Publication number Publication date
EP1183725B1 (de) 2007-01-24
US6613668B2 (en) 2003-09-02
DE60126207D1 (de) 2007-03-15
KR20020005750A (ko) 2002-01-17
KR100749970B1 (ko) 2007-08-16
US20030211737A1 (en) 2003-11-13
WO2001071801A1 (en) 2001-09-27
EP1183725A1 (de) 2002-03-06
US20010023121A1 (en) 2001-09-20
DE60126207T2 (de) 2007-11-15
TWI228787B (en) 2005-03-01
JP2003528467A (ja) 2003-09-24
US6667236B2 (en) 2003-12-23

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