ATE355557T1 - Rekonfigurierungsverfahren für ein gatter von identischen funktionselementen - Google Patents

Rekonfigurierungsverfahren für ein gatter von identischen funktionselementen

Info

Publication number
ATE355557T1
ATE355557T1 AT00951638T AT00951638T ATE355557T1 AT E355557 T1 ATE355557 T1 AT E355557T1 AT 00951638 T AT00951638 T AT 00951638T AT 00951638 T AT00951638 T AT 00951638T AT E355557 T1 ATE355557 T1 AT E355557T1
Authority
AT
Austria
Prior art keywords
functional elements
elements
gate
network
interconnecting
Prior art date
Application number
AT00951638T
Other languages
English (en)
Inventor
Fabien Clermidy
Thierry Collette
Original Assignee
Commissariat Energie Atomique
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat Energie Atomique filed Critical Commissariat Energie Atomique
Application granted granted Critical
Publication of ATE355557T1 publication Critical patent/ATE355557T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17337—Direct connection machines, e.g. completely connected computers, point to point communication networks
    • G06F15/17343—Direct connection machines, e.g. completely connected computers, point to point communication networks wherein the interconnection is dynamically configurable, e.g. having loosely coupled nearest neighbor architecture

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Element Separation (AREA)
AT00951638T 1999-07-02 2000-06-30 Rekonfigurierungsverfahren für ein gatter von identischen funktionselementen ATE355557T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9908554A FR2795839B1 (fr) 1999-07-02 1999-07-02 Procede de reconfiguration applicable a un reseau d'elements fonctionnels identiques

Publications (1)

Publication Number Publication Date
ATE355557T1 true ATE355557T1 (de) 2006-03-15

Family

ID=9547641

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00951638T ATE355557T1 (de) 1999-07-02 2000-06-30 Rekonfigurierungsverfahren für ein gatter von identischen funktionselementen

Country Status (6)

Country Link
US (1) US6826709B1 (de)
EP (1) EP1116116B1 (de)
AT (1) ATE355557T1 (de)
DE (1) DE60033624T2 (de)
FR (1) FR2795839B1 (de)
WO (1) WO2001002960A1 (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6938256B2 (en) 2000-01-18 2005-08-30 Galactic Computing Corporation System for balance distribution of requests across multiple servers using dynamic metrics
US6816905B1 (en) 2000-11-10 2004-11-09 Galactic Computing Corporation Bvi/Bc Method and system for providing dynamic hosted service management across disparate accounts/sites
US8538843B2 (en) 2000-07-17 2013-09-17 Galactic Computing Corporation Bvi/Bc Method and system for operating an E-commerce service provider
GB2370380B (en) 2000-12-19 2003-12-31 Picochip Designs Ltd Processor architecture
US7606819B2 (en) * 2001-10-15 2009-10-20 Maya-Systems Inc. Multi-dimensional locating system and method
GB2417586B (en) * 2002-07-19 2007-03-28 Picochip Designs Ltd Processor array
US20080058106A1 (en) 2002-10-07 2008-03-06 Maya-Systems Inc. Multi-dimensional locating game system and method
US7451183B2 (en) * 2003-03-21 2008-11-11 Hewlett-Packard Development Company, L.P. Assembly and method for balancing processors in a partitioned server
JP2006236106A (ja) * 2005-02-25 2006-09-07 Canon Inc データ処理装置及びデータ処理方法
US8131975B1 (en) 2008-07-07 2012-03-06 Ovics Matrix processor initialization systems and methods
US7958341B1 (en) 2008-07-07 2011-06-07 Ovics Processing stream instruction in IC of mesh connected matrix of processors containing pipeline coupled switch transferring messages over consecutive cycles from one link to another link or memory
US8145880B1 (en) 2008-07-07 2012-03-27 Ovics Matrix processor data switch routing systems and methods
US8327114B1 (en) * 2008-07-07 2012-12-04 Ovics Matrix processor proxy systems and methods
GB2470037B (en) 2009-05-07 2013-07-10 Picochip Designs Ltd Methods and devices for reducing interference in an uplink
GB2470771B (en) 2009-06-05 2012-07-18 Picochip Designs Ltd A method and device in a communication network
GB2470891B (en) 2009-06-05 2013-11-27 Picochip Designs Ltd A method and device in a communication network
GB2482869B (en) 2010-08-16 2013-11-06 Picochip Designs Ltd Femtocell access control
KR101731929B1 (ko) 2011-02-08 2017-05-02 삼성전자주식회사 재구성 가능 프로세서 및 구동 제어 방법
GB2489716B (en) 2011-04-05 2015-06-24 Intel Corp Multimode base system
GB2489919B (en) 2011-04-05 2018-02-14 Intel Corp Filter
US8990616B2 (en) * 2012-09-28 2015-03-24 International Business Machines Corporation Final faulty core recovery mechanisms for a two-dimensional network on a processor array
US9160617B2 (en) 2012-09-28 2015-10-13 International Business Machines Corporation Faulty core recovery mechanisms for a three-dimensional network on a processor array
US9946771B2 (en) 2014-05-30 2018-04-17 Apple Inc. User interface for searching

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3681463D1 (de) * 1985-01-29 1991-10-24 Secr Defence Brit Verarbeitungszelle fuer fehlertolerante matrixanordnungen.
US6646989B1 (en) * 1998-06-29 2003-11-11 Lucent Technologies Inc. Hop-by-hop routing with node-dependent topology information
FR2795840B1 (fr) * 1999-07-02 2001-08-31 Commissariat Energie Atomique Reseau de processeurs paralleles avec tolerance aux fautes de ces processeurs, et procede de reconfiguration applicable a un tel reseau

Also Published As

Publication number Publication date
FR2795839A1 (fr) 2001-01-05
EP1116116A1 (de) 2001-07-18
WO2001002960A1 (fr) 2001-01-11
FR2795839B1 (fr) 2001-09-07
US6826709B1 (en) 2004-11-30
DE60033624D1 (de) 2007-04-12
EP1116116B1 (de) 2007-02-28
DE60033624T2 (de) 2007-11-15

Similar Documents

Publication Publication Date Title
ATE355557T1 (de) Rekonfigurierungsverfahren für ein gatter von identischen funktionselementen
DE60020933D1 (de) Gatter von parallelen prozessoren mit fehlertoleranz der prozessoren und rekonfigurierungsverfahren dafür
ATE384997T1 (de) Verfahren und systeme zum austausch von erreichbarkeitsinformationen und zum umschalten zwischen redundanten schnittstellen in einem netzwerkcluster
DE602006019379D1 (de) Verfahren und system zum routen
ATE538567T1 (de) Verfahren zum erzeugen von spanning trees
DK1593240T3 (da) Fremgangsmåde og apparat for hurtig rekonfigurering af en netværkstopologi
DE60011719D1 (de) Verfahren zum Senden von Routingdaten durch ein Netzwerk und Netzwerksknoten, der das Verfahren verwendet
DE60313089D1 (de) Verbindungsglied für eine Raupenkette
IT1305566B1 (it) Struttura rinforzata, elemento strutturale rinforzato e procedimentoper la loro realizzazione.
DE502006007327D1 (de) Ausfall- und auskopplungstolerantes kommunikations-netzwerk, datenpfad-umschalteinrichtung und entsprechendes verfahren
EP1117038A3 (de) Verfahren und Gerät für Bereitsstellung von fehlertoleranten Adressen für Knoten in einem gruppierten Rechnersystem
ATE268081T1 (de) Mechanismus und verfahren zur bestimmung und schnellen wiederherstellung einer minimalen kapazität in einem vermaschten netz
DE69907773D1 (de) In-Situ Reparaturverfahren für ein Turbomaschinenbauteil.
DE60324263D1 (de) Waschverfahren für waschmaschine
TW200704028A (en) End-to-end considerate link control and routing in a multihop network
ATE394760T1 (de) System aus banknotenbearbeitungsmaschinen banknotenbearbeitungsmaschine und verfahren für deren betrieb
WO2004062209A3 (en) System and method for programming hyper transport routing tables on multiprocessor systems
DE3787153D1 (de) Vermittlungselement für selbstsuchende, mehrstufige Paketvermittlungsnetze.
DE60202596D1 (de) Schaupackung für z.b. eier
WO2003005650A3 (en) Method and system for improving a route along which data is sent using an ip protocol in a data communications network
DE602004009324D1 (de) Integrierte datenverarbeitungsschaltung mit mehreren programmierbaren prozessoren
SE8901723D0 (sv) Foerfarande foer att undvika latenta fel i ett logiknaet foer majoritetsval av binaera signaler och styrbart i logikorgen foer utfoerande av en logisk operation
DE60314821D1 (de) Steuersystem für Leitweglenkung, Steuervorrichtung für Leitweglenkung und Steuerverfahren für Leitweglenkung
ATE553439T1 (de) Ein tandem-node-system und ein verfahren dafür
ATE543303T1 (de) Konstruktion und implementierung von backup- pfaden in autonomen systemen

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties