ATE373356T1 - Verfahren und busschnittstelle zur verbindung eines buses mit einer anwendungsvorrichtung - Google Patents

Verfahren und busschnittstelle zur verbindung eines buses mit einer anwendungsvorrichtung

Info

Publication number
ATE373356T1
ATE373356T1 AT00103618T AT00103618T ATE373356T1 AT E373356 T1 ATE373356 T1 AT E373356T1 AT 00103618 T AT00103618 T AT 00103618T AT 00103618 T AT00103618 T AT 00103618T AT E373356 T1 ATE373356 T1 AT E373356T1
Authority
AT
Austria
Prior art keywords
bus
data
data packets
chip memory
layer
Prior art date
Application number
AT00103618T
Other languages
English (en)
Inventor
Siegfried Schweidler
Thomas Brune
Original Assignee
Thomson Brandt Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Brandt Gmbh filed Critical Thomson Brandt Gmbh
Application granted granted Critical
Publication of ATE373356T1 publication Critical patent/ATE373356T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9057—Arrangements for supporting packet reassembly or resequencing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0072—Error control for data other than payload data, e.g. control data
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40052—High-speed IEEE 1394 serial bus
    • H04L12/40058—Isochronous transmission
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40052—High-speed IEEE 1394 serial bus
    • H04L12/40071—Packet processing; Packet format
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/901—Buffering arrangements using storage descriptor, e.g. read or write pointers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9036—Common buffer combined with individual queues
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9084—Reactions to storage capacity overflow
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9084—Reactions to storage capacity overflow
    • H04L49/9089—Reactions to storage capacity overflow replacing packets in a storage arrangement, e.g. pushout

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Multimedia (AREA)
  • Communication Control (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Small-Scale Networks (AREA)
  • Detection And Correction Of Errors (AREA)
  • Information Transfer Systems (AREA)
  • Traffic Control Systems (AREA)
AT00103618T 1999-03-06 2000-02-21 Verfahren und busschnittstelle zur verbindung eines buses mit einer anwendungsvorrichtung ATE373356T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP99250067A EP1035682A1 (de) 1999-03-06 1999-03-06 Verfahren und Busschnittstelle mit einem Speicher in einem integrierten Schaltkreis zur Verbindung eines Datenbuses mit einer Auftragsvorrichtung

Publications (1)

Publication Number Publication Date
ATE373356T1 true ATE373356T1 (de) 2007-09-15

Family

ID=8241142

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00103618T ATE373356T1 (de) 1999-03-06 2000-02-21 Verfahren und busschnittstelle zur verbindung eines buses mit einer anwendungsvorrichtung

Country Status (6)

Country Link
US (1) US6618832B1 (de)
EP (1) EP1035682A1 (de)
JP (1) JP4504497B2 (de)
CN (1) CN1127235C (de)
AT (1) ATE373356T1 (de)
DE (1) DE60036317T2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100667738B1 (ko) 2000-03-29 2007-01-11 삼성전자주식회사 무선 패킷 송수신 장치 및 그 방법
US6931581B1 (en) * 2000-10-25 2005-08-16 Sun Microsystems, Inc. Method for superimposing a sequence number in an error detection code in a data network
US6684363B1 (en) 2000-10-25 2004-01-27 Sun Microsystems, Inc. Method for detecting errors on parallel links
US6735649B2 (en) * 2001-05-03 2004-05-11 Advanced Micro Devices, Inc. Multiple buffers for removing unwanted header information from received data packets
WO2003032000A1 (en) * 2001-10-05 2003-04-17 Matsushita Electric Industrial Co., Ltd. Lsi inspection method and apparatus, and lsi tester
EP1331775A1 (de) * 2002-01-25 2003-07-30 Deutsche Thomson-Brandt Gmbh Schaltung der physikalischen Schicht und Schnittstellensschaltung
JP3775318B2 (ja) 2002-03-20 2006-05-17 セイコーエプソン株式会社 データ転送制御装置及び電子機器
DE10353974A1 (de) * 2003-11-19 2005-06-30 Siemens Ag Verfahren zur Übertragung von digitalen Informationspaketen in einem Datennetz
US7555206B2 (en) * 2004-05-07 2009-06-30 Hong-Chi Chen Apparatus for retrieving data from detachable optical driver
US20080205432A1 (en) * 2005-04-07 2008-08-28 Koninklijke Philips Electronics, N.V. Network-On-Chip Environment and Method For Reduction of Latency
EP1773043A1 (de) * 2005-10-06 2007-04-11 Dibcom Verfahren und System zur Speicherung von Datenpaketen
EP1835728A1 (de) * 2006-03-15 2007-09-19 Dibcom Verfahren zur Datenübertragung und Datenwiederherstellung
EP2015587B1 (de) * 2007-05-14 2012-01-25 Apple Inc. Speicherverfahren eines Multimediaobjekts, Datenstruktur und entsprechendes Endgerät
CN101807967B (zh) * 2009-02-13 2015-07-08 瑞昱半导体股份有限公司 用于物理层的远程控制方法及其相关物理层装置
CN104486036B (zh) * 2014-12-09 2018-10-26 中国航空工业集团公司第六三一研究所 一种满足1394协议要求消息容错处理电路及方法
TWI658364B (zh) 2018-03-20 2019-05-01 慧榮科技股份有限公司 存取快閃記憶體模組的方法及相關的快閃記憶體控制器與電子裝置
TWI698750B (zh) * 2018-03-20 2020-07-11 慧榮科技股份有限公司 存取快閃記憶體模組的方法及相關的快閃記憶體控制器與電子裝置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3428098B2 (ja) * 1993-11-26 2003-07-22 富士電機株式会社 ネットワークにおけるデータ転送方法
US5548598A (en) * 1994-03-28 1996-08-20 Motorola In a data communications systems a method of forward error correction
JPH09294238A (ja) * 1996-04-24 1997-11-11 Sony Corp 画像取り込み装置、画像取り込み方法、画像取り込みシステム、画像表示処理装置、及び記録媒体
EP0804033A3 (de) * 1996-04-26 2003-12-10 Texas Instruments Incorporated Verbesserungen an oder in Bezug auf elektronischen Bauelementen
JP3165050B2 (ja) * 1996-12-24 2001-05-14 九州日本電気通信システム株式会社 パケットエラー検出方式
US5991912A (en) * 1997-05-15 1999-11-23 Next Level Communications Digital video transport error handling in cell based communications systems
US6263466B1 (en) * 1998-03-05 2001-07-17 Teledesic Llc System and method of separately coding the header and payload of a data packet for use in satellite data communication
EP1018807B1 (de) * 1998-05-27 2003-09-03 Ntt Mobile Communications Network Inc. Verfahren und gerät zum schutz gegen fehler

Also Published As

Publication number Publication date
US6618832B1 (en) 2003-09-09
CN1127235C (zh) 2003-11-05
EP1035682A1 (de) 2000-09-13
CN1266316A (zh) 2000-09-13
DE60036317T2 (de) 2008-01-10
DE60036317D1 (de) 2007-10-25
JP2000312237A (ja) 2000-11-07
JP4504497B2 (ja) 2010-07-14

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