ATE387012T1 - Kontaktierungsstruktur einer integrierten leistungsschaltung - Google Patents

Kontaktierungsstruktur einer integrierten leistungsschaltung

Info

Publication number
ATE387012T1
ATE387012T1 AT01000318T AT01000318T ATE387012T1 AT E387012 T1 ATE387012 T1 AT E387012T1 AT 01000318 T AT01000318 T AT 01000318T AT 01000318 T AT01000318 T AT 01000318T AT E387012 T1 ATE387012 T1 AT E387012T1
Authority
AT
Austria
Prior art keywords
contact pads
power
transistor
active components
metals
Prior art date
Application number
AT01000318T
Other languages
English (en)
Inventor
Taylor R Efland
Sameer Pendharkar
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of ATE387012T1 publication Critical patent/ATE387012T1/de

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/464Additional interconnections in combination with leadframes
    • H10W70/465Bumps or wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/427Power or ground buses
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/481Leadframes for devices being provided for in groups H10D8/00 - H10D48/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/019Manufacture or treatment of bond pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • H10W72/07531Techniques
    • H10W72/07532Compression bonding, e.g. thermocompression bonding
    • H10W72/07533Ultrasonic bonding, e.g. thermosonic bonding
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/521Structures or relative sizes of bond wires
    • H10W72/522Multilayered bond wires, e.g. having a coating concentric around a core
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/536Shapes of wire connectors the connected ends being ball-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/5363Shapes of wire connectors the connected ends being wedge-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/547Dispositions of multiple bond wires
    • H10W72/5473Dispositions of multiple bond wires multiple bond wires connected to a common bond pad
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/547Dispositions of multiple bond wires
    • H10W72/5475Dispositions of multiple bond wires multiple bond wires connected to common bond pads at both ends of the wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • H10W72/552Materials of bond wires comprising metals or metalloids, e.g. silver
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • H10W72/552Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • H10W72/552Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • H10W72/552Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5525Materials of bond wires comprising metals or metalloids, e.g. silver comprising copper [Cu]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • H10W72/555Materials of bond wires of outermost layers of multilayered bond wires, e.g. material of a coating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/59Bond pads specially adapted therefor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/921Structures or relative sizes of bond pads
    • H10W72/923Bond pads having multiple stacked layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • H10W72/932Plan-view shape, i.e. in top view
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/951Materials of bond pads
    • H10W72/952Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
AT01000318T 2000-07-27 2001-07-27 Kontaktierungsstruktur einer integrierten leistungsschaltung ATE387012T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US22105100P 2000-07-27 2000-07-27

Publications (1)

Publication Number Publication Date
ATE387012T1 true ATE387012T1 (de) 2008-03-15

Family

ID=22826133

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01000318T ATE387012T1 (de) 2000-07-27 2001-07-27 Kontaktierungsstruktur einer integrierten leistungsschaltung

Country Status (5)

Country Link
US (1) US7045903B2 (de)
EP (1) EP1176640B1 (de)
JP (1) JP2002164437A (de)
AT (1) ATE387012T1 (de)
DE (1) DE60132855T2 (de)

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6104761A (en) 1998-08-28 2000-08-15 Sicom, Inc. Constrained-envelope digital-communications transmission system and method therefor
DE10200932A1 (de) * 2002-01-12 2003-07-24 Philips Intellectual Property Diskretes Halbleiterbauelement
US6972464B2 (en) * 2002-10-08 2005-12-06 Great Wall Semiconductor Corporation Power MOSFET
JP4396200B2 (ja) * 2002-10-30 2010-01-13 株式会社デンソー 半導体装置
JP2004303861A (ja) * 2003-03-31 2004-10-28 Renesas Technology Corp 半導体装置およびその製造方法
US7005369B2 (en) * 2003-08-21 2006-02-28 Intersil American Inc. Active area bonding compatible high current structures
US8274160B2 (en) 2003-08-21 2012-09-25 Intersil Americas Inc. Active area bonding compatible high current structures
EP1603160A2 (de) * 2004-06-01 2005-12-07 Matsushita Electric Industrial Co., Ltd. Integrierte Halbleiterschaltungsanordnung
KR100615579B1 (ko) 2004-09-20 2006-08-25 삼성전자주식회사 반도체 메모리 장치 및 이 장치의 파워 라인 배치 방법
KR100675275B1 (ko) * 2004-12-16 2007-01-26 삼성전자주식회사 반도체 장치 및 이 장치의 패드 배치방법
US7404513B2 (en) * 2004-12-30 2008-07-29 Texas Instruments Incorporated Wire bonds having pressure-absorbing balls
US7476976B2 (en) * 2005-02-23 2009-01-13 Texas Instruments Incorporated Flip chip package with advanced electrical and thermal properties for high current designs
US7483248B1 (en) * 2005-05-19 2009-01-27 Sun Microsystems, Inc. Method and apparatus for detecting current changes in integrated circuits
KR100849640B1 (ko) 2005-09-16 2008-08-01 가부시키가이샤 리코 반도체 장치
DE102006050087A1 (de) 2006-10-24 2008-04-30 Austriamicrosystems Ag Halbleiterkörper und Verfahren zum Entwurf eines Halbleiterkörpers mit einer Anschlussleitung
US7667316B2 (en) * 2006-10-31 2010-02-23 Panasonic Corporation Semiconductor integrated circuit and method for manufacturing the same
JP4814770B2 (ja) * 2006-12-01 2011-11-16 パナソニック株式会社 半導体集積回路
JP5054359B2 (ja) * 2006-12-01 2012-10-24 パナソニック株式会社 半導体集積回路及びその製造方法
JP5066928B2 (ja) * 2007-02-08 2012-11-07 株式会社デンソー 半導体装置
JP2008218442A (ja) * 2007-02-28 2008-09-18 Matsushita Electric Ind Co Ltd 半導体集積回路装置及びその製造方法
DE102007036566A1 (de) * 2007-08-03 2009-02-19 Siemens Ag Federkontaktierung von elektrischen Kontaktflächen eines elektronischen Bauteils
US7947592B2 (en) * 2007-12-14 2011-05-24 Semiconductor Components Industries, Llc Thick metal interconnect with metal pad caps at selective sites and process for making the same
JP5326151B2 (ja) * 2007-12-26 2013-10-30 セイコーNpc株式会社 パワーmosトランジスタ
DE102007063268A1 (de) * 2007-12-31 2009-07-09 Advanced Micro Devices, Inc., Sunnyvale Drahtverbindung mit aluminiumfreien Metallisierungsschichten durch Oberflächenkonditionierung
US20100059795A1 (en) * 2008-09-08 2010-03-11 Firas Azrai Vertical current transport in a power converter circuit
KR101107659B1 (ko) * 2010-02-05 2012-01-20 주식회사 하이닉스반도체 반도체 패키지
US8240218B2 (en) * 2010-03-01 2012-08-14 Infineon Technologies Ag Stress sensing devices and methods
US8426971B2 (en) 2010-08-27 2013-04-23 Diodes FabTech, Inc. Top tri-metal system for silicon power semiconductor devices
JP5558336B2 (ja) 2010-12-27 2014-07-23 株式会社東芝 半導体装置
JP5580230B2 (ja) 2011-02-28 2014-08-27 パナソニック株式会社 半導体装置
US9006099B2 (en) 2011-06-08 2015-04-14 Great Wall Semiconductor Corporation Semiconductor device and method of forming a power MOSFET with interconnect structure silicide layer and low profile bump
US9105552B2 (en) 2011-10-31 2015-08-11 Taiwan Semiconductor Manufacturing Company, Ltd. Package on package devices and methods of packaging semiconductor dies
US8823180B2 (en) * 2011-12-28 2014-09-02 Taiwan Semiconductor Manufacturing Company, Ltd. Package on package devices and methods of packaging semiconductor dies
US8859416B2 (en) * 2012-04-24 2014-10-14 GlobalFoundries, Inc. Software and method for via spacing in a semiconductor device
US9171790B2 (en) 2012-05-30 2015-10-27 Taiwan Semiconductor Manufacturing Company, Ltd. Package on package devices and methods of packaging semiconductor dies
WO2013179547A1 (ja) * 2012-06-01 2013-12-05 パナソニック株式会社 パワー半導体装置
TWI632644B (zh) * 2017-08-30 2018-08-11 Airoha Technology Corp. 積體電路結構
US10380308B2 (en) * 2018-01-10 2019-08-13 Qualcomm Incorporated Power distribution networks (PDNs) using hybrid grid and pillar arrangements
TWI748233B (zh) * 2018-08-29 2021-12-01 美商高效電源轉換公司 具有降低導通電阻之橫向功率元件
JP7177660B2 (ja) * 2018-10-26 2022-11-24 株式会社東芝 半導体装置
US20240047438A1 (en) * 2020-12-18 2024-02-08 Rohm Co., Ltd. Semiconductor equipment
CN114097080B (zh) 2021-07-01 2023-12-22 英诺赛科(苏州)科技有限公司 氮化物基多通道开关半导体器件和其制造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5992537A (ja) * 1982-11-19 1984-05-28 Hitachi Ltd 半導体装置
EP0646959B1 (de) * 1993-09-30 2001-08-16 Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno Verfahren zur Metallisierung und Verbindung bei der Herstellung von Leistungshalbleiterbauelementen
US6150722A (en) * 1994-11-02 2000-11-21 Texas Instruments Incorporated Ldmos transistor with thick copper interconnect
US5665996A (en) * 1994-12-30 1997-09-09 Siliconix Incorporated Vertical power mosfet having thick metal layer to reduce distributed resistance
JPH08293523A (ja) * 1995-02-21 1996-11-05 Seiko Epson Corp 半導体装置およびその製造方法
JP2000183104A (ja) * 1998-12-15 2000-06-30 Texas Instr Inc <Ti> 集積回路上でボンディングするためのシステム及び方法
US6291331B1 (en) * 1999-10-04 2001-09-18 Taiwan Semiconductor Manufacturing Company Re-deposition high compressive stress PECVD oxide film after IMD CMP process to solve more than 5 metal stack via process IMD crack issue

Also Published As

Publication number Publication date
DE60132855T2 (de) 2009-02-26
EP1176640A2 (de) 2002-01-30
EP1176640A3 (de) 2004-03-17
JP2002164437A (ja) 2002-06-07
DE60132855D1 (de) 2008-04-03
EP1176640B1 (de) 2008-02-20
US20020011674A1 (en) 2002-01-31
US7045903B2 (en) 2006-05-16

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