ATE390665T1 - Verfahren zur ganzzahldivision gegen angriffe an versteckten kanälen - Google Patents

Verfahren zur ganzzahldivision gegen angriffe an versteckten kanälen

Info

Publication number
ATE390665T1
ATE390665T1 AT03786055T AT03786055T ATE390665T1 AT E390665 T1 ATE390665 T1 AT E390665T1 AT 03786055 T AT03786055 T AT 03786055T AT 03786055 T AT03786055 T AT 03786055T AT E390665 T1 ATE390665 T1 AT E390665T1
Authority
AT
Austria
Prior art keywords
integer division
channel attacks
hidden channel
against hidden
division against
Prior art date
Application number
AT03786055T
Other languages
English (en)
Inventor
Marc Joye
Karine Villegas
Original Assignee
Gemplus Card Int
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gemplus Card Int filed Critical Gemplus Card Int
Application granted granted Critical
Publication of ATE390665T1 publication Critical patent/ATE390665T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/535—Dividing only
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002—Countermeasures against attacks on cryptographic mechanisms
    • H04L9/003—Countermeasures against attacks on cryptographic mechanisms for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/30—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
    • H04L9/3006—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters
    • H04L9/302—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy underlying computational problems or public-key parameters involving the integer factorization problem, e.g. RSA or quadratic sieve [QS] schemes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks
    • G06F2207/7261—Uniform execution, e.g. avoiding jumps, or using formulae with the same power profile

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Computing Systems (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Mathematical Physics (AREA)
  • Error Detection And Correction (AREA)
  • Storage Device Security (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Complex Calculations (AREA)
  • Stereo-Broadcasting Methods (AREA)
  • Circuits Of Receivers In General (AREA)
AT03786055T 2002-11-15 2003-11-13 Verfahren zur ganzzahldivision gegen angriffe an versteckten kanälen ATE390665T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0214281A FR2847402B1 (fr) 2002-11-15 2002-11-15 Procede de division entiere securise contre les attaques a canaux caches

Publications (1)

Publication Number Publication Date
ATE390665T1 true ATE390665T1 (de) 2008-04-15

Family

ID=32187620

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03786055T ATE390665T1 (de) 2002-11-15 2003-11-13 Verfahren zur ganzzahldivision gegen angriffe an versteckten kanälen

Country Status (9)

Country Link
US (1) US8233614B2 (de)
EP (1) EP1565812B1 (de)
JP (1) JP4378479B2 (de)
CN (1) CN1739094B (de)
AT (1) ATE390665T1 (de)
AU (1) AU2003295059A1 (de)
DE (1) DE60320016T2 (de)
FR (1) FR2847402B1 (de)
WO (1) WO2004046017A2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2838210B1 (fr) * 2002-04-03 2005-11-04 Gemplus Card Int Procede cryptographique protege contre les attaques de type a canal cache
JP2009515449A (ja) * 2005-11-04 2009-04-09 ジェムプリュス 組み込みシステム上での暗号アルゴリズム実行中にデータを安全に処理するための方法
US8150029B2 (en) 2005-12-29 2012-04-03 Proton World International N.V. Detection of a disturbance in a calculation performed by an integrated circuit
US9313027B2 (en) * 2005-12-29 2016-04-12 Proton World International N.V. Protection of a calculation performed by an integrated circuit
FR2897964B1 (fr) * 2006-02-28 2017-01-13 Atmel Corp Procede de calcul numerique incluant la division euclidienne
CA2680054C (en) * 2007-03-06 2015-07-07 Research In Motion Limited Method and apparatus for performing elliptic curve scalar multiplication in a manner that counters power analysis attacks
US20080275932A1 (en) * 2007-03-07 2008-11-06 Research In Motion Limited Integer Division In A Manner That Counters A Power Analysis Attack
EP2169535A1 (de) * 2008-09-22 2010-03-31 Thomson Licensing Verfahren, Vorrichtung und Computerprogrammunterstützung zur regelmäßigen Umkodierung einer positiven ganzen Zahl
FR3015726B1 (fr) 2013-12-24 2016-01-08 Morpho Procede de traitement comparatif securise
FR3040511B1 (fr) * 2015-08-27 2017-09-08 Stmicroelectronics Rousset Verification de la sensibilite d'un circuit electronique executant un calcul d'exponentiation modulaire
FR3040512B1 (fr) 2015-08-27 2017-09-08 Stmicroelectronics Rousset Protection d'un calcul d'exponentiation modulaire
FR3069671A1 (fr) * 2017-07-25 2019-02-01 Stmicroelectronics (Rousset) Sas Protection d'un calcul iteratif contre des attaques horizontales
WO2020146284A1 (en) * 2019-01-07 2020-07-16 Cryptography Research, Inc. Efficient squaring with loop equalization in arithmetic logic units
CN115729519B (zh) * 2022-11-16 2026-02-13 珠海泰为电子有限公司 除法运算方法、除法器、存储介质及电子设备

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4514592A (en) * 1981-07-27 1985-04-30 Nippon Telegraph & Telephone Public Corporation Cryptosystem
US5504817A (en) * 1994-05-09 1996-04-02 Yeda Research And Development Co. Ltd. At The Weizmann Institute Of Science Method and apparatus for memory efficient variants of public key encryption and identification schemes for smart card applications
CA2282051A1 (en) * 1998-10-20 2000-04-20 Lucent Technologies, Inc. Efficient block cipher method
DE19963408A1 (de) * 1999-12-28 2001-08-30 Giesecke & Devrient Gmbh Tragbarer Datenträger mit Zugriffsschutz durch Schlüsselteilung
FR2828608B1 (fr) * 2001-08-10 2004-03-05 Gemplus Card Int Procede securise de realisation d'une operation d'exponentiation modulaire
FR2848753B1 (fr) * 2002-12-11 2005-02-18 Gemplus Card Int Procede de division entiere ou de reduction modulaire securise contre les attaques a canaux caches

Also Published As

Publication number Publication date
AU2003295059A1 (en) 2004-06-15
DE60320016D1 (de) 2008-05-08
US20060133603A1 (en) 2006-06-22
JP2006506676A (ja) 2006-02-23
WO2004046017A3 (fr) 2004-07-15
WO2004046017A2 (fr) 2004-06-03
JP4378479B2 (ja) 2009-12-09
CN1739094B (zh) 2013-03-27
US8233614B2 (en) 2012-07-31
AU2003295059A8 (en) 2004-06-15
CN1739094A (zh) 2006-02-22
EP1565812B1 (de) 2008-03-26
FR2847402B1 (fr) 2005-02-18
DE60320016T2 (de) 2009-04-16
EP1565812A2 (de) 2005-08-24
FR2847402A1 (fr) 2004-05-21

Similar Documents

Publication Publication Date Title
DE60320016D1 (de) Verfahren zur ganzzahldivision gegen angriffe an versteckten kanälen
DE50303413D1 (de) Befestigungsmittel und Verfahren zu seiner Herstellung
NO20031164D0 (no) Nökkel for sylinderlås, og sylinderlås
DE60220682D1 (de) Verfahren und gerät zur ausführung effizienter arithmetikoperationen in hardware
ATE512989T1 (de) Verfahren zur herstellung von scdb-bibliotheken
EP1842128A4 (de) Beschleunigte verifikation digitaler signaturen und öffentlicher schlüssel
ATE542306T1 (de) Datennachrichtenbitsynchronisierung und lokalzeitkorrekturverfahren und architekturen
DE502006005447D1 (de) Verfahren zur Verschlüsselung bzw. Entschlüsselung von Datenpaketen eines Datenstroms
ATE407492T1 (de) Verfahren zur verschlüsselung eines n-stelligen datenwortes
TW200419921A (en) Method and device for decoding Reed-Solomon code or extended Reed-Solomon code
ATE298902T1 (de) Verfahren und einrichtung zur modulo-berechnung
ATE426202T1 (de) Gegen seitenkanalangriffe geschutztes kryptographisches verfahren
AU2003292338A1 (en) Molecular identification of bacteria of genus less thanigreater thanstreptococcusless than/igreater than and related genuses
RU2010109431A (ru) Способ передачи данных
FR2828608B1 (fr) Procede securise de realisation d'une operation d'exponentiation modulaire
ATE347721T1 (de) Anzeigeverarbeitungssystem und verfahren
TW200520397A (en) Method for performing dual phase pulse modulation
DE602004022552D1 (de) Verfahren zur Trie-Erzeugung mit einer reduzierten Trie-Blockzahl
WO2004051907A3 (en) System and method of digital system performance enhancement
AU2003262170A1 (en) Exhaust chamber comprising an envelope defining a gas circulation passage
Pudwell Sorting by right-to-left minima
WO2004025453A3 (en) Apparatus and method for adding multiple-bit binary strings
ATE228705T1 (de) Verfahren und gerät zur spurweisen impulsfehlerkorrektur in einem mehrspurigen speicherformat
KR101084612B1 (ko) 의사 임의 데이터 시퀀스 생성
ATE482525T1 (de) Verfahren und anordnung zum erweitern der suche durch trellis

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties